TW200634481A - Globally asynchronous locally synchronous systems - Google Patents
Globally asynchronous locally synchronous systemsInfo
- Publication number
- TW200634481A TW200634481A TW094141309A TW94141309A TW200634481A TW 200634481 A TW200634481 A TW 200634481A TW 094141309 A TW094141309 A TW 094141309A TW 94141309 A TW94141309 A TW 94141309A TW 200634481 A TW200634481 A TW 200634481A
- Authority
- TW
- Taiwan
- Prior art keywords
- synchronous systems
- locally synchronous
- globally asynchronous
- adjustable
- asynchronous locally
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
Abstract
An electronic device has a first module (50,52) including adjustable first clock circuitry (54) and a second module including (64) non-adjustable second clock circuitry (66). An interface between the first and second modules has a buffer arrangement (60,62). This enables an asynchronous interface to be provided between a central unit with non-adjustable clock circuitry and multiple units with pausible clocks.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB0426084A GB0426084D0 (en) | 2004-11-27 | 2004-11-27 | Globally asynchronous locally synchronous system |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200634481A true TW200634481A (en) | 2006-10-01 |
Family
ID=33561455
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094141309A TW200634481A (en) | 2004-11-27 | 2005-11-24 | Globally asynchronous locally synchronous systems |
Country Status (3)
Country | Link |
---|---|
GB (1) | GB0426084D0 (en) |
TW (1) | TW200634481A (en) |
WO (1) | WO2006056904A2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI566071B (en) * | 2014-11-24 | 2017-01-11 | 輝達公司 | Systems and methods for a pausible bisynchronous fifo |
TWI794949B (en) * | 2021-06-22 | 2023-03-01 | 美商谷歌有限責任公司 | System-on-chip and method of independent clocking for configuration and status registers |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7568118B2 (en) * | 2005-09-20 | 2009-07-28 | Intel Corporation | Deterministic operation of an input/output interface |
WO2009147566A1 (en) * | 2008-06-02 | 2009-12-10 | Koninklijke Philips Electronics N.V. | Asynchronous communication |
EP4318254A1 (en) | 2022-08-05 | 2024-02-07 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Semiconductor device system |
-
2004
- 2004-11-27 GB GB0426084A patent/GB0426084D0/en not_active Ceased
-
2005
- 2005-11-10 WO PCT/IB2005/053699 patent/WO2006056904A2/en active Application Filing
- 2005-11-24 TW TW094141309A patent/TW200634481A/en unknown
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI566071B (en) * | 2014-11-24 | 2017-01-11 | 輝達公司 | Systems and methods for a pausible bisynchronous fifo |
US9672008B2 (en) | 2014-11-24 | 2017-06-06 | Nvidia Corporation | Pausible bisynchronous FIFO |
TWI794949B (en) * | 2021-06-22 | 2023-03-01 | 美商谷歌有限責任公司 | System-on-chip and method of independent clocking for configuration and status registers |
Also Published As
Publication number | Publication date |
---|---|
WO2006056904A3 (en) | 2006-08-03 |
WO2006056904A2 (en) | 2006-06-01 |
GB0426084D0 (en) | 2004-12-29 |
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