SU813766A1 - Selector of pulses by repetition period - Google Patents

Description

The invention relates to a pulse technique and can be used in radio devices for generating gates, the width of which is proportional to the follow-up period of selectable pulses. A pulse selector is known, which contains a sequentially connected trigger, an AND element, a half-shaper former, an OR element, a delay device, a strobe generator, an AND element, as well as a scaling circuit and an inhibit element 1. The disadvantage of the known selector is the impossibility of determining in it the selection parameters (strobe width and following period). The specified parameters must be given in it in advance. The closest to the proposed technical entity is a device that contains two input elements AND, the first inputs of which are connected to the input of one bus, and the second inputs of these elements AND are connected to the inverse output of the pulse counter, and the input of one element is directly and the other - through the inverter, and the outputs are connected to. the input of the first control trigger, the direct output of which is connected to the control input of the pulse counter, the counting input of which is connected via a frequency divider to the clock pulse generator. The outputs of two additional pulse counters are connected to the perm inputs of equivalence elements, the second inputs of which are connected to the output of the main counter, pulses, and the counting inputs are connected to the clock pulse generator through the corresponding frequency dividers. The outputs of the equivalence elements are connected to the trigger inputs of the gate forging, the output of which is connected to the control input of the second additional pulse counter and to one of the inputs of the output element And, the other input of which is connected to the input bus. The inverse output of the second additional pulse counter is connected to the first input of the second control trigger, the output of which is connected to the control input to the first additional pulse counter, and the other input to the output of the third element AND,. two outputs of which are connected to the inputs of one of the input elements I, and the third input with the inverse input of the first control trigger (2. A disadvantage of this device is the complexity due to a large number of logic elements necessary for its construction. At that, -n by the number of elements are pulse counters and elements of equivalence. The purpose of the invention is to simplify the device. This goal is achieved by the fact that the pulse selector for the following period, containing three elements And three trig gera, the inputs of the first of which are connected to the outputs of the first and second elements I, and the output with the first input of the first pulse counter, the second input of which is through the first, the frequency divider is connected to the output of the clock pulse generator and the inputs of Bioporo and the third frequency dividers, the first output through and A vert to the first input of the first element I and directly to the first input of the second element I, the second input of which is connected to the input bus, the second input of the first element I and the first input of the third element I, an equivalence element, inputs to Two terminals are connected to the outputs of the first and second pulse counters, and the output is connected to the first input of the third trigger, the output of which is connected to the second input of the third element And, the two elements OR and the fourth type are introduced. connected to the output of the second frequency divider, the second input to the output of the second, about the trigger, and the output to the first input of the first element OR, the second input of which is connected through the fifth element I to the output of the third frequency divider and to the output of the third trigger, and the exit to the first entrance is the second pulse counter, the second input of which is connected to the output of the second element OR, the first input of which is connected to the output of the element of equivalence and the first input of the second trigger, the second input of which is connected to the output of the second element And, and the second input with the second input of the third trigger and output the third element I. Yaa fig. 1 shows the structural electrical circuit of the device / in FIG. 2 - time diagrams that show his work. The device contains an inverter 1, elements AND 2 and 3, control triggers 4 and 5, a generator of clock pulses, frequency drivers 7–9, elements 10 and 11, elements OR 12 and 13, counters 14 and 15 pulses, and equivalent momentum 16, strobe formation trigger 17, element 18, input 19 and output 20 tires. The bus 19 is connected to the first inputs of the elements 2 and 3, the second inputs of which are connected to the output of the counter 14, and the element 2 through the inverter 1. the output of the element 2 is connected to the first input of the trigger 4, the output of which is connected to the input of the control the counter 14. The output of the generator 6 is connected to dividers 7-9, and the outputs are connected respectively to the counting input of the counter 14 and the first inputs of the elements 10 and 11. The second input of the element 10 is connected to the output of the trigger 5, and the second input of the element 11 11 is the trigger output 17 and the first input element AND IS, the input of which is connected to the bus 19. The outputs of the elements 10 and 11 are connected to the input of the element OR 12, the output of which is connected to the counting input of the counter 15. The outputs of the counters 14 and 15 are connected to the equity element 16, the output of which is connected to the counting input of the trigger 17 and the first the inputs of the element OR 13 and the trigger 5. The second input of the element OR 13 is connected to the bus 20, the output of the element AND 18 and the reset input of the trigger 17. The output of the element OR 13 is connected to the reset input of the counter 15. The second inputs of the trigger 4 and 5 are connected to the output of the element AND 3. The device is working in the following way . The timing diagram (Fig. 2) shows the signals for a, b, c, d, e, f, g circuits (Fig. 1). Since the circuits of the hang are a set of bits of 1Y.x meter tires 14 and 15, the conventionally shown change in the contents of the counters 14 and 15 (Fig. 2). In the initial state, the triggers 4, 5 and 17 and the counters 14 and 15 are reset to the zero state. At the same time, O from the inverse output of the counter 14 closes the element I 3 and opens the element 1 and 2 through the inverter. The first input pulse passes through the element 2 and transfers the trigger 4, which, acting on the control input of the counter 14, allows the arrival of clock pulses on it . The contents of the counter 14 begin to increase (Fig. 2, chainfe). After several clock pulses, the signal from counter 14 opens element 3 and closes element-2, the next input pulse passes through element 3, and flips triggers 4 and 5. As a result, counter 14 stops and the measured pulse period of the input pulses remains and element 10 opens and passes the clock signals from divider 8 to the counting input of counter 15 through element OR 12. The division factors of dividers 7 and 8 are related so that, with the same BOM number of clock pulses in counters 14 and 15, the ending is The counter 15 would correspond to the beginning of the strobe formation. When the clock pulses arrive at the counter 15, its contents begin to increase (Fig. 2, circuit c) until it is compared with the contents of the counter 14. At the moment of equality at the output of the equivalent element 16, a signal appears, tipping the trigger 17, the signal from which output (Fig .2 circuit e) opens element AND 18. The signal from the output of element 16 of equivalence also resets trigger 5 and, through element OR 13, the counter 1 (Fig. 2, circuit d).

Trigger 5 closes AND 10, and trigger 17 opens AND 11, which passes the clock signals from divider 9 to counter 15 through element OR 12. The division factors of dividers 7 and 9 are related so that, with the same number of clock pulses, the counters 14 and 15, the completion of the filling of the counter 15 would correspond to the strobe width. When the counter is filled with 15-clock pulses from the divider 9, its contents rapidly increase (Fig. 2, circuit c). at the moment the input pulse arrives, the latter passes through the open element I 18 onto the bus 20 (Fig. 2, circuit q,), resets the trigger 17 and through the element OR HZ - counter 15 (Fig. 2, circuits t and c). A trigger 17 closes And 11 and And 18 elements. At the same time, the input pulse passes through And 3 element and flips trigger 5, which opens And 10 element and the processes are resumed.

In the case of passing a selectable pulse, the proposed device functions similarly to the known, i.e. stops after the strobe has been formed. The content of the counter 15 according to the clock signals from the frequency divider 9 increases to a value equal to the contents of the counter 14 (Fig. 2, circuit c). At the moment of equality, the signal from the output of the equivalence element 16 resets through the OR element 13 the counter 15 and flips the counting trigger 17, as a result of which the AND 18 element closes, the state of the trigger 5 remains unchanged, since it is reset earlier (Fig. 2, circuit d ). When a pulse arrives on the bus 19, the trigger 5 is thrown and starts the counter 15, as a result of which the device again forms gates, in the center of which there are pulses of the sequence.

The introduction of the reset of the counter 15 at the moment of equality of its heart to the code of the counter 14, as well as at the moment of receipt

selectable pulse, simplifies the device, 1: .plug from it the two most cumbersome elements: the counter / and the element of equivalence; the introduction to the two-input elements AND and OR, which ow; Significantly simpler than the excluded counter and the element of equivalence, only slightly reduce the degree of simplification of the device.

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Claims (2)

1. USSR author's certificate number 411617, cl. H 03 K 5/18, 1972. 0 2. Authors certificate of the USSR 490262, cl. H 03 K 5/156, 1973. but s with d e f 3 eleven n 11 2