SU783975A1 - Device for decoding pulse trains - Google Patents

Description

the control inputs to the additional elements of the Trigger, and the outputs to the first inputs of the first adder and to the first inputs of one-time comparison units, the control input of the first adder is connected to the input bus, the outputs of each previous adder through the delay elements are connected to the first inputs of subsequent adders and the second the inputs of the corresponding elements of a one-by-one comparison of the numbers whose outputs are connected to the second control inputs of all the delay elements, to the control inputs of the remaining adders and through From the pulse expanders to the remaining inputs of the threshold element, the outputs of the elements of the numerical constants are connected to the second inputs of the adders.

FIG. 1 shows a diagram of the device; in fig. 2 - time diagrams of the operation of the circuit when decoding a three-pulse series; in fig. 3 variant of the functional diagram of the delay element.

The device contains a pulse generator 1, the output of which is connected to the first control input of the delay element 2-1, threshold element 3, one input of which is connected to the input bus and the first information input of the delay element 2-1, and the output connected to the output bus, counter 4, the input of which is connected to the output of the pulse generator 1 and to the first control inputs of the additional elements 2-2--2-p of the delay, and the outputs of the city to the first inputs of the first adder 5-1 and to the first inputs of the second comparison elements 6 , controls the entry of the first with Mmator 5-1 connected to the input bus, the outputs of each previous adder 5-1-5-p through the elements 2-1 - 2-p delays connected to the first inputs of subsequent adders and the second inputs of the corresponding elements b of the random comparison of numbers, the outputs of which connected to the second control inputs of each element 2 1-2-0 e-terminals, to the control inputs of the remaining adders 5-2 - 5-p and through the expanders 7 pulses - to the remaining inputs of the threshold element 3, the outputs of the elements of 8 numerical constants are connected to BTopbiottj the inputs of the adders 5 „-1 -. . „5-p. g,

The device works as follows.

The control input of the adder 5-4 receives a pulse sequence to be decoded. With the arrival of the pulse of the sequence to the control input of the adder 5-1, the current number of the counter 4 is summed with the element of the numeric constant -1 -1 of the last order

interval of the decoded sequence, and the resulting sum of the number from the output of the adder 5-1 goes to the second information inputs of the first delay element 2-1 and under the action of the pulse sequence and pulses from the output of the generator- pulse generator 1, is set at the output of the delay element 2-1. By the time of arrival of the second pulse of the sequence, a binary number will be compared at the output of delay element 2-1 and counter 4 by means of a bitwise comparison of numbers 6-1. Impulse - from the output of a one-time comparison element

5 numbers 6-1, received at the control input of the adder 5-2, gives permission to sum the number from the output of the output element 2-1 and the number from the element of the numerical constant 7 of the next interval of the pulse sequence. The resulting sum from the output of the adder 5-2 goes to the next delay element. At the same time, a pulse from the output of comparison of numbers 6-1, arriving at the second control input of the delay element 2-1, erases the number at its output and allows the pulse to be overwritten from the first information output of the delay element 2-1 to the next one.

Decoding subsequent inter. The sequence shafts are similar to decoding the previous interval. When the last sequence is received, all outputs of the one-by-one comparison of the numbers 6-1 to 6-p will have pulses that go to the input of the threshold

 element 3 through pulse extenders - 8-1 - 8-p. As a result, a common decoding signal is output at the output of the threshold element 3.

5 The operation of the proposed device is illustrated by the time analysis graphs shown in FIG. 2. For an example, take a three pulse pulse sequence at intervals.

0 (2, 3) - (graph. Input). On the graph. 1 shows the pulses of the pulse generator 1. On the graph. 4 shows the moments of changing the number of the counter 4. On the graph. 5-1 5-2 marked the time of arrival of the pulse sequence and

the corresponding numbers in decimal form at the counter 4 -. (3, 11, 19 ,, 27) at the output of adders 5-1 (19, 27, 43) 5-2 - (19, 27). The graphs 6-1, 6-2 show the pulses at the outputs of the one-bit comparison of numbers, and the graph. 8-1, 8-2 - pulses at the outputs of the pulse extenders 8-1, 8-2. The decoding time of the pulse sequence is depicted. 3 (out)

On fig.Z presents one of the possible options for the implementation of the functional scheme of the delay element and the time analysis.

To the input of the device are received as impulses of interference from the satellite as well as impulses of interference, normalized in duration. The length of the series-connected triggers (IT, 4T), (2T, 5T), (ST, 6T) is determined by the maximum frequency of the impulse noise in the channel. The number of bits in the number of arrival times of the pulses is determined by the required resolution of the delay element. In the example, the number of bits is two. In the graphs of FIG. 3, a case is considered when a second pulse arrived at the device input until the previous pulse was detected. This case is possible when receiving ipulse sequences and interference. From the graphs of FIG. 3, it can be seen that the input pulse (code) appears at the output of the delay element at a rate determined by the clock frequency of the pulse generator. The code of the number (10) at the output of the delay element will be until no. Turn on the pulse at the second control input of the delay element. The second number (01) in the delay element must always be decoded as follows but the order of the record and will appear at the output of the delay element after detecting the previous one.

Triggers .IT, 4T, and elements 1C, 2C serve to determine the location of information along the length of the delay element and participate in organizing the advancement of information on the main delay elements (2T, 5T), (ST, 6T).

The use of a digital recording of the pulse and the moment of its decoding, taking into account the sequence of the decoding intervals of the sequence in the delay elements, improves the noise immunity of the device.

Claims (2)

1.Globus I.L. Binary coding in asynchronous systems M., Communication 1972. 2. USSR author's certificate number 566348, cl. H 03 K 13/22, 1977. (nepSbiif ijifp. Sxod) ; (Second control bkod) (perby info. under) hoz oet ietiepai. I I I I I I I I I M Imp. to the first U /////// L bhoam 5T T /////// L F adder 6Tf mountain Sh t manager go iz.Z