SU1467763A1 - Device for measuring signal phase and frequency deviation in communication channel - Google Patents

Abstract

This invention relates to electrical measurements. The purpose of the invention is to reduce the measurement time of the signal phase jumps. The device contains the first measurement path 22, consisting of the matching block I, the block 2 of the zero crossing selection, counters 3 and 5, and the EL 4, the decoder 6, the interrupt request generator 7, the period register 8, the divider 9 seconds the coefficient dividing, the second measurement path 23, consisting of a matching unit 10, a zero crossing selection unit 11, a divider I2 with a variable coefficient. divisions, counters 13 and 15, and EL 14, the interrupt request shaper 16, measuring g-24, consisting of g-17 quantizing pulses and control unit 19, microprocessor block 19, switch 20 and indicator 21. In the path 23, measurements are made of frequency deviations and phase jitter. To determine frequency deviations, an average period is calculated and a deviation from the specified value is determined from it. When measuring phase jitter, each period of the incoming signal is compared with the average period. The resulting difference is summarized with the difference obtained in the previous period, and the phase span is determined by the difference between the maximum positive and negative deviations. In path 23, phase jumps are measured, which are then calculated and recorded in microprocessor unit I9. G il. (L

Description

The invention relates to techniques for electrical measurements and can be used in signal transmission and reception systems for measuring and monitoring frequency deviations, jitter and phase jumps of a signal in a communication channel.

The purpose of the invention is to reduce the measurement time of phase jumps of the signal.

The drawing shows a structural electrical diagram of a device for measuring deviations of frequency and phase in a communication channel.

The device comprises a matching unit 1, a zero transition selection block 2, a counter 3, an AND 4 element, a 5 counter, a decoder 6, an interrupt request generator 7, a period register 8, a divider 9 with a constant division coefficient, a matching block 10, a transition allocation block 11 through zero, a divider 12 with a variable division coefficient, counter 13, AND element 14, counter 15, interrupt request generator 16, quantizing pulse generator 17, control unit 18, microprocessor unit 19, switch 20, indicator 21, first 22 and second 23 paths measurements KSR Control generator 24, control bus 25, address bus 26 and data bus 27.

A device for measuring deviations of the frequency and phase of the signal in the communication channel is as follows.

In the measurement path 23 (frequency deviations and phase jitter), the measuring signal from the measuring generator at the opposite end of the communication system, passing the communication channel, is fed to the input of the matching unit 10, where it is amplified, limited in amplitude and filtered by a band-pass filter 1020 ± 300 Hz. Then the signal is fed to the input of the block for selecting transitions through zero, the divider 12 with a variable division ratio, and is fed to the reset input of the first counter 13. Clock pulses from the generator 17 quantizing pulses are fed to the counting input of the first counter 13, and after filling it through the element And 14 - to the counting input of the second counter 15. If the division factor of the divider 12 with a variable division coefficient A = 1, then by the end of the period of the measuring signal in the second counter 15 contains a binary number corresponding to the variable part measured period Xi-Ci (where C - a constant number recorded in the first counter 13) and through the switch 20, ready to enter the data bus 27. At the time from the occurrence of a zero transition to filling the counter of the constant part, the interrupt request generator 16 is put into state “1”, which issues an interrupt input request to the microprocessor unit 19, in which information on the duration of the previous period is read at each subsequent period. In the microprocessor unit 19, only information about the variable part of the read period is processed. To determine the frequency deviations, the average period X is calculated and the deviation from the set value is determined from it.

When measuring phase jitter after determining the average period, any moment of transition through zero of the phase of the incoming signal is taken as the beginning of the relative reference system and, starting from it, each period of the incoming signal is compared with the average period, the resulting difference is summed with the difference obtained in the previous period, and the amplitude phases are determined by the difference between the maximum positive and negative deviations.

The divider 12 with a variable division ratio allows you to measure over several periods and serves to reduce the discreteness error in determining the average period and phase jitter.

In the measurement path 22 (phase jumps), the measuring signal passes through the matching unit 1, where it is amplified, limited in amplitude and filtered by a bandpass filter of 300–3400 Hz and, through the zero separation unit 2, goes to the reset input of the first counter 3. Clock pulses from the generator 17 quantizing pulses, passing through the divider 9 with a constant division ratio, are fed to the inputs of the first counter 3 and the element And 4. In this example, the frequency of the generator 17 is equal to 12240 kHz. It is divided by a divider 9 with a constant division factor by 15, providing the required accuracy of the scale for measuring phase jumps, equal to 0.45 °. By the end of the period of the measuring signal, the number C | 'corresponding to the constant part of the period is stored in the first counter. The period 8 register stores information recorded from the MPS on the average period X — C \. which at the end of the work of the first counter 3 is overwritten into the second counter 5. After that, the clock pulses through the element And 4 are fed to the subtracting input of the first counter 5, which works as a reverse. Therefore, by the time the next zero transition occurs, the reverse counter 5 contains a binary number corresponding to the difference in the durations of the current and average periods (X — C1) - {Xi — C1) = X — Xi = kXi. This number, corresponding to the increment of the period, is ready to be processed through the switch 20 to the microprocessor unit 19. At the same time as the result is ready, a request is received from the shaper 7 of the interrupt request to the input of the decoder 6 of the start of the jump, to the interrupt input of the microprocessor unit 19. The microprocessor unit 19 does not respond to interrupt requests for the shaper 7 until the second counter contains a number outside the interval ± a (in this example, the decoder 6 of the start of the jump fixes a = ± 11, which corresponds to a change in φ zy on the value of 5 ° or more for. 1 msec). This condition is necessary for servicing signals from the shaper 7 of interrupt requests and reading the result from the output of the second counter 5 through the switch 20 to the microprocessor unit 19. The decoder 6 starts the jump with its first interrupt request to the input of the microprocessor unit 19 removes the ban on servicing signals from the shaper 7 interrupt requests for a while. The phase jump. Is calculated and fixed in the microprocessor unit 19, if the phase increment is not less than a value until a predetermined threshold p is reached. If then during four periods of the measuring signal the phase of the signal does not fall below the threshold of the jump p, then the phase jump is fixed. Otherwise, if the requirements for the phase increment rate ΔΧ are not complied with, interrupt requests from the shaper 7 and reading information from the second counter 5 are again forbidden until the signal from the decoder 6 of the start of the jump arrives at the interrupt input of the microprocessor unit 19.

The microprocessor unit 19 not only reads and processes the information of its three buses 25–27, but also controls the operation of the divider 12 with a variable division coefficient, writing in it the required division coefficient, control unit 18, controlling the frequency and level of the measuring generator, register 8 of the period, writing in information about the variable part of the middle period, the switch 20, reading through it information from the second counters 5 and 15, and the indicator 21, displaying the measurement results on it.

The microprocessor unit 19 frees up the machine time from the continuous servicing of requests for the phase jump measurement path, and serves new consumers.

Claims (1)

Claim A device for measuring deviations of the frequency and phase of a signal in a communication channel, comprising a measuring generator consisting of series-connected generator of quantizing pulses and a control unit, a switch, a microprocessor unit with data buses, control and addresses, an indicator, a first measurement path, consisting of series-connected unit coordination, block allocation of transitions through zero, the first counter, the And element and the second counter, the second measurement path, consisting of series-connected block consent of the unit, the selection of transitions through zero, the divider with a variable division coefficient, the first counter, the And element, the other output of which is connected to the outputs of the quantizing pulse generator and the second counter, and the count resolution inputs and the outputs of the first counters of each of the measurement paths are interconnected, the output the second counter of the second measurement path through a switch connected to the address and control buses is connected to the data bus, which is also connected to the first input of the indicator, the second inputs of the divider with a variable a division factor and a control unit, the third and fourth inputs of which are connected respectively to the address bus and the control bus, characterized in that, in order to reduce the measurement time of the phase jumps of the signal, a divider with a constant division factor is introduced, included between the second input of the element And the first measurement path and the output of the quantizing pulse generator, a period register, a decoder, an interrupt request generator is introduced into each measurement path, and the second counter of the first measurement path is reversed, p the first inputs of the interrupt request generators are connected to the outputs of the corresponding first counters, the outputs are connected to the interrupt inputs of the microprocessor unit, the second input of the interrupt request generator of the first measurement path is connected to the output of the corresponding transition selection block through zero, and the output is connected to one of the decoder inputs, the other output of which connected to the output of the second counter of the first measurement path, and the output is connected to another input of the switch data, the installation input of the second counter of the first path the measurement is connected to the output of the first counter, the recording input is connected to the output of the period register, and the output is connected to another input of the decoder, the output of which is connected to the third interrupt input of the microprocessor unit, the second input of the interrupt request generator of the second measurement path is connected to the output of the divider with a variable division coefficient, connected to the installation input of the second counter of the second measurement path, the input of the divider with a constant division factor is connected to the output of the quantizing pulse generator, and the output It is connected to the second input of the And element and the clock input of the first counter of the first measurement path, the inputs of the period register are connected to the data, control, and address lines of the microprocessor system.