RU95108154A - Correlation receiver of signals with dpsk - Google Patents

Abstract

FIELD: communication, discrete messages reception method used for demodulation of synchronous signals with differential phase-shift keying (DPSK). SUBSTANCE: aim is to increase interference resistance of discrete DPSK signals correlation receiver due to the fact, that forming demodulator units are used for second designation - to decrease effect of interferences on clocking unit. To realize the aim correlation receiver of DPSK signals has generator of two being in quadrature reference oscillations, two correlators, two sampling units, solver and clocking unit, that has filter, controlled generator and control signals shaper, is added with clocking separation unit, that is connected between outputs of sampling units and input of filter and it is composed of level calculation unit and analyzer of level additions change, that are separating clock information from single on clock interval readings of correlation functions, and also it has correcting signal shaper and multiplier, that are using demodulator produced decisions to restore clocking sign and deviate false clocking information. Usage of demodulator units to fulfill additional functions is directed to achievement of high interference resistance of clocking system and correspondingly receiver as a whole and simultaneously to simplification of its design. EFFECT: increased receiver clocking stability and simplified its design.

Claims (1)

The invention relates to techniques for receiving discrete messages and is intended for demodulation of synchronous signals with relative phase modulation (OFM). The purpose of the invention is the hanging of the noise immunity of the correlation receiver of discrete OFM signals due to the fact that the blocks forming the demodulator are used for a second purpose - to attenuate the effect of interference on the clock synchronization block. For this, a correlation receiver of OFM signals containing a generator of two reference oscillations squared, two correlators, two gating units, a deciding unit, and also a clock synchronization unit consisting of a filter, a controlled generator and a driver of control signals, a sync information extraction unit, included between the outputs of the gating blocks and the input of the filter and consisting of a block for calculating the level and the analyzer changes in the level increments, which distinguish synchronous information from one-time to t such as are for reference interval correlation functions and from the corrective driver signal and the multiplier, the demodulator which uses the received solutions for the recovery and the cull mark sinhroinformatsii sinhroinformatsii false. The use of demodulator blocks for the second purpose is aimed at achieving high noise immunity of the clock synchronization system and at simplifying its design.