RU2695501C1 - Device for simulation of multiterminal transmission of direct current in power system - Google Patents

Abstract

FIELD: data processing.

SUBSTANCE: invention relates to simulation of power systems objects. Device comprises a central processing unit, a switching processor, an analogue-to-digital conversion processor, a multichannel analogue-to-digital conversion unit, a first-side multi-terminal DC transmission simulation unit, unit for simulating second side of multi-terminal DC transmission, unit for simulation of third side of multi-terminal DC transmission, first unit for simulation of DC line, second unit for simulation of DC line, unit of switching unit.

EFFECT: continuous reproduction of continuous spectrum of normal and abnormal processes of multi-terminal DC transmission and functioning of structural elements of the system.

1 cl, 11 dwg

Description

The invention relates to data processing, namely to modeling devices and can be used in real-time modeling of a continuous spectrum of normal and abnormal processes of functioning of multi-terminal direct current transmission and its structural elements with controlled parameters, including as part of specialized multiprocessor software and hardware systems hybrid type, designed for real-time simulation of large energy systems.

A device for the physical simulation of multi-terminal direct current transmission in the energy system, made on the basis of voltage converters [Bulygina MA, Gushchina TA, Kirienko GV, Koscheev LA, Shlaifshtein VA Modes of operation of transmissions and DC inserts made on the basis of voltage converters // Electric stations. - 2004. - No. 5. - S. 34-43], which is selected as a prototype. This device contains the same simulation blocks of the first, second and third parties of alternating current of multi-terminal direct current transmission, the same first and second blocks of simulation of a direct current line.

In the simulation unit of the first side of the multi-terminal direct current transmission, the first three-phase input / output of the transformer simulation unit is the first three-phase input / output of the device. The second three-phase input / output of the transformer simulation unit is connected to the three-phase input / output of the simulation unit of the static voltage converter, the three-pole input / output of which is connected to the first three-pole input / output of the simulation unit of the DC circuit. The second three-pole input / output of the DC circuit simulation unit is connected to the first three-pole input / output of the first DC line simulation unit. In the simulation unit of the second side of the multi-terminal direct current transmission, the first three-phase input / output of the transformer simulation unit is the second three-phase input / output of the device. The second three-phase input / output of the transformer simulation unit is connected to the three-phase input / output of the simulation unit of the static voltage converter, the three-pole input / output of which is connected to the first three-pole input / output of the simulation unit of the DC circuit. In the third-party simulation unit of the multi-terminal direct current transmission, the first three-phase input / output of the transformer simulation unit is the third three-phase input / output of the device. The second three-phase input / output of the transformer simulation unit is connected to the three-phase input / output of the simulation unit of the static voltage converter, the three-pole input / output of which is connected to the first three-pole input / output of the simulation unit of the DC circuit. The second three-pole input / output of the DC circuit simulation unit is connected to the first three-pole input / output of the second DC line simulation unit. The second three-pole input / output of the first DC line simulator is connected, the second three-pole input / output of the DC circuit simulator, and the second three-pole input / output of the second DC line simulator are interconnected. The neutrals of each block of the DC circuit simulation are interconnected.

Such a device allows you to simulate the multi-terminal direct current transmission operating modes, however, in the design scheme there are no reactors and filters simulation blocks on the alternating current side, smoothing reactors and a direct current filter are not taken into account in the direct current circuit simulation block, parameters of transformer simulation blocks, direct current circuits are not manageable current, direct current lines, excluding modeling of various schemes of multi-terminal direct current transmissions and taking into account the influence I have external factors on the parameters of simulated structural elements (transformers, reactors, filters, direct current circuits, direct current lines). When modeling, there is no possibility of modeling various abnormal modes and processes of multi-terminal direct current transmissions and its structural elements, as well as the possibility of using the device in modeling tools of large energy systems due to the known limitations of physical modeling determined by similarity criteria [Venikov V.A. The theory of similarity and modeling (in relation to the tasks of the electric power industry). Ed. 2, add. and reslave. 1976. S. 93-120]. The indicated limitations exclude the possibility of modeling various normal and abnormal modes and functioning processes of multi-terminal direct current transmission and its structural elements, as well as the possibility of using the device in modeling tools of large energy systems, including for assessing the mutual influence of the functioning of multi-terminal direct current and power systems .

The proposed device for modeling multi-terminal direct current transmission in an energy system provides a complete and reliable real-time reproduction of a continuous spectrum of normal and abnormal processes of functioning of direct current transmission and its structural elements.

A device for simulating multi-terminal DC transmission in power systems, as in the prototype, includes a block for modeling the first side of multi-terminal DC transmission, a block for modeling the second side of multi-terminal DC transmission and a third-side modeling block for multi-terminal DC transmission, each of which contains a modeling block a transformer, a simulation unit of a static voltage converter that is connected to a simulation unit DC circuit, moreover, in the simulation unit of the first side of the multi-terminal direct current transmission, the DC circuit simulation unit is connected to the first DC line modeling unit, in the simulation unit of the third side of the multi-terminal direct current DC transmission, the DC circuit simulation unit is connected to the second DC circuit simulation unit , while the first and second blocks of the simulation of the DC line are performed identically, one input / output of each simulation block ransformatora is an input / output device, and the neutral of the DC circuit simulation blocks are interconnected.

According to the invention, in the simulation blocks of the first, second and third sides of the multi-terminal direct current transmission, the transformer simulation block is connected to the first digitally-controlled longitudinal switching block, to a filter simulation block, to a reactor simulation block. The reactor simulation block is connected to the static voltage converter simulation block. The first block of digitally controlled longitudinal switching is connected to the reactor simulation block, to the filter simulation block. The neutrals of each filter simulation block, the DC circuit simulation block, and the first and second DC line simulation blocks are interconnected. In the simulation unit of the second side of the multi-terminal direct current transmission, the DC circuit simulation unit is connected to the switching unit unit, which is connected to the first DC line modeling unit and the second DC line modeling unit. The first and second DC line simulation blocks comprise a first DC line start simulation block that is connected to the first and second voltage-current converters. The modeling unit for the end of the first DC line is connected to the third and fourth voltage-current converters. The simulation block of the beginning of the second DC line is connected to the fifth and sixth voltage-current converters. The modeling unit for the end of the second DC line is connected to the seventh and eighth voltage-current converters. In this case, the first neutral voltage generating unit is connected to the ninth and tenth voltage-current converters, and the second neutral voltage generating unit is connected to the eleventh and twelfth voltage-current converters. The output of the first voltage-current converter is connected to the interconnected input of the simulation block of the beginning of the first direct current line, the input / output of the first block of digitally controlled transverse switching, and the input / output of the simulation block of the DC circuit. The output of the fifth voltage-current converter is connected to the interconnected input of the simulation block of the beginning of the second DC line, the input / output of the first block of digitally controlled transverse switching, and the input / output of the simulation block of the DC circuit. The output of the ninth voltage-current converter is connected to the interconnected input of the first neutral voltage generating unit, the input / output of the first digitally controlled lateral switching unit and the input / output of the DC circuit simulation unit. The output of the second voltage-current converter is connected to the interconnected input of the simulation block of the beginning of the first direct current line, the input / output of the second block of digitally controlled longitudinal switching and the input / output of the second block of digitally controlled transverse switching. The output of the sixth voltage-current converter is connected to the interconnected input of the simulation block of the beginning of the second DC line, the input / output of the second block of digitally controlled longitudinal switching and the input / output of the second block of digitally controlled transverse switching. The output of the tenth voltage-current converter is connected to the interconnected input of the neutral direction forming unit, the input / output of the second block of digitally controlled longitudinal switching and the input / output of the second block of digitally controlled transverse switching. The output of the third voltage-current converter is connected to the interconnected input of the modeling unit of the end of the first direct current line, the input / output of the second block of digitally controlled longitudinal switching and the input / output of the third block of digitally controlled transverse switching. The output of the seventh voltage-current converter is connected to the interconnected input of the modeling block of the end of the second DC line, the input / output of the second block of digitally controlled longitudinal switching and the input / output of the third block of digitally controlled transverse switching. The output of the eleventh voltage-current converter is connected to an interconnected input of the neutral direction forming unit, the input / output of the second block of digitally controlled longitudinal switching and the input / output of the third block of digitally controlled transverse switching. The output of the fourth voltage-current converter is connected to the interconnected input of the modeling block of the end of the first DC line, the input / output of the fourth block of digitally controlled transverse switching, and the input / output of the block of the switching unit. The output of the eighth voltage-current converter is connected to the interconnected input of the modeling unit of the end of the second DC line, the input / output of the fourth block of digitally controlled transverse switching, and the input / output of the switching unit unit. The output of the twelfth voltage-current converter is connected to an interconnected input of the neutral direction forming unit, the input / output of the fourth block of digitally controlled lateral switching and the input / output of the switching unit unit. Transformer simulation blocks, reactor simulation blocks, filter simulation blocks, DC circuit simulation blocks, first-line direct current line modeling block, first first-line direct current line modeling block, second second-line direct line modeling block, second second-line line modeling block, the first and second neutral voltage generating units are connected to the central processor. The central processor is connected to a computer / server, a switching processor, and an analog-to-digital conversion processor, which is connected to a multi-channel analog-to-digital conversion unit. The multichannel analog-to-digital conversion unit is connected to transformer simulation blocks, reactor simulation blocks, filter simulation blocks, DC circuit simulation blocks, a first DC line start simulation block, a first DC line end simulation block, a second DC line start simulation block, block modeling the end of the second DC line, the first and second blocks of the formation of neutral voltage. Transformer simulation blocks, reactor simulation blocks, static voltage converter simulation blocks, switching unit block, DC circuit simulation blocks, first, second, third and fourth digitally controlled lateral switching blocks, first and second digitally controlled longitudinal switching blocks are connected to the switching processor.

The proposed device for modeling multi-terminal direct current transmission in energy systems as compared with the prototype provides continuous implicit integration of differential equations systems of three-phase complete mathematical models of the structural elements of the device for reliable reproduction of a continuous spectrum of normal and abnormal processes of functioning of multi-terminal direct current transmission and its structural elements; automated and automatic control, including functional control, of parameters of transformer simulation blocks, filters, reactors, static voltage converters, direct current circuit of simulation blocks of the first, second and third sides of multi-terminal direct current transmission, as well as the first and second blocks of direct current line modeling. All information and control functions of the device are provided using analog-to-digital and digital-to-analog conversions; conversion of continuous mathematical variables of phase currents of simulated structural elements of the device with the help of voltage-current converters into the corresponding model physical currents, which ensures adequate reproduction of the spectrum of all kinds of three-phase longitudinal and transverse switching, including phase-wise, as well as the natural interaction of structural elements and the device as a whole in similar software and hardware systems for real-time simulation of large energy systems.

In FIG. 1 shows a block diagram of a device for modeling multi-terminal direct current transmission in power systems.

In FIG. 2 shows a block diagram of a transformer modeling block 11 (BMT).

In FIG. 3 is a block diagram of a reactor simulation block 12 (BMR).

In FIG. 4 shows a block diagram of a filter modeling block 13 (BMF).

In FIG. 5 is a structural diagram of a simulation block of a static voltage converter 15 (BMSPN).

In FIG. 6 shows a block diagram of a DC simulation circuit block 16 (BMCPT).

In FIG. 7 is a structural diagram of the same first 8 (1БМЛПТ) and second 9 (2БМЛПТ) DC line modeling blocks.

In FIG. 8 shows a phase equivalent circuit of a simulated reactor.

In FIG. 9 shows a phase equivalent circuit of a simulated filter.

In FIG. 10 is an equivalent circuit of a direct current circuit.

In FIG. 11 shows an equivalent circuit of a direct current line.

A device for simulating direct current transmission in power systems (Fig. 1) comprises a central processor 1 (CPU), a switching processor 2 (PC), an analog-to-digital conversion processor 3 (PACP), a multi-channel analog-to-digital conversion unit 4 (BMACP), simulation unit of the first side of multi-terminal direct current transmission 5 (BM1S), modeling block of the second side of multi-terminal direct current transmission 6 (BM2S), block modeling of the third side of multi-terminal direct current transmission 7 (BM1S), first b approx simulation DC line 8 (1BMLPT), a second DC power line 9, modeling (2BMLPT) unit switching node 10 (SCU).

The simulation blocks of the first 5 (BM1S), second 6 (BM2S) and third 7 (BM3C) sides of the multi-terminal direct current transmission are identical, and each contains a transformer simulation block 11 (BMT), a reactor simulation block 12 (BMR), a filter simulation block 13 (BMF), digitally-controlled longitudinal switching unit 14 (BTsPrK1), modeling unit of a static voltage converter

15 (BMSPN), DC simulation circuit block 16 (BMTSPT).

The digital inputs / outputs of the central processor 1 (CPU), switching processor 2 (PC) and analog-to-digital conversion processor 3 (PACP) are interconnected.

The digital inputs / outputs of the analog-to-digital conversion processor 3 (PACP) and the multi-channel analog-to-digital conversion unit 4 (BMACP) are interconnected.

The digital inputs / outputs of central processing unit 1 (CPU) are connected to a computer / server.

The digital outputs of the central processor 1 (CPU) are connected to the digital inputs for controlling the parameters of the first block of simulation of a direct current line 8 (1БМЛПТ) and the second block of simulation of a line of direct current 9 (2БМЛПТ), as well as the block of simulation of transformer 11 (BMT), block of simulation of reactor 12 (BMR), filter simulation block 13 (BMF), DC circuit simulation block 16 (BMCPT) simulation blocks of the first 5 (BM1S), second 6 (BM2S) and third 7 (BM3S) sides of multi-terminal direct current transmission.

The digital outputs of switching processor 2 (PC) are connected to the digital inputs for controlling the parameters of the first block of simulation of a direct current line 8 (1БМЛПТ) and the second block of simulation of a line of direct current 9 (2БМЛПТ), block of a switching unit 10 (БКУ), and also a block of modeling a transformer 11 (BMT), reactor simulation block 12 (BMR), the first digitally-controlled longitudinal switching block 14 (BTsPrK1), static voltage converter simulation block 15 (BMSPN), direct current circuit simulation block 16 (BMTSPT) mode blocks first 5 (BM1S), second 6 (BM2S) and third 7 (BM3S) sides of multi-terminal direct current transmission.

In the simulation unit of the first side of the multi-terminal DC transmission 5 (BM1C), the first three-phase input / output of the simulation unit of the transformer 11 (BMT) is the first three-phase input / output of the device. The second three-phase input / output of the simulation unit of the transformer 11 (BMT) is connected to the first three-phase input / output of the simulation unit of the reactor 12 (BMR) and to the first three-phase input / output of the first block of digitally controlled longitudinal switching 14 (BTsPrK1).

The second three-phase input / output of the first digitally-controlled longitudinal switching unit 14 (BTsPrK1) is connected to the third three-phase input / output of the transformer simulation block 11 (BMT) and to the three-phase input / output of the filter simulation block 13 (BMF).

The second three-phase input / output of the reactor simulation block 12 (BMR) is connected to the three-phase input / output of the static voltage converter simulation block 15 (BMSPN), the three-pole input / output of which is connected to the first three-pole input / output of the simulation block of the direct current circuit 16 (BMCPT).

The second three-pole input / output of the DC circuit simulation block 16 (BMCPT) is connected to the first three-pole input / output of the first DC circuit simulation block 8 (1БМЛПТ).

The second three-pole input / output of the first block of simulation of the DC line 8 (1BMLPT) is connected to the first three-pole input / output of the block of the switching node 10 (BKU).

The second three-pole input / output of the unit of the switching unit 10 (BKU) is connected to the three-pole input / output of the simulation unit of the direct current circuit 16 (BMCPT) of the simulation unit of the second side of multi-terminal direct current transmission 6 (BM2S).

The first three-phase input / output of the simulation unit of the transformer 11 (BMT) of the simulation unit of the second side of the multi-terminal direct current transmission 6 (BM2S) is the second three-phase input / output of the device.

The third three-pole input / output of the block of the switching node 10 (BKU) is connected to the second three-pole input / output of the second block modeling of the direct current line 9 (2БМЛПТ).

The first three-pole input / output of the second DC line simulator 9 (2БМЛПТ) is connected to the three-pole input / output of the DC circuit simulator 16 (БМЦПТ) of the third-party simulator for multi-terminal direct current transmission 7 (БМ3С).

The first three-phase input / output of the transformer simulation unit 11 (BMT) of the third-party simulation unit of multi-terminal direct current transmission 7 (BMZS) is the third three-phase input / output of the device.

The neutrals of the filter simulation block 13 (BMF) and the DC circuit simulation block 16 (BMCPT) of the simulation blocks of the first 5 (BM1S), second 6 (BM2S) and third 7 (BM3C) sides of the multi-terminal direct current transmission are interconnected and connected to the neutrals of the first a block for modeling a line of direct current 8 (1БМЛПТ) and a second block for modeling a line of direct current 9 (2БМЛПТ).

The analog inputs of the multi-channel analog-to-digital conversion unit 4 (BMACP) are connected to the first 8 (1БМЛПТ) and second 9 (2БМЛПТ) DC line simulation blocks, as well as to the transformer modeling block 11 (BMT), and the reactor modeling block 12 (BMR) , with a filter simulation block 13 (BMF), a DC circuit simulation block 16 (BMCPT), simulation blocks of the first 5 (BM1C), second 6 (BM2C) and third 7 (BM3C) sides of the multi-terminal direct current transmission.

The block of simulation of transformer 11 (BMT) (Fig. 2) contains a block of modeling phase A 17 (BMfAT), a block of modeling phase B 18 (BMfVT), a block of modeling phase C 19 (BMfST) of the transformer, a block of voltage generation 20 (BFN), the second 21 (BTsPrK2), third 22 (BTsPrK3) and fourth 23 (BTsPrK4) digitally-controlled longitudinal switching units, first 24 (BTsPoK1), second 25 (BTsPoK2), third 26 (BTsPoK3) digitally controlled transverse switching units and first 27 (PNT1), second 28 (PNT2), third 29 (PNT3), fourth 30 (PNT4), fifth 31 (PNT5), sixth 32 (PNT6), seventh 33 (PNT7), eighth 34 (PNT8), nine th 35 (PNT9) voltage-current converters.

The digital inputs of the phase simulation block A 17 (BMfAT), the phase simulation block B 18 (BMfVT), the phase simulation block C 19 (BMfST) of the transformer are connected to the central processor 1 (CPU).

Digital inputs of voltage generating unit 20 (BFN), second 21 (BTsPrK2), third 22 (BTsPrK3) and fourth 23 (BTsPrK4) digitally-controlled longitudinal switching units and the first 24 (BTsPoK1), second 25 (BTsPoK2), third 26 (BTsPoK2) blocks digitally controlled lateral switching connected to switching processor 2 (PC).

The analog outputs of the A 17 phase modeling unit (BMFAT) of the transformer are connected to the inputs of the first 27 (PNT1), second 28 (PNT2), third 29 (PNT3) voltage-current converters and with the inputs of the multi-channel analog-to-digital conversion 4 (BMACP).

The analog outputs of the phase B 18 modeling unit (BMfVT) of the transformer are connected to the inputs of the fourth 30 (PNT4), fifth 31 (PNT5), sixth 32 (PNT6) voltage-current converters and with the inputs of the multi-channel analog-to-digital conversion 4 (BMACP).

The analog outputs of the C 19 phase modeling unit (BMfST) of the transformer are connected to the inputs of the seventh 33 (PNT7), eighth 34 (PNT8), ninth 35 (PNT9) voltage-current converters and with the inputs of the multi-channel analog-to-digital conversion 4 (BMACP).

The analog inputs of phase A 17 modeling block (BMfAT), phase B 18 modeling block (BMfVT) and transformer phase C 19 modeling block (BMfST), and connected to the outputs of voltage generating block 20 (BFN), the same outputs of which are connected to the block inputs multi-channel analog-to-digital conversion 4 (BMACP).

The outputs of the first 27 (PNT1), fourth 30 (PNT4) and seventh 33 (PNT7) voltage-current converters are connected to the first three-phase input / output of the second block of digitally controlled longitudinal switching 21 (BTsPrK2), with three-phase input / output of the first block of digitally controlled lateral switching 24 (BTsPoK1) and with the block of formation of stresses 20 (BFN).

The second three-phase input / output of the second block of digitally-controlled longitudinal switching 21 (BTsPrK2) is the first three-phase input / output of the simulation block of transformer 11 (BMT).

The outputs of the second 28 (PNT2), fifth 31 (PNT5) and eighth 34 (PNT8) voltage-current converters are connected to the first three-phase input / output of the third block of digitally controlled longitudinal switching 22 (BTsPrK3), with three-phase input / output of the second block of digitally controlled transverse switching 25 (BTsPoK2) and with the block of formation of stresses 20 (BFN).

The second three-phase input / output of the third digitally-controlled longitudinal switching unit 22 (BTsPrK3), which is the second three-phase input / output of the transformer simulation block 11 (BMT), is connected to the first three-phase input / output of the reactor simulation block 12 (BMR) and to the first three-phase input / output the first block of digitally-controlled longitudinal switching 14 (BTsPrK1).

The outputs of the third 29 (PNT3), sixth 32 (PNT6) and ninth 35 (PNT9) voltage-current converters are connected to the first three-phase input / output of the fourth block of digitally controlled longitudinal switching 23 (BTsPrK4), with three-phase input / output of the third block of digitally controlled lateral switching 26 (BTsPoK3) and with the block of formation of stresses 20 (BFN).

The second three-phase input / output of the fourth block of digitally controlled longitudinal switching 23 (BTsPrK4), which is the third three-phase input / output of the transformer simulation block 11 (BMT), is connected to the three-phase input / output of the filter simulation block 13 (BMF) and to the second three-phase input / output the first block of digitally-controlled longitudinal switching 14 (BTsPrK1).

Reactor modeling block 12 (BMR) (Fig. 3) contains phase A 36 modeling block (BMfAR), phase B 37 modeling block (BMfVR), phase C 38 modeling block (BMfSR) of the reactor, fourth 39 (BCPoK4) and 40 (BTsPoK5) ) the fifth blocks of digitally controlled transverse switching, and the tenth 41 (PNT10), eleventh 42 (PNT11), twelfth 43 (PNT12), thirteenth 44 (PNT13), fourteenth 45 (PNT14), fifteenth 46 (PNT15) voltage-current converters.

The digital inputs of the A 36 phase modeling block (BMfAR), the B 37 phase modeling block (BMfVR) and the C 38 phase modeling block (BMfSR) are connected to the central processor 1 (CPU).

The digital inputs of the fourth 39 (BTsPoK4) and fifth fifth (BTsPoK5) digitally controlled transverse switching units and are connected to switching processor 2 (PC).

The analog outputs of the A 36 phase modeling unit (BMfAR) of the reactor are connected to the inputs of the tenth 41 (PNT10) and eleventh 42 (PNT11) voltage-current converters, with the inputs of the multi-channel analog-to-digital conversion 4 (BMACP).

The analog outputs of the phase B modeling unit 37 (BMfVR) of the reactor are connected to the inputs of the twelfth 43 (PNT12) and thirteenth 44 (PNT13) voltage-current converters, with the inputs of the multi-channel analog-to-digital conversion 4 (BMACP).

The analog outputs of the C 38 phase modeling unit (BMfSR) of the reactor are connected to the inputs of the fourteenth 45 (PNT14) and fifteenth 46 (PNT15) voltage-current converters, with the inputs of the multi-channel analog-to-digital conversion unit 4 (BMACP).

The output of the tenth voltage-current converter 41 (PNT10) is connected to phase A of the three-phase input / output of the fourth block of digitally controlled transverse switching 39 (BTsPok4), with phase A of the second three-phase input / output of the third block of digitally controlled longitudinal switching 22 (BTsPrK3), with phase A of the first three-phase input / output of the first block of digitally-controlled longitudinal switching 14 (BTsPrK1) and with a phase modeling block A 36 (BMfAR) of the reactor.

The output of the twelfth voltage-current converter 43 (PNT12) is connected to phase B of the three-phase input / output of the fourth block of digitally controlled transverse switching 39 (BTsPoK4), with phase B of the second three-phase input / output of the third block of digitally controlled longitudinal switching 22 (BTsPrK3), with phase B of the first three-phase input / output of the first block of digitally-controlled longitudinal switching 14 (BTsPrK1) and with a phase modeling block B 37 (BMfVR) of the reactor.

The output of the fourteenth voltage-current converter 45 (PNT14) is connected to phase C of the three-phase input / output of the fourth block of digitally controlled transverse switching 39 (BTsPoK4), with phase C of the second three-phase input / output of the third block of digitally controlled longitudinal switching 22 (BTsPrK3), with phase C of the first three-phase input / output of the first block of digitally-controlled longitudinal switching 14 (BTsPrK1) and with a phase modeling block C 38 (BMfSR) of the reactor.

The output of the eleventh voltage-current converter 42 (PNT11) is connected to phase A of the three-phase input / output of the fifth block of digitally controlled transverse switching 40 (BTsPOK5), with phase A of the three-phase input / output of the simulation module of the static voltage converter 15 (BMSPN) and to the phase A simulation block reactor 36 (BMfAR).

The output of the thirteenth voltage-current converter 44 (PNT13) is connected to the phase B of the three-phase input / output of the fifth block of digitally controlled transverse switching 40 (BTsPOK5), with the phase B of the three-phase input / output of the simulation block of the static voltage converter 15 (BMSPN) and to the phase B modeling block Reactor 37 (BMfVR).

The output of the fifteenth voltage-current converter 46 (PNT15) is connected to the phase C of the three-phase input / output of the fifth block of digitally controlled transverse switching 40 (BTsPOK5), with the phase C of the three-phase input / output of the simulation block of the static voltage converter 15 (BMSPN) and to the phase C modeling block Reactor 38 (BMfSR).

Filter modeling block 13 (BMF) (Fig. 4) contains phase A modeling block 47 (BMfAF), phase B modeling block 48 (BMfVF), filter phase modeling block C 49 (BMfSF) and sixteenth 50 (PNT16), seventeenth 51 ( PNT17), eighteenth 52 (PNT18) voltage-current converters.

The digital inputs of phase A 47 modeling block (BMfAF), phase B modeling block 48 (BMfVF), and phase C modeling block 49 (BMfSF) of the filter are connected to central processing unit 1 (CPU).

The analog outputs of the phase A 47 modeling block (BMfAF) of the filter are connected to the input of the sixteenth voltage-current converter 50 (PNT16) and to the inputs of the multi-channel analog-to-digital conversion 4 (BMACP).

The analog outputs of the phase B modeling block 48 (BMfVF) of the filter are connected to the input of the seventeenth voltage-current converter 51 (PNT17) and to the inputs of the multi-channel analog-to-digital conversion 4 (BMACP).

The analog outputs of the phase modeling block C 49 (BMFSF) of the filter are connected to the input of the eighteenth voltage-current converter 52 (PNT18) and to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMACP).

The output of the sixteenth voltage-current converter 50 (PNT16) is connected to the phase A modeling block 47 (BMfAF) of the filter with phase A of the second three-phase input / output of the fourth block of digitally controlled longitudinal switching 23 (BTsPrK4), and with phase A of the second three-phase input / output of the first block digitally-controlled longitudinal switching 14 (BTsPrK1).

The output of the seventeenth voltage-current converter 51 (PNT17) is connected to a phase B modeling unit 48 (BMfVF) of the filter, with a phase B of the second three-phase input / output of the fourth digitally-controlled longitudinal switching block 23 (BTsPrK4), and with phase B of the second three-phase input / output of the first block of digitally-controlled longitudinal switching 14 (BTsPrK1).

The output of the eighteenth voltage-current converter 52 (PNT18) is connected to a phase C 49 modeling unit (BMfSF) of the filter, with phase C of the second three-phase input / output of the fourth block of digitally controlled longitudinal switching 23 (BTsPrK4), and with phase C of the second three-phase input / output of the first block of digitally-controlled longitudinal switching 14 (BTsPrK1).

The block of modeling the static voltage converter 15 (BMPSN) (Fig. 5) contains the block of modeling phase A of the static voltage converter 53 (BMfASPN), the block of modeling phase B of the static voltage converter 54 (BMfVSPN), the block of modeling phase C of the static voltage converter 55 (BMfSSPN) , each of which contains six blocks of digitally controlled analog keys 56 (BTsAK1), 57 (BTsAK2), 58 (BTsAK3), 59 (BTsAK4), 60 (BTsAK5), 61 (BTsAK6).

The control inputs of all blocks of digitally controlled analog keys 56 (BTsAK1), 57 (BTsAK2), 58 (BTsAK3), 59 (BTsAK4), 60 (BTsAK5), 61 (BTsAK6). the phase modeling blocks A, B and C of the static voltage converter 53 (BMfASPN), 54 (BMfVSPN), 55 (BMfSSPN) are connected to switching processor 2 (PC).

The first 56 (BTsAK1) and second 57 (BTsAK2) blocks of digital-controlled analog keys with the first inputs / outputs are connected to each other and to the phase A simulation unit of reactor 36 (BMfAR), phase A of the three-phase input / output of the fifth block of digitally controlled transverse switching 40 (BTsPOK5) and the output of the eleventh voltage-current converter 42 (PNT11).

The phase B simulation block of the static voltage converter 54 (BMfVSPN) is connected to the phase B simulation block of the reactor 37 (BMfVR), the phase B of the three-phase input / output of the fifth block of digitally controlled transverse switching 40 (BTsPoK5) and the output of the thirteenth voltage-current converter 44 (PNT13).

The phase C simulation block of the static voltage converter 55 (BMfSSPN) is connected to the phase C simulation block of reactor 38 (BMfSR), the phase C of the three-phase input / output of the fifth block of digitally controlled transverse switching 40 (BTsPoK5) and the output of the fifteenth voltage-current converter 46 (PNT15).

The second input / output of the first block of digitally controlled analog keys 56 (BTsAK1) is connected to the interconnected first inputs / outputs of the third 58 (BTsAK3) and fourth 59 (BTsAK4) blocks of digitally controlled analog keys.

The second input / output of the second block of digitally controlled analog keys 57 (BTsAK2) is connected to interconnected first inputs / outputs of the fifth 60 (BTsAK5) and sixth 61 (BTsAK6) blocks of digitally controlled analog keys.

The second input / output of the third block of digitally controlled analog switches 58 (BTsAK3), the positive poles of the three-pole inputs / outputs of the phase B 54 simulation blocks (BMfVSPN) and phase C 55 (BMfSSPN) of the static voltage converter and the DC circuit simulation block 16 (BMCPT) are connected between by myself.

The second inputs / outputs of the fourth 59 (BTsAK4) and sixth 61 (BTsAK6) blocks of digital-controlled analog keys, neutral three-pole inputs / outputs of the simulation blocks of phase B 54 (BMfVSPN) and phase C 55 (BMfSSPN) of the static voltage converter and simulation module of the DC circuit 16 (BMCPT) are interconnected.

The second input / output of the fifth block of digitally controlled analog switches 60 (BTsAK5), the negative poles of the three-pole inputs / outputs of the phase B 54 simulation modules (BMfVSPN) and phase C 55 (BMfSSPN) of the static voltage converter and the DC circuit simulation block 16 (BMCPT) are connected between by myself.

The DC circuit simulation block 16 (BMCPT) (Fig. 6) contains the positive pole modeling block 62 (BMPP), the negative pole modeling block 63 (BMOS), the neutral voltage generation block 64 (BFNN), the fifth 65 (BTsPrK5) and the sixth 66 (BTsPrK6) digitally-controlled longitudinal switching units, sixth 67 (BTsPoK6) and seventh 68 (BTsPoK7) digitally controlled lateral switching units, nineteenth 69 (PNT19), twentieth 70 (PNT20), twenty-first 71 (PNT21), twenty-second 72 (PNT22,) twenty-third 73 (PNT23) and twenty-fourth 74 (PNT24) voltage converters ix-current.

The digital inputs of the positive pole modeling block 62 (BMPP), the negative pole modeling block 63 (BMOS), the neutral voltage generating block 64 (BPSF) are connected to the central processor 1 (CPU).

The digital inputs of the fifth 65 (BTsPrK5) and sixth 66 (BTsPrK6) of digitally controlled longitudinal switching units and sixth 67 (BTsPoK6) and seventh 68 (BTsPrK6) of digitally controlled lateral switching units and are connected to switching processor 2 (PC).

The analog outputs of the positive pole modeling unit 62 (BMPP) are connected to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMATsP) and to the inputs of the nineteenth 69 (PNT19) and twentieth 70 (PNT20) voltage-current converters.

The analog outputs of the negative pole modeling unit 63 (BMOS) are connected to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMATsP) and to the inputs of the twenty-first 71 (PNT21) and twenty-second 72 (PNT22) voltage-current converters.

The analog outputs of the neutral voltage generating unit 64 (BFNN) are connected to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMACP) and to the inputs of the twenty-third 73 (PNT23) and twenty-fourth 74 (PNT24) voltage-current converters.

The output of the nineteenth voltage-current converter 69 (PNT19) is connected to each other by a positive pole modeling block 62 (BMPP), a positive pole of the first three-pole input / output of the fifth block of digitally-controlled longitudinal switching 65 (BTsPrK5) and a positive pole of three-pole input / output of the sixth block of digital-controlled transverse switching 67 (BTsPoK6).

The output of the twenty-first voltage-current converter 71 (PNT21) is connected to the interconnected negative pole modeling block 63 (BMOS), the negative pole of the first three-pole input / output of the fifth block of digitally controlled longitudinal switching 65 (BTsPrK5) and the negative pole of the three-pole input / output of the sixth block digitally controlled lateral switching 67 (BTsPoK6).

The output of the twenty-third voltage-current converter 73 (PNT23) is connected to each other by a neutral voltage generating unit 64 (BFNN), a neutral of the first three-pole input / output of the fifth block of digitally controlled longitudinal switching 65 (BTsPrK5) and a neutral of three-pole input / output of the sixth block of digitally controlled transverse switching 67 (BTsPoK6).

The second three-phase input / output of the fifth block of digitally-controlled longitudinal switching 65 (BTsPrK5) is the first three-phase input / output of the simulation block of the DC circuit 16 (BMCPT). The positive pole of the second three-pole input / output of the fifth block of digitally-controlled longitudinal switching 65 (BTsPrK5) is connected to the second input / output of the third block of digital-controlled analog switches 58 (BTsAK3) and with the positive poles of the three-pole inputs / outputs of phase B 54 modeling blocks (BMfVSPN) and phase C 55 (BMfSSPN) static voltage converter. The negative pole of the second three-pole input / output of the fifth block of digitally controlled longitudinal switching 65 (BTsPrK5) is connected to the second input / output of the fifth block of digitally controlled analog switches 60 (BTsAK5) and to the negative poles of the three-pole inputs / outputs of phase B 54 (BMfVSPN) modeling blocks and phase C 55 (BMfSSPN) static voltage converter. The neutral of the second three-pole input / output of the fifth block of digitally-controlled longitudinal switching 65 (BTsPrK5) is connected to the interconnected second inputs / outputs of the fourth 59 (BTsAK4) and the sixth 61 (BTsAK6) blocks of digital-controlled analog switches, to the neutrals of three-pole inputs / outputs of phase B simulation blocks 54 (BMfVSPN) and phase C 55 (BMfSSPN) of the static voltage converter.

The output of the twentieth voltage-current converter 70 (PNT20) is connected to each other by a positive pole modeling block 62 (BMPP), a positive pole of the first three-pole input / output of the sixth block of digitally-controlled longitudinal switching 66 (BTsPrK6) and a positive pole of three-pole input / output of the seventh block of digital-controlled transverse switching 68 (BTsPoK7).

The output of the twenty-second voltage-current converter 72 (PNT22) is connected to the interconnected negative pole modeling block 63 (BMOS), the negative pole of the first three-pole input / output of the sixth digital-controlled longitudinal switching unit 66 (BTsPrK6) and the negative pole of the three-pole input / output of the seventh block digital transverse switching 68 (BTsPoK7).

The output of the twenty-fourth voltage-current converter 74 (PNT24) is connected to each other by a neutral voltage generating unit 64 (BFNN), a neutral of the first three-pole input / output of the sixth block of digitally controlled longitudinal switching 66 (BTsPrK6) and a neutral of three-pole input / output of the seventh block of digitally controlled transverse switching 68 (BTsPoK7).

The second three-pole input / output of the sixth block of digitally-controlled longitudinal switching 66 (BTsPrK6) is the second three-phase input / output of the block of simulation of direct current circuit 16 (BMTSPT).

In the simulation unit of the first side of the multi-terminal direct current transmission 5 (BM1S), the second three-pole input / output of the sixth block of digitally-controlled longitudinal switching 66 (BTsPrK6) of the simulation module of the direct current circuit 16 (BMCPT) is connected to the first three-pole input / output of the first block of simulation of the direct current line 8 (1BMLPT).

The second three-pole input / output of the sixth block of digitally controlled longitudinal switching 66 (BTsPrK6) of the DC simulation circuit block 16 (BMCPT) of the DC multi-terminal transmission side 5 (BM1C) is connected through the switching unit to the second three-pole input / output of the first DC line simulation block 8 (1БМЛПТ) and the second three-pole input / output of the second DC line modeling block 9 (2БМЛПТ).

In the third-party simulation block of multi-terminal direct current transmission 7 (BM3S), the second three-pole input / output of the sixth digital-controlled longitudinal switching unit 66 (BTsPrK6) of the direct-current circuit simulation block 16 (BMCPT) is connected to the first three-pole input / output of the second DC-link modeling block 9 (2БМЛПТ).

The first 8 (1БМЛПТ) and second 9 (2БМЛПТ) DC line modeling blocks are the same and each contains (Fig. 7) a block for modeling the beginning of the first DC line 75 (БМн1ЛПТ), a block for modeling the end of the first DC line 76 (БМн1ЛПТ), block simulation of the beginning of the second direct current line 77 (BMn2LPT), the modeling unit of the end of the second direct current line 78 (BMk1LPT), the first neutral voltage generating unit, 79 (1БФНН), the second neutral voltage generating unit, 80 (2БФННП), the seventh digitally-controlled longitudinal switching unit 81 (BTsPrK7), eighth 82 (BTsPoK8), ninth 83 (BTsPoK9), tenth 84 (BTsPoK10), eleventh 85 (BTsPoK11) digitally controlled transverse switching units, twenty-fifth 86 (PNT25), twenty-sixth 87 (PNT26), twenty-seventh 88 (PNT27), twenty-eighth 89 (PNT28), twenty-ninth 90 (PNT29), thirtieth 91 (PNT30), thirty-first 92 (PNT31), thirty-second 93 (PNT32), thirty-third 94 (PNT33), thirty-fourth 95 ( PNT34), thirty-fifth 96 (PNT35), thirty-sixth 97 (PNT36) voltage-current converters.

The digital inputs of the modeling unit for the beginning of the first direct current line 75 (BMn1LPT), the modeling unit for the end of the first direct current line 76 (BMk1LPT), the modeling unit for the beginning of the second direct current line 77 (BMn1LPT), the modeling unit for the end of the second direct current line 78 (BMk1LPT), the first block of the formation of neutral voltage 79 (1BFNN), the second block of the formation of voltage neutral 80 (2BFNNP) are connected to the Central processor 1 (CPU).

The digital inputs of the seventh digitally-controlled longitudinal switching unit 81 (BTsPrK7), the eighth 82 (BTsPoK8), the ninth 83 (BTsPoK9), the tenth 84 (BTsPoK10) and the eleventh 85 (BTsPoK11) of the digitally controlled transverse switching units are connected to the switching processor 2 (PC).

The analog outputs of the modeling unit for the beginning of the first DC line 75 (BMn1LPT) are connected to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMACP) and to the inputs of the twenty-fifth 86 (PNT25) and twenty-sixth 87 (PNT26) voltage-current converters.

The analog outputs of the modeling unit for the end of the first DC line 76 (BMk1LPT) are connected to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMATsP) and to the inputs of the twenty-seventh 88 (PNT27) and twenty-eighth 89 (PNT28) voltage-current converters.

The analog outputs of the simulation block of the beginning of the second DC line 77 (BMn2LPT) are connected to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMATsP) and to the inputs of the twenty-ninth 90 (PNT29) and the thirty-ninth 91 (PNT30) voltage-current converters.

The analog outputs of the modeling unit for the end of the second DC line 78 (BMk2LPT) are connected to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMACP) and to the inputs of the thirty-first 92 (PNT31) and thirty-second 93 (PNT32) voltage-current converters.

The analog outputs of the first neutral voltage generating unit 79 (1BFNN) are connected to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMACP) and to the inputs of the thirty-third 94 (PNT33) and thirty-fourth 95 (PNT34) voltage-current converters.

The analog outputs of the second neutral voltage generating unit 80 (2БФННП) are connected to the inputs of the multi-channel analog-to-digital conversion unit 4 (BMACP) and to the inputs of the thirty-fifth 96 (PNT35) and thirty-sixth 97 (PNT36) voltage-current converters.

The output of the twenty-fifth voltage-current converter 86 (PNT25) is connected to the interconnected simulation block of the beginning of the first direct current line 75 (BMn1LPT), the positive pole of the three-pole input / output of the eighth block of digitally controlled lateral switching 82 (BTsPoK8), the positive pole of the second three-pole input / the output of the sixth block of digitally controlled longitudinal switching 66 (BTsPrK6).

The output of the twenty-ninth voltage-current converter 90 (PNT29) is connected to the interconnected simulation block of the beginning of the second direct current line 75 (BMn1LPT), the negative pole of the three-pole input / output of the eighth block of digitally controlled transverse switching 82 (BTsPoK8), the negative pole of the second three-pole input / the output of the sixth block of digitally controlled longitudinal switching 66 (BTsPrK6).

The output of the thirty-third voltage-current converter 94 (PNT33) is connected to the first neutral voltage generating unit 79 (1BFNN), interconnected by a three-pole input / output neutral of the eighth block of digitally controlled transverse switching 82 (BTsPoK8), by the neutral of the second three-pole input / output of the sixth digital-controlled block longitudinal switching 66 (BTsPrK6).

The output of the twenty-sixth voltage-current converter 87 (PNT26) is connected to the interconnected simulation block of the beginning of the first direct current line 75 (BMn1LPT), the positive pole of the first three-pole input / output of the seventh digitally-controlled longitudinal switching block 81 (BTsPrK7) and the positive pole of the three-pole input / the output of the ninth block of digitally controlled transverse switching 83 (BTsPoK9).

The output of the thirtieth voltage-current converter 91 (PNT30) is connected to the interconnected simulation block of the beginning of the second direct current line 77 (BMn2LPT), the negative pole of the first three-pole input / output of the seventh digitally-controlled longitudinal switching block 81 (BTsPrK7) and the negative pole of the three-pole input / output the ninth block of digitally controlled transverse switching 83 (BTsPoK9).

The output of the thirty-fourth voltage-current converter 95 (PNT34) is connected to each other by the first neutral direction forming unit 79 (1БФНН), the neutral of the first three-pole input / output of the seventh digitally-controlled longitudinal switching unit 81 (BTsPrK7) and the neutral of the three-pole input / output of the ninth digital-controlled block transverse switching 83 (BTsPoK9).

The output of the twenty-seventh voltage-current converter 88 (PNT27) is connected to the interconnected simulation block of the end of the first direct current line 76 (BMk1LPT), the positive pole of the second three-pole input / output of the seventh block of digitally controlled longitudinal switching 81 (BTsPrK7) and the positive pole of the three-pole input / output of the tenth block of digitally controlled transverse switching 84 (BTsPoK10).

The output of the thirty-first voltage-current converter 82 (PNT31) is connected to the interconnected simulation block of the end of the second direct current line 78 (BMk2LPT), the negative pole of the second three-pole input / output of the seventh digitally-controlled longitudinal switching block 81 (BTsPrK7) and the negative pole of the three-pole input / output of the tenth block of digitally controlled transverse switching 84 (BTsPoK10).

The output of the thirty-fifth voltage-current converter 96 (PNT35) is connected to each other by a second neutral direction forming unit 80 (2BFNN), a second three-pole input / output neutral of the seventh digitally-controlled longitudinal switching unit 81 (BTsPrK7), and a three-pole input / output neutral of the tenth digital-controlled block lateral switching 84 (BTsPOK10).

The output of the twenty-eighth voltage-current converter 89 (PNT28) is connected to the interconnected simulation block of the end of the first direct current line 76 (BMk1LPT), the positive pole of the three-pole input / output of the eleventh block of digitally controlled transverse switching 85 (BTsPoK11) and the positive pole of the three-pole input / output unit switching node 10 (BKU).

The output of the thirty-second voltage-current converter 93 (PNT32) is connected to the interconnected simulation block of the end of the second DC line 78 (BMk2LPT), to the negative pole of the three-pole input / output of the eleventh block of digitally controlled transverse switching 85 (BTsPoK11) and to the negative pole of the three-pole input / output block switching node 10 (BKU).

The output of the thirty-sixth voltage-current converter 97 (PNT36) is connected to each other by a second neutral direction forming unit 80 (2БФНН), a three-pole input / output neutral of the eleventh digitally controlled lateral switching unit 85 (BTsPoK11), and a three-pole input / output block of a switching unit 10 neutral (BKU).

Central processing unit 1 (CPU), switching processor 2 (PC) and analog-to-digital conversion processor 3 (PACP) are implemented using serial integrated circuits. The block of multi-channel analog-to-digital conversion 2 (BMACP) is implemented using serial integrated analog-to-digital converters.

Digitally-controlled longitudinal switching units 14 (BTsPrK1), 21 (BTsPrK2), 22 (BTsPrK3), 23 (BTsPrK4), 65 (BTsPrK5), 66 (BTsPrK6), 81 (BTsPrK7), digitally-guided lateral switching blocks 24 (BTsPrK7) (25, BTspo BTsPoK2), 26 (BTsPoK3), 39 (BTsPoK4), 40 (BTsPoK5), 67 (BTsPoK6), 68 (BTsPoK7), 82 (BTsPoK8), 83 (BTsPoK9), 84 (BTsPoK10), 85 (BTsPoK10, 11) analog keys 56 (BTsAK1), 57 (BTsAK2), 58 (BTsAK3), 59 (BTsAK4), 60 (BTsAK5), 61 (BTsAK6) and the block of switching unit 10 (BTsU) are implemented using serial integrated circuits of digitally controlled unipolar analog keys. The voltage forming unit 20 (BFN) is implemented using serial integrated circuits of digitally controlled unipolar analog keys and operational amplifiers. All voltage-current converters 27 (PNT1), 28 (PNT2), 29 (PNT3), 30 (PNT4), 31 (PNT5), 32 (PNT6), 36 (PNT7), 34 (PNT8), 35 (PNT9), 41 (PNT10), 42 (PNT11), 43 (PNT12), 44 (PNT13), 45 (PNT14), 46 (PNT15), 50 (PNT16), 51 (PNT17), 54 (PNT18), 57 (PNT19), 70 (PNT20), 71 (PNT21), 72 (PNT22), 73 (PNT23), 74 (PNT24), 86 (PNT25), 87 (PNT26), 88 (PNT27), 89 (PNT28), 90 (PNT29), 91 (PNT30), 92 (PNT31), 93 (PNT32), 94 (PNT33), 95 (PNT34), 96 (PNT35), 97 (PNT36) are implemented using serial integrated circuits performing this function.

Phase A 17 modeling block (BMfAT), phase B 18 modeling block (BMfVT) and transformer phase C 19 modeling block (BMfST), phase A 36 modeling block (BMfAR), phase B 37 modeling block (BMfVR), and C modeling block 38 (BMfSR) reactor, phase A 47 modeling block (BMfAF), phase B modeling block 48 (BMfVF) and filter phase 49 modeling block (BMfSF), positive pole modeling block 62 (BMPF), negative pole modeling block 63 (BMOS ), the block of formation of neutral voltage 64 (BFNN), the block of modeling the beginning of the first line of constant current 75 (BMn1LPT), modeling unit for the end of the first direct current line 76 (BMk1LPT), modeling unit for the beginning of the second direct current line 77 (BMn2LPT), modeling unit for the end of the second direct current line 78 (BMk1LPT), the first neutral voltage generating unit 79 ( 1BFNN), the second neutral voltage generating unit 80 (2BFNN) is implemented using serial integrated microelectronic digital-to-analog converters and operational amplifiers.

A device for simulating direct current transmission in power systems works as follows.

When turning on the supply voltage from the database of the central processor 1 (CPU) or from the database of a personal computer / server, digital codes corresponding to the parameters of the solved systems of differential equations of three-phase mathematical models in the simulation block of transformer 11 (BMT), in the simulation block of reactor 12 (BMR) , in the filter simulation block 13 (BMF), in the DC circuit simulation block 16 (BMCPT) of the simulation blocks of the first 5 (BM1C), second 6 (BM2C) and third 7 (BM3C) sides of the multi-terminal transmission of constant t ka, as well as in the first block for simulating a direct current line 8 (1БМЛПТ) and in the second block for simulating a direct current line 9 (2БМЛПТ) are transferred and written to the memory registers of digital-to-analog converters of the block for modeling the phase A 17 (BMfAT), block for modeling the phase В 18 (BMfVT) and phase modeling block C 19 (BMfST) of the transformer, phase A 36 modeling block (BMfAR), phase B 37 modeling block (BMfVR) and phase C 38 modeling block (BMfSR) reactor, phase A 47 modeling block (BMfAF ), a phase modeling block B 48 (BMfVF) and a block m simulating the phase C 49 (BMFSF) filter, the positive and negative pole modeling blocks 62 (BMPP) and 63 (BMOS), the neutral voltage generating block 64 (BFNN), and also into the memory registers of digital-to-analog converters of the modeling block of the beginning of the first DC line 75 (BMn1LPT), modeling unit for the end of the first direct current line 76 (BMk1LPT), modeling unit for the beginning of the second direct current line 77 (BMn2LPT), modeling unit for the end of the second direct current line 78 (BMk1LPT).

At the same time, from the database of switching processor 2 (PC), the corresponding digital codes are sent to the transformer simulation block 11 (BMT), to the reactor simulation block 12 (BMR), to the DC circuit simulation blocks 16 (BMCPT) of the first 5 simulation blocks (BM1S) ), the second 6 (BM2S) and third 7 (BM3S) sides of multi-terminal direct current transmission, as well as the first 8 (1БМЛПТ) and second 9 (2БМЛПТ) DC line simulation blocks for the control inputs of digital-controlled analog keys of digital-controlled longitudinal switching blocks 11 ( ЦПрК1), 18 (БЦПрК2), 19 (БЦПрК3), 20 (БЦПрК4), 62 (БЦПрК5), 63 (БЦПрК6), 78 (БЦПрК7) digitally controlled lateral switching units 21 (BTsPoK1), 22 (BTsPoK2), 23 (BTsPoK2) 23 , 36 (BTsPoK4), 37 (BTsPoK5), 64 (BTsPoK6), 65 (BTsPoK7), 79 (BTsPoK8), 80 (BTsPoK9), 81 (BTsPoK10), 82 (BTsPoK11) and switching unit 10 (BKU), determining their condition.

Similarly, the digital codes generated in switching processor 2 (PC) according to the control algorithm are fed to the simulation module of the static voltage converter 15 (BMSPN) to the control inputs of the digital-controlled analog keys of all blocks of the digital-controlled analog keys 56 (BTsAK1), 57 (BTsAK2), 58 (BTsAK3), 59 (BTsAK4), 60 (BTsAK5), 61 (BTsAK6) of the phase A simulation block of the static voltage converter 53 (BMfASPN) and the same phase simulation blocks of phase B 54 (BMfVSPN) and phase C 55 (BMfSSPN) of the static voltage converter .

This ensures the implementation of various longitudinal and transverse three-phase switching, including phase-by-phase, inputs / outputs of simulated structural elements and devices for simulating direct current transmission in energy systems as a whole at a model physical level.

Depending on the on or off state of the digitally-controlled analog keys of the first digitally-controlled longitudinal switching unit 14 (BTsPrK1), the filter simulation module 13 (BMF) is connected to the secondary or tertiary winding of the transformer simulation module 11 (BMT) depending on the type of communication transformer being modeled (double winding or triple winding).

Depending on the on or off state of the digitally-controlled analog keys of the seventh block of the digitally-controlled longitudinal switching 81 (BTsPrK7), as well as changes in the parameters of the modeling unit for the beginning of the first direct current line 75 (BMn1LPT), the modeling unit for the end of the first direct current line 76 (BMk1LPT), the modeling unit the beginning of the second direct current line 77 (BMn2LPT), the modeling unit of the end of the second direct current line 78 (BMk2LPT) provides the reproduction of various emergency modes on the direct current line current.

Thus, the connection of the simulated structural elements of the device for simulating the transmission of direct current in energy systems to each other and the initial position of all blocks and the device as a whole is provided.

From the database of the switching processor 2 (PC), the corresponding digital codes are supplied to the control inputs of the digitally-controlled analog keys of the voltage generation unit 20 (BFN).

Thus, at the outputs of the voltage generating unit 20 (BFN), the neutral voltage generating unit 64 (BFNN), the first neutral voltage generating unit 79 (1БФНН) and the second neutral voltage generating unit 80 (2БФННП) according to the equations of the formation of linear and phase voltages, and voltage neutrals corresponding mathematical variables of voltages are formed, which through the multichannel analog-to-digital conversion unit 4 (BMACP) enter the central processor 1 (CPU) and through a computer network to a personal computer /server.

Phase A 17 modeling block (BMfAT), phase B 18 phase modeling block (BMfVT) and transformer phase C 19 modeling block (BMfST), phase A 36 modeling block (BMfAR), phase B 37 modeling block (BMfVT) and phase modeling block C 38 (BMfSR) reactor, phase A 47 modeling block (BMfAF), B 48 phase modeling block (BMfVF) and C 49 phase modeling block (BMfSF), positive and negative pole modeling blocks 62 (BMPF) and 63 (BMOS) , and a neutral voltage generating unit 64 (BFNN), a modeling unit for the start of the first direct current line 75 (BMn1LPT), modeling unit for the end of the first direct current line 76 (BMk1LPT), modeling unit for the beginning of the second direct current line 77 (BMn2LPT), modeling unit for the end of the second direct current line 78 (BMk1LPT) first neutral voltage generating unit 79 (1БФНН), the second block of neutral voltage formation 80 (2BFNNP) are parallel digital-to-analog implicit structures with a guaranteed instrumental error of continuous real-time integration of three-phase differential equation systems Sgiach models of these structural elements of the device.

At the output of phase A 17 modeling block (BMfAT), phase B 18 modeling block (BMfVT) and phase C 19 modeling block (BMfST) transformer, phase A 36 modeling block (BMfAR), phase B 37 modeling block (BMfVR) and modeling block phase C 38 (BMfSR) reactor, phase A 47 modeling block (BMfAF), phase B 48 modeling block (BMfVF) and filter phase 49 modeling block (BMfSF), as a result of solving systems of differential equations of three-phase mathematical models of device structural elements, mathematical variables ase currents which are represented by continuous stress changes.

Using the first 27 (PNT1), second 28 (PNT2), third 29 (PNT3), fourth 30 (PNT4), fifth 31 (PNT5), sixth 32 (PNT6), seventh 33 (PNT7), eighth 34 (PNT8), ninth 35 (PNT9), tenth 41 (PNT10), eleventh 42 (PNT11), twelfth 43 (PNT12), thirteenth 44 (PNT13), fourteenth 45 (PNT14), fifteenth 46 (PNT15), sixteenth 50 (PNT16), seventeenth 51 (PNT17) and eighteenth 52 (PNT18) voltage-current converters, these mathematical variables of phase currents are converted into their corresponding model physical currents.

At the output of the positive and negative pole modeling blocks 62 (BMPP) and 63 (BMOS), the neutral voltage generation block 64 (BFNN), the first DC line start modeling block 75 (BMn1LPT), the first DC line end modeling block 76 (BMk1LPT) , a modeling block for the beginning of the second direct current line 77 (BMn2LPT), a modeling block for the end of the second direct current line 78 (BMk1LPT), the first neutral voltage generating unit 79 (1БФНН), the second neutral voltage generating unit 80 (2БФННП) as a result of As the systems of differential equations of three-phase mathematical models of the structural elements of the device are formed, mathematical variables of currents of poles and neutrals, which are represented by continuous changes in voltage.

Using nineteenth 69 (PNT19), twentieth 70 (PNT20), twenty first 81 (PNT21), twenty second 72 (PNT22), twenty third 73 (PNT23), twenty fourth 74 (PNT24), twenty fifth 86 (PNT25), twenty sixth 87 (PNT26), twenty-seventh 88 (PNT27), twenty-eighth 89 (PNT28), twenty-ninth 90 (PNT29), thirty-ninth 91 (PNT30), thirty-first 92 (PNT31), thirty-second 93 (PNT32), thirty-third 94 (PNT33), thirty-fourth 95 (PNT34), thirty-fifth 96 (PNT35), thirty-sixth 97 (PNT36) voltage-current converters are these mathematical variables of pole currents and the neutrals are converted to their corresponding model physical currents.

At the outputs of the first 27 (PNT1), second 28 (PNT2), third 29 (PNT3), fourth 30 (PNT4), fifth 31 (PNT5), sixth 32 (PNT6), seventh 33 (PNT7), eighth 34 (PNT8), ninth 35 (PNT9), tenth 41 (PNT10), eleventh 42 (PNT11), twelfth 43 (PNT12), thirteenth 44 (PNT13), fourteenth 45 (PNT14), fifteenth 46 (PNT15), sixteenth 50 (PNT16), seventeenth 51 (PNT17), eighteenth 52 (PNT18), nineteenth 69 (PNT19), twentieth 70 (PNT20), twenty first 71 (PNT21), twenty second 72 (PNT22), twenty third 73 (PNT23), twenty fourth 74 (PNT24), twenty fifth 86 (PNT25), twenty shes addition 87 (PNT26), twenty-seventh 88 (PNT27), twenty-eighth 89 (PNT28), twenty-ninth 90 (PNT29), thirty-ninth 91 (PNT30), thirty-first 92 (PNT31), thirty-second 93 (PNT32), thirty-third 94 (PNT33), thirty-fourth 95 (PNT34), thirty-fifth 96 (PNT35), thirty-sixth 97 (PNT36) voltage-current converters, the corresponding variables determined by these currents are formed in the form of nodal voltages, which are fed through the feedback channels to the corresponding blocks:

- from the first 27 (PNT1), second 28 (PNT2), third 29 (PNT3), fourth 30 (PNT4), fifth 31 (PNT5), sixth 32 (PNT6), seventh 33 (PNT7), eighth 34 (PNT8), ninth 35 (PNT9) voltage-current converters to the voltage generating unit 20 (BFN) (figure 2);

- from the tenth 41 (PNT10), eleventh 42 (PNT11) voltage-current converters to the phase modeling block A 36 (BMfAR) of the reactor (Fig. 3);

- from the twelfth 43 (PNT12), thirteenth 44 (PNT13) voltage-current converters to the phase modeling unit B 37 (BMfVR) of the reactor;

- from the twelfth fourteenth 45 (PNT14), fifteenth 46 (PNT15) of the voltage-current converter to the phase simulation block C 38 (BMfSR) of the reactor;

- from the sixteenth voltage-current converter 50 (PNT16) to the phase simulation block A 47 (BMfAF) of the filter (Fig. 4);

- from the seventeenth voltage-current converter 51 (PNT17) to the phase modeling block B 48 (BMfVF) of the filter;

- from the eighteenth voltage-current converter 522 (PNT18) to the phase simulation block C 49 (BMfSF) of the filter;

- from the nineteenth 69 (PNT19), twentieth 70 (PNT20) voltage-current converters to the positive pole modeling block 62 (BMPP) (Fig. 6);

- from the twenty-first 71 (PNT21), twenty-second 72 (PNT22) voltage-current converters to the negative pole modeling block 63 (BMOS);

- from the twenty-third 73 (PNT23), the twenty-fourth 74 (PNT24) of the voltage-current converter to the neutral voltage generating unit 64 (BFNN);

- from the twenty-fifth 86 (PNT25), twenty-sixth 87 (PNT26) voltage-current converters to the simulation unit of the beginning of the first direct current line 75 (BMn1LPT) (Fig. 7);

- from the twenty-seventh 88 (PNT27), twenty-eighth 89 (PNT28) voltage-current converters to the modeling unit for the end of the first direct current line 76 (BMk1LPT);

- from the twenty-ninth 90 (PNT29), thirtieth 91 (PNT30) voltage-current converters to the simulation block of the beginning of the second DC line 77 (BMn2LPT);

from the thirty-first 92 (PNT31), thirty-second 93 (PNT32) voltage-current converters to the modeling unit of the end of the second DC line 78 (BMk1LPT);

- from the thirty-third 94 (PNT33), thirty-fourth 95 (PNT34) voltage-current converters to the first block of neutral voltage generation 79 (1BFNN);

- from the thirty-fifth 96 (PNT35), thirty-sixth 97 (PNT36) voltage-current converters to the second block of neutral voltage formation 80 (2БФННП).

Formed at the outputs of the first 27 (PNT1), fourth 30 (PNT4), seventh 33 (PNT7) voltage-current converters in the form of nodal voltages are fed to the first block of digitally controlled transverse switching 24 (BTsPok1) and to the second block of digitally controlled longitudinal switching 21 (BTsprk2 ), one of the three-phase inputs / outputs of which is the first three-phase input / output of the device (Fig. 2). From the output of the second 28 (PNT2) converter, the voltage-current variable in the form of a node voltage is supplied to the second block of digitally controlled transverse switching 25 (BTsPok2) and through the third block of digitally controlled longitudinal switching 22 (BTsPrK3) to the first block of digitally controlled longitudinal switching 14 (BTsPrK1), the input of the phase A modeling block of reactor 36 (BMfAR), to the fourth block of digitally controlled transverse switching 39 (BTsPoK4) and to the output of the tenth 41 (PNT10) voltage-current converter. The voltage-current variable generated at the output of the fifth 31 (PNT5) converter in the form of a node voltage is supplied to the second block of digitally controlled transverse switching 25 (BTsPok2) and through the third block of digitally controlled longitudinal switching 22 (BTsPrK3) to the first block of digitally controlled longitudinal switching 14 (BTsrk1), to the input of the phase B simulation unit of reactor 37 (BMfVR), to the fourth block of digitally controlled lateral switching 39 (BTsPoK4) and to the output of the twelfth 43 (PNT12) voltage-current converter. From the output of the eighth 34 (PNT8) converter, the voltage-current variable in the form of a node voltage is supplied to the second block of digitally controlled transverse switching 25 (BTsPok2) and through the third block of digitally controlled longitudinal switching 22 (BTsPrK3) to the first block of digitally controlled longitudinal switching 14 (BTsPrK1), the input of the phase B modeling unit of reactor 38 (BMfSR), to the fourth digitally controlled lateral switching unit 39 (BTsPoK4) and to the output of the fourteenth 45 (PNT14) voltage-current converter. The voltage-current variable generated at the output of the third 29 (PNT3) converter in the form of a node voltage is supplied to the third block of digitally controlled transverse switching 26 (BTsPok3) and through the fourth block of digitally controlled longitudinal switching 23 (BTsPrK4) to the first block of digitally controlled longitudinal switching 14 (BTsrk1), to the input of the phase A simulation block of filter 47 (BMfAF) and to the output of the sixteenth 50 (PNT16) voltage-current converter. From the output of the sixth 32 (PNT6) converter, the voltage-current variable in the form of a node voltage is supplied to the third block of digitally controlled transverse switching 26 (BTsPok3), to the first block of digitally controlled longitudinal switching 14 (BTsPrK1) and through the fourth block of digitally controlled longitudinal switching 23 (BTsPrK4) to the input of the phase B simulation block of the filter 48 (BMfVF) and to the output of the seventeenth 51 (PNT17) voltage-current converter. The voltage-current variable generated at the output of the ninth 35 (PNT9) converter in the form of a node voltage is supplied to the third block of digitally controlled transverse switching 26 (BTsPok3), to the first block of digitally controlled longitudinal switching 14 (BTsPrK1) and through the fourth block of digitally controlled longitudinal switching 23 (BTsrkK4) to the input of the phase simulation block of the C filter 48 (BMfSF) and to the output of the eighteenth 52 (PNT17) voltage-current converter. From the outputs of the tenth 41 (PNT10), twelfth 43 (PNT12), fourteenth 45 (PNT14) voltage-current converters, the variables in the form of nodal voltages are fed to the first block of digitally controlled longitudinal switching 14 (BTsPrK1), to the third block of digitally controlled longitudinal switching 22 (BTsPrK3) and into the fourth block of digitally controlled lateral switching 39 (BTsPoK4) (Fig. 3). The voltage-current variable generated at the output of the eleventh 42 (PNT11) converter in the form of a node voltage is supplied to the fifth block of digitally controlled transverse switching 40 (BTsPOK5) and to the first inputs / outputs of the first 56 (BTsAK1) and second 57 (BTsAK2) blocks of digitally controlled analog keys. From the output of the thirteenth 44 (PNT13) converter, the voltage-current variable in the form of a node voltage is supplied to the fifth block of digitally controlled transverse switching 40 (BTsPoK5) and to the phase B simulation unit of the static voltage converter 54 (BMfVSPN). Formed at the output of the fifteenth 46 (PNT15) converter, the voltage-current variable in the form of a node voltage is supplied to the fifth block of digitally controlled transverse switching 40 (BTsPOK5) and to the phase modeling unit C of the static voltage converter 55 (BMfSSPN). From the outputs of the sixteenth 50 (PNT16), seventeenth 51 (PNT17), eighteenth 52 (PNT18) voltage-current converters, the variables in the form of nodal voltages are supplied to the first block of digitally controlled longitudinal switching 15 (BTsPrK1) and to the fourth block of digitally controlled longitudinal switching 23 (BTsprk4) (Fig. 4). The voltage-current variable generated at the output of the nineteenth 69 (PNT19) converter in the form of a node voltage is supplied to the sixth block of digitally controlled transverse switching 67 (BTsPOK6) and through the fifth block of digitally controlled longitudinal switching 65 (BTsPrK5) to the second input / output of the third 58 (BTsAK3) block digital-controlled analog keys and into the simulation blocks of phase B 54 (BMfVSPN) and phase C 55 (BMfSSPN) of the static voltage converter (Fig. 6). From the output of the twenty-first 71 (PNT21) converter, the voltage-current variable in the form of a node voltage is supplied to the sixth block of digitally controlled transverse switching 67 (BTsPOK6) and through the fifth block of digitally controlled longitudinal switching 65 (BTsPrK5) to the second input / output of the fifth 60 (BTsAK3) block digital-controlled analog keys and into the simulation blocks of phase B 54 (BMfVSPN) and phase C 55 (BMfSSPN) of a static voltage converter. The voltage-current variable generated at the output of the twenty-third 73 (PNT23) converter in the form of a node voltage is supplied to the sixth block of digitally controlled transverse switching 67 (BTsPOK6) and through the fifth block of digitally controlled longitudinal switching 65 (BTsPrK5) to the second inputs / outputs of the fourth 59 (BTsAK4) and the sixth 61 (BTsAK6) blocks of digital-controlled analog switches and into blocks for modeling the phase B 54 (BMfVSPN) and phase C 55 (BMfSSPN) of the static voltage converter. From the output of the twentieth 70 (PNT20) voltage-current converter of the DC circuit simulation block 16 (BMCPT) of the first 5 (BM1C) and third 7 (BM3C) sides of the multi-terminal direct current transmission, the variable in the form of a node voltage is supplied to the seventh digital-controlled transverse switching unit 68 ( BTsPoK7) and through the sixth block of digitally controlled longitudinal switching 66 (BTsPrK6) to the block for modeling the beginning of the first direct current line 75 (BMn1LPT), to the eighth block of digitally controlled transverse switching 82 (BTsPoK8) and to the output of the twenty fifth 86 (PNT25 ) voltage-current converter. Formed at the output of the twentieth 70 (PNT20) voltage-current converter of the DC circuit simulation block 16 (BMCPT) of the second side of the multi-terminal direct current transmission 6 (BM2S), the variable in the form of a node voltage is supplied to the seventh digitally controlled transverse switching unit 68 (BTsPoK7) and through the sixth digitally-controlled longitudinal switching unit 66 (BTsPrK6) to the switching unit unit 10 (BKU). From the output of the twenty-first 72 (PNT22) voltage-current converter of the DC simulation circuit block 16 (BMTSPT) of the first 5 (BM1S) and third 7 (BM3S) sides of the multi-terminal direct current transmission, the variable in the form of a node voltage is supplied to the seventh digital-controlled transverse switching unit 68 (BTsPoK7) and through the sixth block of digitally controlled longitudinal switching 66 (BTsPrK6) to the block for modeling the beginning of the second direct current line 77 (BMn2LPT), to the eighth block of digitally controlled transverse switching 82 (BTsPoK8) and to the output of twenty-ninth about 90 (PNT29) voltage-current converter. Formed on the output of the twenty-first 72 (PNT22) voltage-current converter of the DC simulation circuit block 16 (BMCPT) of the second side of the multi-terminal direct current transmission 6 (BM2S), the variable in the form of a node voltage is supplied to the seventh digitally controlled transverse switching unit 68 (BTsPoK7) and through the sixth block of digitally controlled longitudinal switching 66 (BTsPrK6) in the block of the switching node 10 (BKU). From the output of the twenty-fourth 74 (PNT24) voltage-current converter of the DC simulation circuit block 16 (BMCPT) of the first 5 (BM1S) and third 7 (BM3C) sides of the multi-terminal direct current transmission, the variable in the form of a node voltage is supplied to the seventh digital-controlled transverse switching unit 68 (BTsPoK7) and through the sixth block of digitally controlled longitudinal switching 66 (BTsPrK6) to the first block of neutral voltage formation 79 (1BFNN), to the eighth block of digitally controlled transverse switching 82 (BTsPoK8) and to the output of the thirty-third 94 (PNT33) reobrazovatelya-voltage current. Formed on the output of the twenty-fourth 74 (PNT24) voltage-current converter of the DC circuit simulation unit 16 (BMCPT) of the second side of the multi-terminal direct current transmission 6 (BM2S) is supplied to the seventh digitally controlled lateral switching unit 68 (BTsPOK7) and through the sixth digitally-controlled longitudinal switching unit 66 (BTsPrK6) to the block of the switching node 10 (BKU). From the outputs of the twenty-fifth 86 (PNT25), twenty-ninth 90 (PNT29), thirty-third 94 (PNT33) voltage-current converters in the form of node voltages are fed into the eighth block of digitally controlled lateral switching 82 (BTsPoK8) and the sixth block of digitally controlled longitudinal switching 66 ( BTsPrK6) (Fig. 7). Formed at the outputs of the twenty-sixth 87 (PNT26), thirtieth 91 (PNT30), thirty-sixth 95 (PNT34) voltage-current converters in the form of node voltages are supplied to the ninth block of digitally controlled lateral switching 84 (BTsPoK9) and to the seventh block of digitally controlled longitudinal switching 82 (BTsPrK7). From the outputs of the twenty-seventh 88 (PNT27), thirty-first 92 (PNT31), thirty-fifth 96 (PNT35) voltage-current converters in the form of node voltages are supplied to the tenth block of digitally controlled transverse switching 84 (BTsPoK10) and to the seventh block of digitally controlled longitudinal switching 81 (BTsPrK7). Formed at the outputs of the twenty-eighth 89 (PNT28), thirty-second 93 (PNT32), thirty-sixth 97 (PNT36) voltage-current converters in the form of node voltages are fed to the eleventh block of digitally controlled transverse switching 85 (BTsPo11) and to the block of switching node 10 ( BKU).

All generated mathematical variables of phase currents and mathematical variables of currents of poles, as well as those obtained as a result of solving systems of differential equations of three-phase mathematical models of structural elements of the device at the output of phase simulation blocks A, B and C of transformer 17 (BMfAT), 18 (BMfVT), 19 ( BMfST) - mathematical variables of the main magnetic flux and the magnetization current of the phases of the transformer; at the output of phase modeling blocks A, B and C of reactor 36 (BMfAR), 37 (BMfVR), 38 (BMfSR), phase modeling blocks A, B and C of filter 47 (BMfAF), 48 (BMfVF), 49 (BMfSF) - mathematical variables of phase voltages; at the output of the positive and negative pole modeling blocks 62 (BMPP) and 63 (BMOS), the modeling units for the beginning of the first direct current line 75 (BMn1LPT), the modeling units for the end of the first direct current line 76 (BMk1LPT), the modeling units for the beginning of the second direct current line 77 (BMn2LPT), modeling units for the end of the second DC line 78 (BMk1LPT) mathematical variables of the voltage of the poles; at the output of the neutral voltage generating unit 64 (BFNN), the first neutral voltage generating unit 79 (1 BFNN), the second neutral voltage generating unit 80 (2БФНН) - the mathematical variables of the neutral voltage are supplied to the multi-channel analog-to-digital conversion unit 4 (BMACP).

The mathematical variables of phase voltages generated at the output of the voltage generation unit 20 (BFN) are supplied to the multi-channel analog-to-digital conversion unit 4 (BMACP).

All received data from the multi-channel analog-to-digital conversion unit 4 (BMACP) is sent to the switching processor 2 (PC) and through the central processor 1 (CPU) is sent to a personal computer / server.

The static voltage converter simulation block 15 (BMSPN) implements the model physical structure of the three-level static voltage converter circuit by means of digital-controlled analog keys with equivalent circuits for reproducing power semiconductor keys of all digital-controlled analog switch blocks 56 (BTsAK1), 57 (BTsAK2), 58 (BTsAK3), 59 (BTsAK4), 60 (BTsAK5), 61 (BTsAK6), converting a three-phase voltage into a three-level DC voltage by means of switching implemented in the processor 2 (PC) pulse-width control digital-controlled analog keys of these blocks.

In the phase modeling block A 17 (BMfAT), phase modeling block B 18 (BMfVT) and phase modeling block C 19 (BMfST) of the transformer, mathematical models of these phases are determined, which are determined by a system of differential equations of the form:

where j = A, B, C is the phase of the transformer;

i = 1, 2, 3 - number of the transformer winding;

U _Tji - voltage of the j-th phase of the i-th winding of the transformer,

which is formed in the voltage generating unit 20 (BFN) in the form of linear or phase voltages depending on the winding connection scheme;

i _Tji - current of the j-th phase of the i-th transformer winding;

W _Tji - the number of turns of the j-th phase of the i-th transformer winding;

Ф _Tj is the value of the main magnetic flux of the j-th phase of the transformer;

L _Tji - dissipation inductance of the j-th phase of the i-th transformer winding;

R _Tji - active resistance of the j-th phase of the i-th transformer winding;

F _Tjμ is the magnetizing force of the j-th phase of the transformer of the electromagnetic system of the transformer, determined by the equation of balance of the magnetizing forces;

i _Tjμ - magnetization current of the j-th phase of the transformer.

Similarly, in the simulation blocks of the reactor 12 (BMR), the filter 13 (BMF), the direct current circuit 16 (BMCPT), the first 8 (1БМЛПТ) and the second 9 (2БМЛПТ) simulation blocks of the direct current line, mathematical models of these structural elements defined equivalent circuits for each phase / pole and corresponding systems of differential equations that fully and reliably describe a continuous spectrum of significant processes in the above-mentioned elements of the device.

In the phase modeling block A 36 (BMfAR), phase modeling block B 37 (BMfVR) and phase modeling block C 38 (BMfSR) of the reactor, the following differential equation corresponding to the equivalent circuit is solved (Fig. 8):

where j = A, B, C is the phase of the reactor;

U _Rj1 and U _Rj2 are the voltages at the input / output of the _equivalent circuit of the jth phase of the reactor;

i _Rj is the current of the jth phase of the reactor;

R _Rj and L _Rj - resistance and dissipation inductance of the winding of the j-th phase of the reactor.

In the phase A modeling block 47 (BMfAF), phase B modeling block 48 (BMfVF) and the phase modeling block C 49 (BMfSF) of the filter, the following system of equations corresponding to the equivalent circuit is solved (Fig. 9):

where j = A, B, C is the filter phase;

U _Fj is the voltage of the jth phase of the filter;

i _Fj is the current of the jth phase of the filter;

U _FjC is the voltage across the capacitor of the j-th phase of the filter;

R _FjC and C _Fj - active and reactive component of the resistance of the capacitor of the j-th phase of the filter;

i _FjR - current in the branch of the resistor of the j-th phase of the filter;

R _Fj is the resistance value of the resistor of the j-th phase of the filter;

U _FjR is the voltage across the resistor of the j-th phase of the filter;

i _FjL is the current in the branch of the inductance of the j-th phase of the filter;

R _FjL and L _Fj - active resistance and dissipation inductance of the coil of the j-th phase of the filter;

U _N is the neutral voltage.

In the positive pole modeling block 62 (BMPP) and the negative pole modeling block 63 (BMOS), the following system of equations is solved corresponding to the equivalent circuit of one of the poles of the direct current circuit, which includes capacitor banks, a direct current filter, and a smoothing reactor (Fig. 10 ):

where j is the positive and negative pole of the DC circuit;

U _j1 and U _j2 - voltage at the input / output circuit of the equivalent circuit of the positive and negative poles;

i _j1 and i _j2 - input / output currents of the equivalent circuit of the positive and negative poles;

i _{CB_DCj} and i _{F_DCj} - currents in the branches of the capacitor bank and DC filter;

R _{CB_DCj} , R _{F_DCj} and C _{CB_DCj} , C _{F_DCj} - active and reactive components of the resistances of the capacitor bank and DC filter capacitor;

U _{CB_DCj} , D _{F_DCj} - voltage on the capacitor bank and the capacitor of the DC filter;

R _{R_DCj} and L _{R_DCj} - resistance and dissipation inductance of the winding of the smoothing reactor;

U _N is the neutral voltage.

In the block for modeling the beginning and end of the first direct current line 75 (BMn1LPT) and 76 (BMk1LPT), the block for modeling the beginning and end of the second direct current line 77 (BMn1LPT) and 78 (BMk1LPT) for reproducing and analyzing the influence of oscillations (spectral composition) in the line direct current, the following system of equations is solved, corresponding to the equivalent circuit (Fig. 11):

where j is the negative or positive pole;

U _j1 and U _j2 are the voltages at the input / output of the equivalent circuit of the j-th pole of the direct current line;

U _{j1 2} - voltage at the intermediate point of the equivalent circuit of the j-th pole of the DC line;

R _{DC_Ljl} , R _{DC_Lj2} and L _{DC_Ljl} , L _{DC_Lj2} - active resistance and inductance of the j-th pole of the DC line;

i _j1 and i _j2 - input / output currents of the equivalent circuit of the j-th pole of the direct current line;

- емкостная поперечная проводимость j-го полюса линии постоянного тока;

- capacitive transverse conductivity of the j-th pole of the DC line;

- активная поперечная проводимость j-го полюса линии постоянного тока;

- active transverse conductivity of the j-th pole of the direct current line;

i _Lj1 and i _Lj2 - capacitive current and leakage currents of the j-th pole of the direct current line;

U _N is the neutral voltage.

The coefficients of equations (1-5) are controlled and the neutral voltage values are set using digital-to-analog converters above the indicated blocks through the central processor 1 (CPU).

Thus, the proposed device for simulating direct current transmission in energy systems provides reproduction of a single continuous spectrum of quasi-steady-state and transient processes in real time and on an unlimited time interval in direct current transmission and its structural elements under various normal, emergency and post-emergency operation modes, and also automated and automatic control, including functional, by their parameters.

Claims (1)

A device for simulating multi-terminal DC transmission in power systems, comprising a first-side multi-terminal DC transmission modeling unit (5), a second-side multi-terminal DC transmission modeling unit (6) and a third-side modeling unit for multi-terminal DC transmission (7), each of which contains the transformer simulation unit (11), the static voltage converter simulation unit (15), which is connected to the circuit simulation unit direct current (16), and in the simulation unit of the first side of the multi-terminal direct current transmission (5), the DC circuit simulation unit (16) is connected to the first DC-line modeling unit (8), in the third-side modeling unit of the multi-terminal direct current transmission (7) ) the DC circuit simulation block (16) is connected to the second DC line simulation block (9), while the first (8) and second (9) DC line simulation blocks are performed identically, one input / output of each block simulation of the transformer (11) is the input / output of the device, and the neutrals of all the DC simulation circuit blocks (16) are interconnected, characterized in that in the simulation blocks of the first (5), second (6) and third (7) sides of the multi-terminal transmission DC transformer simulation unit (11) is connected to the first digitally-controlled longitudinal switching unit (14), to the filter simulation unit (13), to the reactor simulation unit (12), which is connected to the simulation unit of the static voltage converter (15), and the first block of digitally controlled longitudinal switching (14) is connected to the reactor simulation block (12), to the filter simulation block (13); the neutrals of each filter simulation block (13), the direct current circuit simulation block (16), the first (8) and second (9) DC line simulation blocks are interconnected; in the simulation unit of the second side of the multi-terminal direct current transmission (6), the DC circuit simulation unit (16) is connected to the switching unit unit (10), which is connected to the first (8) and second (9) DC line simulation units, each of which contains a block for modeling the beginning of the first direct current line (75), which is connected to the first (86) and second (87) voltage-current converters, and a block for modeling the end of the first direct current line (76) is connected to the third (88) and fourth (89) ) voltage transducers IE-current, the modeling unit for the beginning of the second DC line (77) is connected to the fifth (90) and sixth (91) voltage-current converters, the modeling unit for the end of the second DC line (78) is connected to the seventh (92) and eighth (93) ) voltage-current converters, while the first neutral voltage generating unit (79) is connected to the ninth (94) and tenth (95) voltage-current converters, and the second neutral voltage generating unit (80) is connected to the eleventh (96) and twelfth ( 97) voltage-current converters; the output of the first voltage-current converter (86) is connected to the interconnected input of the simulation block of the beginning of the first direct current line (75), the input / output of the first block of digitally controlled transverse switching (82) and the input / output of the simulation block of the DC circuit (16); the output of the fifth voltage-current converter (90) is connected to the interconnected input of the simulation block of the beginning of the second DC line (77), the input / output of the first block of digitally controlled transverse switching (82) and the input / output of the simulation block of the DC circuit (16); the output of the ninth voltage-current converter (94) is connected to the interconnected input of the first neutral voltage generating unit (79), the input / output of the first digitally controlled transverse switching unit (82) and the input / output of the DC circuit simulation unit (16); the output of the second voltage-current converter (87) is connected to the interconnected input of the simulation block of the beginning of the first direct current line (75), the input / output of the second block of digitally controlled longitudinal switching (81) and the input / output of the second block of digitally controlled transverse switching (83); the output of the sixth voltage-current converter (91) is connected to the interconnected input of the simulation block of the beginning of the second DC line (77), the input / output of the second block of digitally controlled longitudinal switching (81) and the input / output of the second block of digitally controlled transverse switching (83); the output of the tenth voltage-current converter (95) is connected to the interconnected input of the neutral voltage generating unit (79), the input / output of the second block of digitally controlled longitudinal switching (81) and the input / output of the second block of digitally controlled transverse switching (83); the output of the third voltage-current converter (88) is connected to the interconnected input of the simulation block of the end of the first direct current line (76), the input / output of the second block of digitally controlled longitudinal switching (81) and the input / output of the third block of digitally controlled transverse switching (84); the output of the seventh voltage-current converter (92) is connected to the interconnected input of the modeling unit of the end of the second DC line (78), the input / output of the second block of digitally controlled longitudinal switching (81) and the input / output of the third block of digitally controlled transverse switching (84); the output of the eleventh voltage-current converter (96) is connected to the interconnected input of the neutral voltage generating unit (80), the input / output of the second block of digitally controlled longitudinal switching (81) and the input / output of the third block of digitally controlled transverse switching (84); the output of the fourth voltage-current converter (89) is connected to the interconnected input of the modeling unit of the end of the first direct current line (76), the input / output of the fourth block of digitally controlled transverse switching (85) and the input / output of the block of the switching unit (10); the output of the eighth voltage-current converter (93) is connected to the interconnected input of the modeling block of the end of the second DC line (78), the input / output of the fourth block of digitally controlled transverse switching (85) and the input / output of the block of the switching unit (10); the output of the twelfth voltage-current converter (97) is connected to the interconnected input of the neutral voltage generating unit (80), the input / output of the fourth block of digitally controlled transverse switching (85) and the input / output of the switching unit unit (10); the transformer simulation blocks (11), the reactor simulation blocks (12), the filter simulation blocks (13), the DC circuit simulation blocks (16), the first DC line start modeling block (75), the first DC line end simulation block (76), a modeling block for the beginning of the second DC line (77), a modeling block for the end of the second DC line (78), the first (79) and second (80) neutral voltage generating blocks are connected to the central processor (1), which is connected to computer / server, p a switching processor (2) and an analog-to-digital conversion processor (3), which is connected to a multi-channel analog-to-digital conversion unit (4), to which transformer simulation blocks (11), reactor simulation blocks (12), filter simulation blocks (13) are connected ), DC circuit simulation blocks (16), the first DC line start modeling block (75), the first DC line first end modeling block (76), the second DC line first end modeling block (76), the second l end modeling block direct current (78), first (79) and second (80) neutral voltage generation blocks, and transformer simulation blocks (11), reactor simulation blocks (12), static voltage converter simulation blocks (15), switching unit block (10 ), DC simulation blocks (16), the first (82), the second (83), the third (84) and the fourth (85) digitally controlled transverse commutation units, the first (14) and the second (81) digitally controlled longitudinal commutation units are connected to switching processor (2).

Images