RU1836808C - Movement-to-code converter - Google Patents

Description

The invention relates to automation and computer technology and can be used to automatically measure the angular position of an object.

The aim of the invention is to increase the accuracy of the converter.

Fig. 1 is a functional diagram of a motion to code converter.

The motion-to-code converter contains a pulse generator 1, a frequency divider 2, an inverter 3, triggers 4. 5, an AND 6 element, an I element block 7, amplifiers 8 and 9, a phase shifter 10, a filter 11, an adder 12. a comparator 13, an integrator 14 and voltage divider 15.

The converter operates as follows.

The pulse sequence from the output of the pulse generator 1 is fed to the input of the frequency divider 2, From the output of the high-order bit of the frequency divider 2, the pulses are fed to the counting input of the T-flip-flop 5 and through the inverter 3 to the counting input of the T-flip-flop 4. At the direct outputs of the T-flip-flops 4 and 5, two rectangular voltages are formed with a duty cycle of 2, 90 ° shifted in phase from each other and transmitted through amplifiers 8 and 9 to the input windings of the phase shifter 10. A phase modulated signal is generated at the output of the phase shifter 10

Ј (t) Uii 3irt () + H (t, a), (1) where Umi is the amplitude of the phase-modulated signal,

 f, f - voltage frequency at the direct outputs of T-flip-flops 4 and 5,

and the angle of rotation of the rotor, phase shifter 10,

n (t, а -} - part of the output signal of the phase shifter 10, due to higher harmonics and not carrying useful information,

t-time

At the output of the filter 11, a signal is generated:

Y (t) Um2 sln (-o) t + a +,), (2). where Um2 is the signal amplitude,

rf is the phase shift introduced by the filter 11.

When the voltage y (t) and the tripping voltage of the comparator 13 (Ucp) are equal, a short pulse is generated at its output.

This condition can be written as follows:

Um2 tcp + "+ Ucp (3) or

tcp- J} arcsin Ј-ah-f .. (4)

On the other hand, the tripping voltage can be defined as the voltage difference at the first Ui and second U2 inputs of the comparator 13: UCp Ui-U2. (5)

A voltage difference is generated at the output of the adder 12, and the integrator 14 suppresses the variable component and integrates the constant component of the voltage (5) to the point where the specified voltage difference does not become zero. Moreover, in accordance with the formula (4)

 + UV. (6)

Thus, the response time of the comparator does not depend on the amplitude of the signal at its input, as well as on factors leading to the final sensitivity

comparator (bias voltage, input currents, input current difference, etc.;), the pulse generated by the comparator 13 is fed to the control inputs of the element 16 AND and the block of elements And 7. In this case, the output

converter according to the information on the output. dah frequency divider 2 and the direct output of the T-trigger 5, arriving at the information. the inputs of the element And 6 and the block of elements And 7, a binary code is formed a ° ... a,

proportional to the angular position of the rotor of the phase shifter 10.

SUMMARY OF THE INVENTION Displacement transducer to .code containing a pulse generator, output

which is connected to the input of the frequency divider, the high-order output of which is connected to the input of the first trigger and through the inverter to the input of the second trigger, the direct outputs of the triggers through the first and second amplifiers are respectively connected to the first and second inputs of the phase shifter -, the output of which is connected through a filter with the first input of the comparator, element I. the block of elements I. characterized by

that, in order to increase accuracy, an adder, an integrator and a voltage divider are introduced into it, the first input of the adder is connected to the output of the filter, and the output is connected through an integrator

the voltage divider - with the second inputs of the adder and comparator, the output of which is connected1 to the control inputs of the element And and the block of elements I. The information inputs of which are connected to the outputs of the frequency divider, the information input of the element And is connected to the direct output of the first trigger, the outputs of the element And and the block And elements are outputs of the converter.