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KR960025898U - 50% duty odd cycle - Google Patents

50% duty odd cycle

Info

Publication number
KR960025898U
KR960025898U KR2019940034103U KR19940034103U KR960025898U KR 960025898 U KR960025898 U KR 960025898U KR 2019940034103 U KR2019940034103 U KR 2019940034103U KR 19940034103 U KR19940034103 U KR 19940034103U KR 960025898 U KR960025898 U KR 960025898U
Authority
KR
South Korea
Prior art keywords
duty
odd cycle
odd
cycle
duty odd
Prior art date
Application number
KR2019940034103U
Other languages
Korean (ko)
Other versions
KR200164990Y1 (en
Inventor
김만천
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to KR2019940034103U priority Critical patent/KR200164990Y1/en
Publication of KR960025898U publication Critical patent/KR960025898U/en
Application granted granted Critical
Publication of KR200164990Y1 publication Critical patent/KR200164990Y1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
    • H03K23/40—Gating or clocking signals applied to all stages, i.e. synchronous counters
    • H03K23/48—Gating or clocking signals applied to all stages, i.e. synchronous counters with a base or radix other than a power of two
    • H03K23/483—Gating or clocking signals applied to all stages, i.e. synchronous counters with a base or radix other than a power of two with a base which is an odd number
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K21/00—Details of pulse counters or frequency dividers
    • H03K21/02—Input circuits
    • H03K21/026—Input circuits comprising logic circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
    • H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
KR2019940034103U 1994-12-14 1994-12-14 50% duty odd frequency demultiplier KR200164990Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019940034103U KR200164990Y1 (en) 1994-12-14 1994-12-14 50% duty odd frequency demultiplier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019940034103U KR200164990Y1 (en) 1994-12-14 1994-12-14 50% duty odd frequency demultiplier

Publications (2)

Publication Number Publication Date
KR960025898U true KR960025898U (en) 1996-07-22
KR200164990Y1 KR200164990Y1 (en) 2000-01-15

Family

ID=19401392

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019940034103U KR200164990Y1 (en) 1994-12-14 1994-12-14 50% duty odd frequency demultiplier

Country Status (1)

Country Link
KR (1) KR200164990Y1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100486236B1 (en) * 1998-03-31 2005-06-16 삼성전자주식회사 Apparatus for generating frequency-divided signal by except radix 2
KR101292767B1 (en) * 2011-09-06 2013-08-02 동국대학교 산학협력단 Pass transistor and odd number frequency devider with 50% duty cycle including it

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100671749B1 (en) 2006-01-05 2007-01-19 삼성전자주식회사 Clock divider

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100486236B1 (en) * 1998-03-31 2005-06-16 삼성전자주식회사 Apparatus for generating frequency-divided signal by except radix 2
KR101292767B1 (en) * 2011-09-06 2013-08-02 동국대학교 산학협력단 Pass transistor and odd number frequency devider with 50% duty cycle including it

Also Published As

Publication number Publication date
KR200164990Y1 (en) 2000-01-15

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Legal Events

Date Code Title Description
N231 Notification of change of applicant
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20070928

Year of fee payment: 9

LAPS Lapse due to unpaid annual fee