KR820001669B1 - Switched-mode voltage converter - Google Patents

Abstract

In the DC voltage converter, typically used in monochrome or small colour TV receivers, the efficiency and responsecan be increased by having no feedback loop. The input voltage is chopped and fed through a transformer to a recfier and capacitor to give the output voltage. The frequency of the switching is made dependant upon the magnitude of the input voltage only, thus changes in input are followed with practically no delay. The frequency may be directly or inversely proprtional to voltage. It is advantageous if the ratio of on to off time in each cycle is constant at approx. 0.5.

Description

Switched Voltage Converter

1 is a circuit diagram of a known transducer which is not controlled.

2 is an equivalent circuit diagram of a known transducer.

3 is a waveform diagram of a known transducer.

4 is an output characteristic diagram of a known transducer.

5 is a control circuit diagram in series with a known transducer.

6 is an output characteristic diagram of a converter according to the present invention.

7 is a circuit diagram of an embodiment of a converter according to the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switch type converter for converting an input direct current voltage to an output direct current voltage. The present invention relates in particular to applying a periodic square wave signal whose amplitude depends on the input voltage to an inductive network combined with a rectifier and a smoothing capacity. A switch type converter having a generator for causing a smoothed voltage to appear across the capacitor in operation.

Such voltage converters are known from French Patent Application No. 2353591. In this known circuit, the pulse generator has a plurality of switches, whereby a square wave signal is applied to a series arrangement of chokes, transformer primary windings and separation capacitors. The output direct voltage of this circuit is obtained by rectifying the voltage appearing on the secondary side of the transformer. This output voltage is stabilized by pulse duration modulation on a control pulse that alternates the switch to the blocking and conducting state, with the duration of the pulse being dependent on the output signal to be controlled. The choke stores energy in part of this cycle and delivers energy in other parts, where voltage and peaks are suppressed.

The control scheme described above is rather expensive and it is necessary to add a comparator to the modulator that compares the voltage derived from the output signal with the reference voltage while the edges of the pulses must be sufficiently steep, so that the output voltage must be smoothed and Measures against high frequency radiation should be considered. Therefore, this control method is economically available only for devices requiring a constant supply power and having a somewhat high power consumption. This control, for example, applies to large color television receivers that are not portable.

The present invention is based on the recognition that, if a simple and consequently inexpensive control scheme is used, prior art transducers may be used without control of the pulse duration, and this control significantly improves efficiency. For this purpose, the switch type converter according to the present invention is characterized by having means for controlling the frequency of the sphere and the signal depending on the input DC voltage.

This control is forward control and its advantages are all known. In other words, it is known that the change in the input voltage is stable because it passes through inertia and the circuit has no feedback. This control is such that the frequency of the square wave signal is directly proportional to the input direct current voltage or the period of the square wave signal is decreased when the input DC voltage is increased and decreased when the input voltage is decreased, and the relative change in the period is much larger than the change in the input voltage. Can have characteristics.

In the latter case, the converter is characterized by the fact that the load is arranged in parallel with the smoothing capacitor, the smoothing voltage also being its output voltage and the current through the load being substantially constant.

In the former case and / or in the case where there is no change in the output current, the converter according to the present invention has a series control transistor arranged between a smoothing capacitor and a load, and an output voltage is shown across the load, and by the series control transistor. In fact, it is characterized in that it is kept constant. Known converters have low power consumption, so combining them with a serial control circuit is an excellent solution for the supply of medium power devices, ie devices consumed between about 30 and 60 W, for example large screen black and white television receivers and small color television receivers. Can present Due to the consumption of series controlled transistors, this combination is not economically suitable for high power applications.

In a preferred embodiment of the converter according to the present invention, the square wave signal has a given value for a period, and the time interval ratio is substantially constant and the power consumption is further reduced when the ratio is approximately 0.5.

Square wave signals can be generated by devices of tooth and threshold voltages, which are generated across a capacitor whose charge flows from a current source and which periodically discharges, and the charge current is connected to the input DC voltage. Flowing through the resistor, in the second case described above, for example, a fixed voltage element such as a zener diode is arranged in series with the resistor.

The invention will now be described by way of example and not limitation, with reference to the accompanying drawings.

The circuit of FIG. 1 is of known type. Two switching transistors Tr ₁ and Tr ₂ are arranged in series between the terminals of the DC voltage source V ₁ . Diodes D ₁ and D ₂ are arranged in parallel with the collector-emitter paths of each transistor Tr ₁ and Tr ₂ and in the opposite conducting direction with respect to the live transistor. In addition, the pulses generated by the oscillator 0SC are supplied to the base of the driving transistor Tr ₃ having an nPn type. The oscillator OSC and the transistor Tr ₃ are supplied with supply energy by the voltage source V ₁ . The primary winding Lp ₁ of the drive converter T ₁ is included in the collector line of the transistor Tr ₃ . The secondary windings LS ₁ and L's ₁ of the converter T ₁ are arranged between the emitter and the base of the transistors Tr ₁ and Tr ₂ , respectively, and the transistors Tr _{1 in} the winding direction of the windings. ) Alternately become the conduction state following the conduction state, while at the same time (Tr ₂ ) is alternately the conduction state after the interruption state. The voltage V ₁ is derived from the main power supply by the rectifier D ₃ and the smoothing capacitor C ₁ .

The emitter of transistor Tr ₁ and the collector of transistor Tr ₂ are interconnected. A series array of primary windings of the separation capacitor C, inductance L and transformer T ₂ is formed between the aggregation point A formed in this way and the negative terminal of the power supply V ₁ . One end of the secondary winding furnace Ls ₂ of the transformer T ₂ is connected to the anode of the rectifier D ₄ and the other end of the winding Ls ₂ is connected to the anode of the rectifier D ₅ . A load, which may be thought of as a smoothing capacitor C ₂ and a resistor R, is included between the connection points of the interconnected rectifiers D ₄ and D ₅ and the intermediate tap of the winding Ls ₂ . In operation, the direct current voltage V ₀ appears across the capacitor C ₂ and the load R and the direct current I ₀ flows through the load R. The negative terminal of the voltage source V ₀ may be connected to ground and may be connected to the negative terminal of the power supply V ₁ . However, if not connected in this way the converter (T ₂ ) will provide a DC separation between the ground and the main power source.

2 is an equivalent circuit diagram of the circuit of FIG. Here elements Tr ₁ , D ₁ and Tr ₂ , D ₂ have corresponded to two ideal switches S ₁ and S ₂ . In this way, point A alternates between potential 0 and potential V ₁ . It is assumed that the capacity of the capacitor C is infinitely large, and the transformer T ₂ and the inductance L are replaced by the parallel inductance L ₂ and the finite series inductance L ₁ having infinitely high values, and the transformer T The leakage current of ₂ ) is allowed as an inductance (L ₁ ). On the secondary side of the transformer (T ₂ ), the symmetrical form of the graze bridge rectifier circuit (D ₄ ), (D ' ₄ ), (D ₅ ), (D' ₅ ) is a full-wave rectifier (D ₄ ), By corresponding to (D ₅ ), the equivalent circuit of FIG. 2 is restored.

FIG. 3a systematically shows the change in voltage V _L across the inductance L ₂ as a function of time in a steady state, and FIG. 3b shows the change in current i passing through the inductance L _L on the same scale. It is shown as. Transistor T _r1 is conducted during the portion δT of the period T of the oscillator signal, while transistor T _r2 is conducted during the remaining portion 1-δ T of the period T. The voltage V _c across the capacitor C may be determined by a state in which no DC voltage appears across the inductance L ₂ . Therefore, a voltage with V _c = δV ₁ occurs in FIG. 3. The change in current i during one period T is represented by four associated straight lines, including the time transitions t ₁ and V _L for the zero crossing point of current i at the beginning of the period δT. The time shift t ₂ for the zero crossing of the current i at the beginning of the period (1-δ) T occurring for In this situation, the change in current i can be determined analytically, and (t ₁ ) and (t ₂ ) can be estimated as the function of voltages V ₁ and (V ₀ ) and the function of ratio δ. . Thus, the period δT-t ₁ + t ₂ while the rectifiers D ₄ and (D ' ₄ ) are conducting and the period (1-δ) Tt ₁ while the rectifiers D ₅ and (D' ₅ ) are conducting. Both sides of + t ₂ are equal to half of the period (T).

The direct current I _L which can flow through the inductance L ₂ without flowing through the capacitor C flows through the inductance L ₁ , and the current I _L is equal to the average value of the current i in FIG. 3b. .

임을 알았다. 여기서 (L₁)은 2제2도의 인덕턴스(L₁)의 값을 표시한다. 전류(I₀)는 제3b도의 전류(i)를 정류한 결과의 평균치와 같다.

I knew that. Where (L ₁ ) denotes the value of the inductance L _{1 of} the second degree. The current I ₀ is equal to the average value of the result of rectifying the current i of FIG. 3b.

In equation (1), if δ = 0.5, the current I _L becomes zero. In this case, there is no direct current flowing through the winding L _P2 of FIG. ₁ and therefore the loss of the transformer T ₂ is minimized. Equation (2) for the current I ₀ changes slightly when the ratio δ takes a value between 0.3 and 0.7. That is, the impact coefficients of the transistors T _r1 and T _r2 have a limited influence on the output current I ₀ in a large area around the value corresponding to the driving of the symmetrical transistors, respectively. Therefore, it can be seen that the operation of the circuit is appropriate when δ = 0.5. When δ = 0.5, the maximum value of current (i ₁ ) passing through rectifier (D ₄ ) and (D ' ₄ ) (see also FIG. 3b) is the maximum value (i ₂ ) or rectifier (D ₅ ) and (D' _5). Equals the current through In the period of time δT-t ₁ , the current i flows through the transistor T _r1 , and in the period of time t ₂ flows through the diode D ₂ , and the time (1-δ) ² Tt ₂ In the period of, it flows through the transistor T _r2 , and in the period of time t ₁ , it flows through the diode D ₁ .

Current I ₀ is the quadratic function of voltage V ₀ . This function is simply expressed as follows when δ = 0.5.

의 경우에는 전압(Vo)이 영이 된다.The function 3 is plotted in FIG. 4, in which (I ₀ ) changes along the horizontal axis of the coordinate system, while (V ₀ ) changes along the vertical axis. The curve obtained is a parabola with an axis of symmetry coinciding with the horizontal axis. This keeps I ₀ = 0 when loaded, resulting in Vo = 0.5V ₁ , while the short-circuit current value

In the case of, the voltage Vo is zero.

4 shows that at an input voltage that is kept constant, the output voltage changes from (V _O1 ) to (V _O2 ) when the output current varies between (I _O1 ) and (I _O2 ).

과 같다는 것을 유도할 수 있다. 이것은 내부저항이, (I_O)가 증가함에 따라 증가하고 단락회로 출력의 경우에는 무한히 커지는 것을 보인다. 비율 δ의 다른 값들의 경우에 유사한 결과가 얻어질 수 있음은 명백하다.In the formula (3), the internal resistance of the circuit

Can be derived from This shows that the internal resistance increases as (I _O ) increases and grows infinitely in the case of a short circuit output. It is clear that similar results can be obtained for other values of the ratio δ.

The dashed parabola of FIG. 4 shows the change in voltage V _O with respect to the value V ′ ₁ of voltage V ₁ larger than the value considered above. In the case where the input voltage varies between (V ₁ ) and (V ′ ₁ ), FIG. 4 shows that the output voltage changes between the varying output currents (V ′ _O1 ) and (V _O2 ). For use in many applications these changes are unacceptable and therefore require stabilization.

FIG. 5 shows the current transformer of FIG. 1 associated with a stabilization circuit and the same element being used with the same marking. A PnP type series transistor T _r4 whose internal resistance depends on the voltage V _O across the load and is controlled in a known manner is included between the capacitor C ₂ and the load R. For this purpose, the nPn transistor T _r5 forms a voltage derived from the voltage V _O by the voltage dividing resistors R ₁ and R ₂ as the model voltage of the zener diode D ₆ . At the same time, the collector current of transistor T _r5 , which is the base current of transistor T _r4 , depends on the difference between the compared voltages. The smoothing capacitor C ₃ is arranged in parallel with the load R, and in the same situation as FIG. 1, a current I _O substantially equal to that of FIG. 1 flows through the load R.

In the theoretical case where all devices are ideal and the ratio δ = 0.5, the circuit of FIG. 1 with no load consumes no power. If the series adjustment of FIG. 5 is used, a loss is incurred due to the voltage drop across the transistor T _r4 . In Fig. 4 this loss is kept to a minimum if the output characteristic is chosen to pass through point P, whereby I _Ov = I _O2 and V _Ov = V _O2 are maintained. Where (V _O2 ) is the substantially constant output voltage value and (I _O2 ) is the highest expected output voltage. In this respect the loss is zero.

In the case of a different output current, and in particular such a loss at the lowest output current (I _O1) is a constant input voltage (I _O1) when the expected is not zero, the output voltage in this case, still have a (V _O2), The voltage across capacitor C ₂ is equal to (V _O1 ). "If increased, I _O = I transistor in the case of _O2 (Tr ₄₎ the voltage drop across the V _O2 input voltage (V _1), of (V ₁₎ is equal to -V _O2 I _O = I _O1 of In this case, the voltage drop is equal to V _O1 '-V _O2 . This loss is therefore considerable.

이므로 Io₂₌0.37A가 된다. 결과적으로, 변압기 T₂의 변압비는

가 된다. L₁=0.9mH를 택하면

가 얻어지는데, 이것은 21.65KHz의 주파수에 해당한다.The foregoing may be described with reference to an example by a formula. A constant output voltage of 25 volts is required for output currents varying between 0.8 and 1.2 amps. In other words, assume that the power is 20 to 30 watts, the input voltage (V ₁ ) changes from 230 volts to 345 volts. For V ₁ = 230 V, select the primary currents of δ = 0.5 and Io ₂ = 0.5 Iomax. This follows equations (3) and (4), so the voltage at the primary side of transformer T ₂ is V ₂ = 0.353 × V ₁ = 81.2V,

Therefore, Io _{2 =} 0.37A. As a result, the transformer ratio of transformer T ₂ is

Becomes If L ₁ = 0.9mH

Is obtained, which corresponds to a frequency of 21.65 KHz.

Taking the output current at 0.8 amps, the primary current Io ₁ = 0.8 × 0.31 = 0.25A. Based on the parabola of FIG. 4, Vo ₁ = 93.9 V is obtained. Therefore, the circuit loss is (0.25 x 93.9) -20 = 3.5W.

이고 Vo₂는 140.9V이며 V_O1은 152.1볼트이다. 첫번째 경우에서 회로의 손실은 (140.9×0.74)-30=22.1왓트이고 두번째 경우에서는 (152.1×0.25)-20=18왓트이다. 위 사항으로 부터 회로의 효율이 불량하다는 것은 명백해진다. 단락전류 Io max는 입력전류의 증가에 따라 증가하며, 이는 트랜지스터(Tr₁) 및 (Tr₂)에 대한 많은 요구가 따르게 한다.The following results are known for the parabolic characteristics shown in FIG. 4 in dashed lines. In other words,

Vo ₂ is 140.9V and V _O1 is 152.1 volts. In the first case the loss of the circuit is (140.9 × 0.74) -30 = 22.1 watts and in the second case (152.1 × 0.25) -20 = 18 watts. From the above it becomes clear that the efficiency of the circuit is poor. The short-circuit current Io max increases with increasing input current, which places many demands on transistors Tr ₁ and Tr ₂ .

It is implicitly assumed in the foregoing that the frequency of the switching signal is constant and therefore independent of the input voltage. The present invention is based on the recognition that the efficiency can be significantly improved by using a forward control scheme of the frequency in which the frequency is converted depending on the input voltage.

가 되는데, 값은 32.47KHz의 주파수에 해당하는 것이다. I_O2에 대하여, V_O=122V이고, 이것은 파선곡선 경우의 22.1W대신에 15.1W의 소비전력이 회로에서 생기게하며, I_O1에 대하여는 V_O=140.8V가 되어 18W대신 14.7W의 소비전력이 회로에서 생기게 한다.FIG. 6 shows the characteristics of FIG. 4 and includes values based on the above-described formula. 6 also shows the curve a obtained for a constant class V ₁ T between the period of the switching signal and the input voltage V ₁ . It can be seen from Equation (4) that the short-circuit current is kept constant, while the output voltage at no load maintains 0.5 Vi with respect to the input voltage of (Vi). 6 shows that the output voltage value for curve a is always below the voltage value of the broken line. Therefore, a constant short-circuit current is obtained through such a control method, which is advantageous for the transistors Tr ₁ and Tr ₂ and the power consumption is reduced. Using the above examples

The value corresponds to a frequency of 32.47KHz. About I _O2, V _O = 122V and, in this and causing the power consumption of the circuit 15.1W to 22.1W, instead of when the broken line curve is the V _O = 140.8V I _O1 with respect to the power consumption of 18W 14.7W instead of To produce in the circuit.

은 전압(V₁)에 비례한다. 이러한 원리에 따라 동작하는 발진기에 대해서는 여러 문헌으로 부터 공지되어 있다. 생성된 톱니신호는 공지된 방법으로 구형파 신호로 변환한다.An oscillator having a period inversely proportional to the input voltage and thus generating a signal suitable for controlling the transistor Tr ₃ can be constructed in the following simple manner. The capacitor is charged with a current source, which is derived directly from the voltage (V ₁ ). The voltage increases linearly across the capacitor. This voltage quickly discharges the capacitor as soon as the default value is reached. In this way, a sawtooth voltage is generated in which the slope is proportional to the voltage V ₁ during the rising edge. If the voltage V ₁ suddenly becomes a factor, the charge time of the capacitor is divided by the same factor. Thus, the product V ₁ T is constant and frequency

Is proportional to the voltage V ₁ . Oscillators operating according to this principle are known from several documents. The generated sawtooth signal is converted into a square wave signal by a known method.

와 같아지고 이로부터

가 되는데, 이 값은 단지 9.5W의 소비전력에 상당하는 값이며, 반면에 (P)점에서의 최소 소비 전력은 영이된다.An improvement on the broken curve of FIG. 6 is also obtained with a circuit having the output characteristic indicated by curve b. In this circuit the frequency of the switching signal is changed in such a way that curve b passes through point p. Since the points of curve (b) must satisfy equation (3), this curve is a parabola that crosses the vertical axis at the same point as curve (a) and dashed parabola. From this, the short-circuit current I _O max decrease versus the input voltage increase and the loss in the series control circuit are further reduced compared to the case of the curve (a). In the above-mentioned embodiment, Iomax when V ₁ = 345 V

Equal to and from this

This value is equivalent to just 9.5 W of power consumption, while the minimum power consumption at point (P) is zero.

In this circuit all properties intersect point P. If the current I _O flowing in the load does not change, no stabilization is required at all and the load may be directly connected in parallel with the capacitor C ₂ ′. If this current changes to some extent, for example, a known shunt control scheme, i.e. the transistor is connected and controlled so that the sum of the current through the resistor R and the current through the transistor is kept constant. Can be used. The operating point remains at point P with respect to the change in voltage V ₁ . Resistor R and shunt transistor together form the load of the converter.

Also, in FIG. 6, it can be seen that the output voltage to point P does not include the ripple voltage generated at the main voltage. In the case of a change not too large (I _O ), the ripple voltage at the output is greatly attenuated compared to the case of the curve and curve (a). This can be further reduced by the shunt control scheme. Therefore, since the switching frequency components and their harmonics need to be removed, the capacitor C ₂ and the capacitor C ₃ can be low capacitance when a series arrangement is used.

The change in frequency is according to equation (3). T = 19.8 Hz and thus f = 50.5 kHz. The product V ₁ T varies between 230 × 46.2 = 10 ⁻³ × 10.6 and 345 × 19.8 = 6.8 × 10 ⁻³ . In known circuits this product increases as the input voltage increases, while it remains constant in case a and decreases in case b. From the numerical values above, it can be seen that the relative change of T is about -57% while the relative change of V ₁ is about 33%. In other words, in other words, the period decreases at a greater rate than the increase in input voltage. Conversely, when the voltage V ₁ decreases from a value, the product V ₁ T increases and the period T also increases with a relative change that is larger than the change in V ₁ .

7 shows a complete circuit, in which the elements corresponding to the elements of FIGS. 1 to 5 are denoted by the same reference numerals and the oscillator satisfies the above condition. Capacitor C ₄ is charged with current flowing through a series arrangement of Zener Diet D ₇ and resistor R, connected to voltage V ₁ . Resistor R ₃ may be thought of as a current source. Two transistors (Tr ₆ ) and (Tr ₇ ) are constructed in a known manner and are complementary to act as thyristors, and the voltage across capacitor (C ₄ ) is equal to that of resistor (R ₄ ) and zener diode (D ₈ ). A switch, which is in a conductive state when reaching a substantially constant voltage value across the series array, is used as the discharge element of the capacitor C ₄ . The positive gates of thyristors Tr ₆ and Tr ₇ are connected to voltage V ₁ through resistor R ₆ and the negative gate is connected to negative terminal of voltage source V ₁ through resistor R ₇ . . The discharge is stopped when the voltage across the capacitor C ₄ is reduced to a constant voltage value across the RC parallel network R ₅ and C ₅ located approximately at the negative lead of the thyristor.

A substantially constant voltage is subtracted from the voltage (V ₁₎ appears across the diode (D _7), wherein a diode (D ₇₎ may be replaced by a voltage dependent resistance. The voltage drop across the resistor R ₃ , and consequently, the charging current of the capacitor C ₄ passing therethrough is subject to a greater relative change than without the diode D ₇ . The relative periodic change of the sawtooth wave voltage having a constant amplitude, generated across the capacitor C ₄ , is greater than the change of the voltage V ₁ . The discharge time of the capacitor C ₄ becomes very short as the discharge current flows through the emitter of the transistor Tr ₆ , which becomes a low resistive passage. By appropriate selection of the elements D ₇ , R ₃ and C ₄ , the change in the period T can be obtained as a function of the voltage V ₁ . The following values are suitable for the example mentioned above. That is, (R ₃ ) is 100 kΩ, (C ₄ ) is 10 nF, and the voltage across diode D ₇ is approximately 145V. It should be noted that the sawtooth oscillator described above may be used in the case of curve a of FIG. 6 if diode D ₇ is substituted for a short circuit.

Through the emitter follower transistor Tr ₈ used as the separating stage, the sawtooth voltage appearing across the capacitor C ₄ is applied to the base of the driver transistor Tr ₃ which converts the sawtooth wave into a square wave. For this purpose a number of diodes arranged in series, for example two diodes (D ₉ ) and (D ₁₀ ) and a resistor (R ₈ ) are divided by a separate capacitor (C ₆ ) and emitter of the transistor (Tr ₃ ) It is included in the lead. A substantially constant threshold voltage appears at the emitter. Transistor Tr ₃ is saturated as soon as its base voltage becomes higher than this threshold voltage. The resistance R ₈ is adjustable and the ratio δ can be set to a constant value through this resistance.

The square wave signal thus obtained is applied to the bases of the transistors Tr ₁ and Tr ₂ via the transformer T ₁ , where the transistor Tr ₁ is cut off while the transistor Tr ₂ is the transistor Tr _3. ) During the period of evangelism. The network is provided not only on the secondary side of the transformer T ₁ but also on the primary side. Capacitor C ₇ is arranged in parallel with diode D ₂ to reduce the slope of the voltage at point A during the transition and thus switching losses. Inductance L is composed of the leakage inductance of transformer I ₂ . In the foregoing description, it is assumed that the capacity of the capacitor C is very high. In practice, these values are used for serial C. L will be chosen to have inductive impedance in all cases, which means that the series resonance of the network will be below the minimum switching frequency corresponding to the minimum input voltage. The following values were chosen for the construction of the circuit mentioned above. (C) is 1 μF and (C ₇ ) is 1.5 nF.

In the above-described structure, no feedback is used except for the series control circuit including the transistor Tr ₄ . Such a series is used if feedback from the voltage across capacitor C ₂ , in combination with the above-mentioned forward control, is used to obtain an output characteristic that is horizontal than the parabolic considered above at least between output current values I _O1 and I _O2 . It is clear that no adjustment is necessary. The feedback results in a change in the oscillator frequency, for example, which depends on the voltage across capacitor C ₂ . In this last mentioned case, the voltage across the secondary winding tightly coupled to the winding Ls ₂ is compared to the reference voltage. Information depending on the value of the difference measured between the voltages is controlled between the negative terminal of the power supply V ₁ and the collector of the transistor Tr ₇ to control the transistor representing the variable resistance. This affects the frequency of the switching signal. Alternatively, it is possible to trigger on one of the gate electrodes of thyristors Tr ₆ and Tr ₇ because forward control is inertial and the frequency has a value determined by the input voltage. . Reverse control works slightly later and manufactures the frequency. As a result, unless very complex circuits are needed, there is no need for the loop gain to be too high, which may lead to instability.

Claims (1)

An input terminal for connecting an input dC voltage source, an inductive network, a signal generator coupled to the input terminal and arranged to apply to the inductive network as a periodic square wave signal whose amplitude depends on the input voltage, rectifier and smoothing A switching converter for converting an input DC voltage to an output DC voltage having a capacitor and a means for coupling a rectifier and a capacitor to the inductive network and thus causing a smooth voltage to appear across the capacitor during operation, the switching converter for converting an input DC voltage to an output DC voltage. In response to the input dC voltage, the frequency of the square wave signal is controlled according to the input DC voltage. Therefore, in operation, the product of the input DC voltage and the period of the square wave signal shows a predetermined characteristic with respect to the change of the input DC voltage. Comprising means for keeping the coefficient of impact substantially constant Switching type converter as claimed.

Images