KR20230092671A - Micro LED display apparatus and method for manufacturing the same - Google Patents

Abstract

A micro light emitting element display device and a manufacturing method thereof are disclosed. The disclosed micro light emitting element device display device includes a display unit including a plurality of micro light emitting element arrays, a driving unit back plane, and a bonding structure formed on the coupling surface of the display unit and the driving unit back plane facing each other and electrically connecting the display unit and the driving unit back plane. The bonding structure includes a plurality of bonding pads on one coupling surface of the display unit and the driving unit back plane, and a dot pad array formed in a two-dimensional array to cover a plurality of bonding pads on the other coupling surface, and the area between the bonding pads.

Description

Micro LED display apparatus and method for manufacturing the same {Micro LED display apparatus and method for manufacturing the same}

It relates to a micro light emitting device display device and a manufacturing method thereof.

As display devices, a liquid crystal display (LCD) and an organic light emitting diode (OLED) display are widely used. In addition, recently, a technique for manufacturing a high-resolution display device using a micro light emitting device (micro LED) has been in the limelight. Light emitting diodes (LEDs) have advantages of using low power and being environmentally friendly. Due to these advantages, industrial demand is increasing.

Micro light emitting devices are not only used for lighting devices or LCD backlights, but are also applied as pixels of display devices. The micro light emitting device display device using the micro light emitting device as a pixel as described above includes a display unit including the micro light emitting device and a driving unit backplane. The backplane of the display unit and the driving unit may be fabricated as a module through a bonding process after each fabrication.

Provided is a micro light emitting device display device capable of reducing the difficulty of aligning bonding pads and the level of bonding surface processing, and a manufacturing method thereof.

A micro light emitting device display device according to one type includes a display unit including a plurality of micro light emitting device arrays; a driving unit backplane including a plurality of driving elements for driving the display unit; and a bonding structure formed on a mating surface of the display unit and the driver backplane facing each other to electrically connect a micro light emitting device of the display unit and a driving element of the driver backplane, wherein the bonding structure comprises: the display unit and the driver backplane a plurality of bonding pads formed to be spaced apart from each other on one bonding surface of the; A plurality of bonding pads on different bonding surfaces of the backplane of the display unit and the driver unit and a dot pad array formed in a two-dimensional array to cover a region between the plurality of bonding pads and corresponding to each bonding pad and a plurality of dot pads.

The display unit may further include an isolation unit configured to pixelate the micro light emitting device.

The display unit may further include a trench for pixelating the micro light emitting device.

The micro light emitting device may include a first semiconductor layer of a first conductivity type adjacent to the bonding structure; an active layer on the first semiconductor layer; a second semiconductor layer formed on the active layer and having a second conductivity type opposite to that of the first semiconductor layer; An electrode electrically connected to the second semiconductor layer may be included.

The micro light emitting device may further include a first electrode under the first semiconductor layer.

The dot pad array may be formed on a bonding surface of the display unit, and the first electrode may be provided to form a stacked structure with at least one dot pad.

The first electrode may be provided as a two-dimensional array of dot electrodes corresponding to the dot pad array to form a stacked structure of dot pads and dot electrodes.

The dot pad may have a smaller size than the dot electrode.

A method of manufacturing a micro light emitting device display device according to one type includes preparing a driving unit backplane including a plurality of driving elements and having a plurality of bonding pads spaced apart from each other on a first coupling surface; Forming an epitaxial stack structure of a second semiconductor layer, an active layer, and a first semiconductor layer on a growth substrate, covering a bonding pad formed on a backplane of a driving unit on the first semiconductor layer and an area between them, each bonding pad and a plurality of preparing a display unit structure in which dot pads are formed in a two-dimensional array on the second bonding surface so that the dot pads of the dot pads correspond to each other; forming a bonding structure in which each bonding pad corresponds to a plurality of dot pads by bonding a first bonding surface of the backplane of the driving unit and a second bonding surface of the display unit structure; exposing the second semiconductor layer by removing the growth substrate; and forming a plurality of micro light emitting device arrays in a display unit by pixelating the epitaxial stack structure and forming electrodes electrically connected to the second semiconductor layer.

An isolation portion may be formed up to the first semiconductor layer of the epitaxial stack structure to pixelate the epitaxial stack structure.

The isolation portion may be formed by ion implantation.

A trench may be formed up to the first semiconductor layer of the epitaxial stack structure to pixelate the epitaxial stack structure.

The micro light emitting device may further include a first electrode under the first semiconductor layer, and at least one dot pad and the first electrode may form a stacked structure.

The first electrode may be provided as a two-dimensional array of dot electrodes corresponding to the dot pad array to form a stacked structure of dot pads and dot electrodes.

The dot pad may have a smaller size than the dot electrode.

The preparing of the display structure may include sequentially stacking a second semiconductor layer of a second conductivity type, an active layer, and a first semiconductor layer of a first conductivity type opposite to the second semiconductor layer on a growth substrate to obtain an epitaxial stack structure. forming a; forming a pattern of the first electrode to form a two-dimensional array of dot electrodes on the first semiconductor layer to correspond to the dot pad array; depositing an insulating layer on the pattern of the first electrode and patterning the deposited insulating layer to expose the dot electrode of the first electrode; forming a dot pad material layer on the patterned insulating layer to be connected to the exposed dot electrode of the first electrode; The method may include forming a two-dimensional array of dot pads forming a stacked structure with the dot electrode of the first electrode by removing a portion of the height of the dot pad material layer and the insulating layer.

A step of thinning the exposed second semiconductor layer by removing it to a partial height may be further included.

The electrode may be provided to form an opening area exposing the second semiconductor layer, and forming a color conversion layer disposed in the opening area.

The step of thinning the exposed second semiconductor layer by removing it to a partial height; wherein the electrode is provided to form an opening area exposing the thinned second semiconductor layer, and forming the color conversion layer. forming a barrier rib located in a region between the micro light emitting elements; Forming a color conversion layer in an opening area between the barrier ribs; may include.

The second semiconductor layer is patterned to have a first surface forming an opening area and a barrier rib protruding from the first surface, and the electrode is formed on the barrier rib of the second semiconductor layer, and the opening area within the barrier rib A color conversion layer may be formed thereon.

An electronic device according to one type applies a micro light emitting device display device having the above characteristics as a display.

According to the micro light emitting device display device and method of manufacturing the same according to the embodiment, when the display unit and the driving unit backplane are coupled, align free bonding is possible, thereby reducing the difficulty of aligning the bonding pads and the level of bonding surface processing, thereby increasing the yield. can be raised

1 is a schematic cross-sectional view of a micro light emitting diode display device according to an exemplary embodiment.
FIG. 2 schematically shows an example of a circuit diagram of the micro light emitting device display device of FIG. 1 .
3 (A) and (B) are plan views illustrating embodiments of the bonding structure of FIG. 1 .
4a to 4f exemplarily show a process of manufacturing the micro light emitting device display device according to the embodiment.
5A to 5F illustratively show a process of forming the display unit structure of FIG. 4A.
6 is a schematic cross-sectional view of a micro light emitting device display device according to another embodiment.
7 is a schematic cross-sectional view of a micro light emitting device display device according to another embodiment.
8A to 8G exemplarily show a process of manufacturing a micro light emitting device display device according to another embodiment.
9 is a schematic cross-sectional view of a micro light emitting device display device according to another embodiment.
10 is a schematic cross-sectional view of a micro light emitting device display device according to another embodiment.
11 shows an example of a mobile device to which the micro light emitting device display device according to the embodiment is applied.
12 shows an example of a vehicle to which the micro light emitting device display device according to the embodiment is applied.
13 shows an example of augmented reality glasses or virtual reality glasses to which the micro light emitting device display device according to the embodiment is applied.
14 shows an example of a wearable display to which the micro light emitting device display device according to the embodiment is applied.

Hereinafter, exemplary embodiments will be described in detail with reference to the accompanying drawings. In the following drawings, the same reference numerals denote the same components, and the size of each component in the drawings may be exaggerated for clarity and convenience of description. On the other hand, the embodiments described below are merely illustrative, and various modifications are possible from these embodiments.

Hereinafter, what is described as “upper” or “upper” may include not only what is directly above, below, left, and right in contact, but also what is above, below, left, and right in non-contact. Singular expressions include plural expressions unless the context clearly dictates otherwise. In addition, when a certain component is said to "include", this means that it may further include other components without excluding other components unless otherwise stated.

The use of the term “above” and similar denoting terms may correspond to both singular and plural. Unless the order of steps constituting the method is explicitly stated or stated to the contrary, these steps may be performed in any suitable order, and are not necessarily limited to the order described.

In addition, terms such as "...unit" and "module" described in the specification mean a unit that processes at least one function or operation, which may be implemented as hardware or software or a combination of hardware and software. .

Connections of lines or connecting members between components shown in the drawings are examples of functional connections and / or physical or circuit connections, which can be replaced in actual devices or additional various functional connections, physical connections, or as circuit connections.

The use of all examples or exemplary terms is simply for explaining technical ideas in detail, and the scope is not limited due to these examples or exemplary terms unless limited by the claims.

1 is a schematic cross-sectional view of a micro light emitting device display device 10 according to an exemplary embodiment. 2 schematically shows an example of a circuit diagram of the micro light emitting device display device 10 of FIG. 1, and (A) and (B) of FIG. 3 show embodiments of the bonding structure 210 of FIG. It is a flat view shown.

Referring to FIGS. 1, 2, and 3 , the micro light emitting device display device 10 includes a display unit 100 including a plurality of micro light emitting device arrays 105 and a driving unit backplane including a plurality of driving devices ( 200), and a bonding structure 210 electrically connecting the micro light emitting device 105 of the display unit 100 and the driving device of the driving unit backplane 200.

The display unit 100 may include a two-dimensional array of a plurality of micro light emitting devices 105 . In the display unit 100 , micro light emitting devices 105 may be provided in pixel units or sub-pixel units. For example, each micro light emitting element 105 may be positioned in the display unit 100 in units of sub-pixels. Hereinafter, a case in which each micro light emitting device 105 is provided to be positioned in a sub-pixel unit on the display unit 100 will be described as an example.

An isolation portion 150 may be formed in the display unit 100 to form a two-dimensional array of the plurality of micro light emitting devices 105 by pixelating the micro light emitting devices 105 . The isolation unit 150 may be formed as a high resistance region by, for example, ion implantation. The isolation portion 150 may be formed in a trench shape as in other embodiments described below. The isolation portion 150 may be formed up to the position of the first semiconductor layer 111 . Due to the isolation unit 150 , adjacent micro light emitting devices 105 may be electrically isolated from each other.

The micro light emitting device 105 is located on the first semiconductor layer 111 of the first conductivity type adjacent to the bonding structure 210, the active layer 113 on the first semiconductor layer 111, and the active layer 113, and It includes a second semiconductor layer 115 of a second conductivity type opposite to the first semiconductor layer 111 and a second electrode 170 electrically connected to the second semiconductor layer 115 . The micro light emitting device 105 may further include a first electrode 120 under the first semiconductor layer 111 . One of the first conductivity type and the second conductivity type may be an n-type, and the other may be a p-type. The first semiconductor layer 111 , the active layer 113 , and the second semiconductor layer 115 may form the epitaxial stack structure 110 . That is, each micro light emitting device 105 has an epitaxial stack structure 110 of the first semiconductor layer 111, the active layer 113, and the second semiconductor layer 115, and the first semiconductor layer 111 under the first semiconductor layer 111. The second electrode 170 electrically connected to the electrode 120 and the second semiconductor layer 115 may be included. Meanwhile, the surface of the second semiconductor layer 115 may be roughened to increase extraction efficiency.

The first semiconductor layer 111 and the second semiconductor layer 115 may include, for example, group III-V or group II-VI compound semiconductors. The first semiconductor layer 111 and the second semiconductor layer 115 may serve to provide electrons and holes to the active layer 113 . To this end, the first semiconductor layer 111 and the second semiconductor layer 115 may be doped in electrically opposite types. For example, the first semiconductor layer 111 is doped with n-type and the second semiconductor layer 115 is doped with p-type, or the first semiconductor layer 111 is doped with p-type and the second semiconductor layer 115 is doped with p-type. ) may be doped n-type. For example, the first semiconductor layer 111 may include p-GaN, and the second semiconductor layer 115 may include n-GaN. In this case, the first electrode 120 formed under the first semiconductor layer 111 may correspond to an anode electrode, and the second electrode 170 electrically connected to the second semiconductor layer 115 may be a cathode electrode or It may be a common electrode.

The active layer 113 is a light emitting layer and may have a quantum well structure in which quantum wells are disposed between barriers. Light may be generated as electrons and holes provided from the first semiconductor layer 111 and the second semiconductor layer 115 recombine in the quantum well in the active layer 113 . A wavelength of light generated from the active layer 113 may be determined according to an energy bandgap of a material constituting the quantum well in the active layer 113 . The active layer 113 may have only one quantum well, but may also have a multi-quantum well (MQW) structure in which a plurality of quantum wells and a plurality of barriers are alternately arranged. The thickness of the active layer 113 or the number of quantum wells in the active layer 113 may be appropriately selected in consideration of the driving voltage and luminous efficiency of the micro light emitting device 105 .

The active layer 113 may include, for example, a barrier layer and a quantum well layer. For example, the barrier layer may be made of gallium nitride (GaN) and the quantum well layer may be made of indium gallium nitride (In _x Ga _1-x N (0≤x≤1)). However, the barrier layer or the quantum well layer may be formed of various materials without being limited to the above examples. The active layer 113 may have a structure in which barrier layers and quantum well layers are alternately stacked N times (where N is a natural number equal to or greater than 1), respectively.

Each of the plurality of micro light emitting devices 105 may have a size of about 0.1 to 1000 μm, about 0.1 to 200 μm, or about 100 μm or less. In this case, the size of the micro light emitting device 105 may mean, for example, the maximum length among lengths between two points on the micro light emitting device 105 . However, the size of the micro light emitting device 105 is not limited to the above range, and may be larger or smaller than the above range.

The micro light emitting device 105 may have, for example, an epitaxial stack structure 110 of a first semiconductor layer 111 capable of generating blue light, an active layer 113 and a second semiconductor layer 115 . However, the embodiment is not limited thereto, and other semiconductor materials may be applied to the epitaxial stack structure 110 to generate light of a different wavelength band.

The driving unit backplane 200 may include a plurality of driving elements for driving the light emitting elements 105 of the display unit 100 in units of pixels or sub-pixels, and may further include a plurality of switching elements. The driver backplane 200 may be formed of, for example, a Complementary Metal Oxide Silicon (CMOS) backplane.

2 shows an example of a pixel circuit provided on the driving unit backplane 200 . The pixel circuit of FIG. 2 may drive the micro light emitting device 105 in units of sub-pixels, for example.

The driving element may apply a driving signal to the micro light emitting element 105 through the bonding structure 210 . The driving element may include a transistor T1, a memory M1, and the like. At this time, the memory M1 may be a static random access memory (SRAM), but is not limited thereto, and other memories may be applied.

In the micro light emitting device display device 10 according to the embodiment, the driving unit backplane 200 and the display unit structure for manufacturing the display unit 100 ( 100a in FIG. 4A ) are coupled to each other ( 130a and 230a in FIG. 4A ). In a state in which they are positioned to face each other, a structure in which the driving unit backplane 200 and the display unit 100 are coupled may be formed by bonding the two coupling surfaces 130a and 230a.

The bonding structure 210 may be provided on the two coupling surfaces 130a and 230a of the drive unit backplane 200 and the display unit 100 . As shown in FIG. 3 , the bonding structure 210 may be prepared to enable alignment-free bonding. Referring to FIG. 3 , the bonding structure 210 includes a plurality of bonding pads 230 spaced apart from each other formed on one coupling surface of the display unit 100 and the driver backplane 200, the display unit 100 and the driver backplane 200. It includes a plurality of bonding pads 230 on the other bonding surface of and an array of dot pads 130 formed in a two-dimensional array to cover an area between them.

For example, the plurality of bonding pads 230 may be formed to be spaced apart from each other on a coupling surface of the driver backplane 200 . The dot pad 130 array may be formed in a two-dimensional array to cover a plurality of bonding pads 230 on the bonding surface of the display unit 100 and an area between them. In this case, the array of dot pads 130 may be entirely formed on the bonding surface of the display unit 100, for example.

In this case, the dot pad 130 may be formed in various shapes as exemplarily shown in (A) and (B) of FIG. 3 . 3(A) shows an example in which the dot pad 130 is circular, and (B) in FIG. 3 shows an example in which the dot pad 130 is rectangular. It is not limited. For example, the dot pad 130 may be formed in various shapes, such as a polygon, an ellipse, a semicircle, various shapes having a plurality of vertices, and a shape partially formed of a curved surface, in addition to a circle and a rectangle.

In this embodiment, the dot pad 130 array may be formed such that a plurality of dot pads 130 correspond to one bonding pad 230 . In this way, the size of the dot pad 130 and the distance between the dot pads 130 may be determined so that each bonding pad 230 corresponds to the plurality of dot pads 130 .

In this way, for example, a plurality of bonding pads 230 are formed to be spaced apart from each other on the coupling surface 230a of the driving unit backplane 200, and each bonding pad 230 is formed on the entire coupling surface 130a of the display unit 100. If the dot pad 130 array is formed so that the plurality of dot pads 130 correspond to each other, the plurality of dot pads 130 are bonded to each bonding pad 230 when the display unit 100 and the driver backplane 200 are coupled. Alignment-free bonding is possible.

According to the micro light emitting device display device 10 according to the embodiment, since one bonding pad 230 and a plurality of dot pads 130 have a corresponding bonding structure 210, the display unit 100 and the driving unit backplane ( 200) During bonding, alignment-free bonding is possible, and accordingly, the difficulty of aligning the bonding pads and the level of bonding surface processing can be lowered, thereby increasing the yield.

Meanwhile, according to the micro light emitting device display device 10 according to the embodiment, when the dot pad 130 array is formed on the bonding surface of the display unit 100, the first electrode 120 under the first semiconductor layer 111 ), the first electrode 120 may be provided to form a stacked structure with at least one dot pad 130 .

For example, as shown in FIG. 1 , the first electrode 120 may be formed by patterning to have a two-dimensional array of dot electrodes corresponding to the array of dot pads 130. Accordingly, the first electrode 120 A stacked structure of the dot pad 130 and the dot electrode may be formed. 1 shows an example in which the dot pad 130 is formed to have a smaller size than the dot electrode. As another example, the dot pad 130 may be formed to have the same size as the dot electrode or to have a larger size than the dot electrode.

According to the micro light emitting device display device 10 according to the above embodiment, since the bonding structure 210 is provided to enable align-free bonding, the driving unit backplane 200 and the display unit structure (100a in FIG. 4a) are formed. In a state where the coupling surfaces ( 130a and 230a in FIG. 4A ) are positioned to face each other, the two coupling surfaces 130a and 230a are bonded to couple the driving unit backplane 200 and the display unit 100 to each other. A manufacturing process of the micro light emitting device 105 array may be performed, including processing.

In this case, subsequent pixelation and micro light emitting device 105 array fabrication processes may proceed based on an alignment key existing on the driving unit backplane 200 . That is, pixelation and electrode processes may be performed on the epitaxial structure 110 based on the sub-pixels of the driver backplane 200 after the align-free bonding process is completed. Also, to improve extraction efficiency, roughening of the second semiconductor layer 115 of the epitaxial stack structure 110 may be performed.

Therefore, according to the micro light emitting device display device 10 according to the embodiment, the driving unit backplane 200 and the display unit 100 can be coupled by align-free bonding, and a mesa structure or the like is not required for a pixelation process. Therefore, mesa-free pixelation is possible.

4a to 4f exemplarily show a process of manufacturing the micro light emitting device display device 10 according to the embodiment.

In order to manufacture the micro light emitting device display device 10 according to the embodiment, first, as shown in FIG. 4A, the driving unit backplane 200 and the display unit structure 100a are respectively manufactured and prepared.

The driving unit backplane 200 may include a plurality of driving elements for driving the light emitting elements 105 of the display unit 100 in units of pixels or sub-pixels, and may further include a plurality of switching elements. The driver backplane 200 may be formed of, for example, a Complementary Metal Oxide Silicon (CMOS) backplane. The driver backplane 200 may include, for example, a pixel circuit as shown in FIG. 2 to drive the micro light emitting device 105 in units of sub-pixels, but is not limited thereto. A pixel circuit configuration of the driver backplane 200 may be variously modified.

For example, a plurality of bonding pads 230 spaced apart from each other may be formed on the first coupling surface 230a of the driver backplane 200 . The bonding pads 230 may be arranged at the same cycle as the arrangement cycle of the micro light emitting devices 105 of the display unit 100 .

In the display unit structure 100a, an epitaxial stacked structure 110 of a second semiconductor layer 115', an active layer 113, and a first semiconductor layer 111 is formed on a growth substrate 101, and the first semiconductor layer The first electrode 120 is formed on (111) to form a stacked structure with at least one dot pad 130, and the dot pads 130 are formed in a two-dimensional array on the second bonding surface 130a. can The display unit structure 100a may be prepared through, for example, the manufacturing process of FIGS. 5A to 5F.

5A to 5F exemplarily show a process of forming the display unit structure 100a of FIG. 4A.

In order to form the display unit structure 100a, first, as shown in FIG. 5A, the second conductive type second semiconductor layer 115', the active layer 113, and the second semiconductor layer 115 are formed on the growth substrate 101. ) and the opposite type of first semiconductor layers 111 of the first conductivity type may be sequentially stacked to form the epitaxial stack structure 110 . For example, a silicon substrate may be used as the growth substrate 101 . The second semiconductor layer 115' may be, for example, an n-GaN layer, and the first semiconductor layer 111 may be, for example, a p-GaN layer. As another example, the second semiconductor layer 115' may be a p-GaN layer, and the first semiconductor layer 111 may be an n-GaN layer.

Next, referring to FIG. 5B , a pattern of the first electrode 120 may be formed on the first semiconductor layer 111 to form a two-dimensional array of dot electrodes corresponding to the array of dot pads 130 . The pattern of the first electrode 120 may be, for example, a form in which a layer of the first electrode 120 is formed on the first semiconductor layer 111 and then patterned to form a two-dimensional array of dot electrodes. In each micro light emitting device 105, the first electrode 120 may include a plurality of dot electrodes.

Next, referring to FIGS. 5C and 5D, an insulating layer 181 ′ is deposited on the pattern of the first electrode 120, and the insulating layer deposited so that each dot electrode of the first electrode 120 is exposed ( 181 ′ may be patterned to form opening 182 . The insulating layer 181' may be formed of, for example, an insulating material such as SiO2, but is not limited thereto.

Next, referring to FIG. 5E , a dot pad material layer 130' may be formed on the patterned insulating layer 181'. In this case, the dot pad material layer 130' may be formed to a thickness sufficient to cover the patterned insulating layer 181'. As a result, since the dot pad material fills the opening 182 of the insulating layer 181', the dot pad material layer 130' is electrically attached to each dot electrode of the first electrode 120 exposed through the opening 182. can be connected to The dot pad material layer 130' may be formed by plating copper (Cu) on the patterned insulating layer 181'.

Next, by removing a portion of the height of the dot pad material layer 130' and the insulating layer 181', as shown in FIG. 5F, the dot pad 130 forming a stacked structure with each dot electrode of the first electrode 120 A two-dimensional array of ) may form the display unit structure 100a formed on the second coupling surface 130a. In FIG. 5F, reference numeral 181 denotes a gap between each dot electrode of the first electrode 120 remaining after removing a portion of the height of the patterned insulating layer 181' and the laminated structure of the dot pad 130 or the micro light emitting device 105. It corresponds to an insulating layer that electrically insulates the first electrode 120 .

5B to 5F, an example in which the first electrode 120 is provided in the form of a dot electrode to include a plurality of dot electrodes for one micro light emitting device 105 has been described, but the embodiment is not limited thereto. The first electrode 120 may not be provided in a dot electrode shape.

In this way, the dot pads 130 cover the bonding pads 230 formed on the backplane 200 of the driving unit and the area between them, and each bonding pad 230 corresponds to the plurality of dot pads 130 so that the display unit structure 100a ) may be formed on the second coupling surface 130a. In addition, the first electrode 120 corresponds to the array of dot pads 130 so that the first electrode 120 and at least one dot pad 130 form a stacked structure, for example, the two-dimensional dot electrode. Provided in an array, a stacked structure of the dot pad 130 and the dot electrode may be formed. The dot pad 130 may be formed to have a size smaller than that of the dot electrode. As another example, the dot pad 130 may be formed to have the same size as or larger than the dot electrode.

1, 4a to 4f, and another embodiment to be described later, an example in which the first electrode 120 is patterned to form a laminated structure of a dot pad 130 and a dot electrode is shown, and the first electrode 120 is It may not be formed to include a plurality of dot electrodes for each micro light emitting element 105 . That is, the first electrode 120 may be formed of one electrode for each micro light emitting element 105 . In this case, the first electrode 120 is in contact with the plurality of dot pads 130 for each micro light emitting element 105 . As another example, instead of the stacked structure of the first electrode 120 and the dot pad 130, the dot pad 130 serves as the first electrode of the micro light emitting device 105 in a structure without the first electrode 120. may be arranged to do so.

When the first electrode 120 is not formed as a dot electrode, in the process of FIG. 5B , the pattern of the first electrode 120 continuously exists in the region corresponding to the micro light emitting device 105. can be formed to In this case, the dot pad 130 and the first electrode 120 are electrically connected to the first electrode 120 in a region corresponding to one micro light emitting device 105. In the process of FIGS. 5C and 5D, the insulating layer 181′ is patterned to expose the first electrode 120 at a plurality of positions to form a stacked structure, and then the processes of FIGS. 5E and 5F may be performed. there is. Accordingly, a structure in which a plurality of dot pats are stacked on the first electrode 120 may be obtained.

Again, referring to FIG. 4A , the second coupling surface 130a of the display unit structure 100a prepared through the manufacturing process described with reference to FIGS. 5A to 5F is the first coupling surface 230a of the driving unit backplane 200. ) to face.

Next, as shown in FIG. 4B, when the first coupling surface 230a of the driving unit backplane 200 and the second coupling surface 130a of the display unit structure 100a are bonded, a plurality of bonding pads 230 are formed. A bonding structure 210 corresponding to the dot pad 130 is formed, and the driving unit backplane 200 and the display unit structure 100a are coupled.

Next, as shown in FIG. 4C, in a state where the driver backplane 200 is positioned downward, the growth substrate 101 is removed to expose the second semiconductor layer 115', and the exposed second semiconductor layer ( 115') may be removed to a partial height to have a thickness suitable for the micro light emitting device 105 to form a thinned second semiconductor layer 115. 4C shows an example of thinning by removing the entire exposed second semiconductor layer 115' to a partial height. Thinning by removing a portion of the height of the second semiconductor layer 115' may be performed by, for example, a CMP process.

As in other embodiments to be described later, the second semiconductor layer 115' may be selectively thinned only in the portion where the color change layer is to be formed. It can be used as a barrier for layer formation.

Next, as shown in FIGS. 4D and 4E, the first semiconductor layer 111, the active layer 113, and the second semiconductor layer 115 are formed to form an array of a plurality of micro light emitting devices 105 on the display unit 100. The epitaxial stacked structure 110 may be pixelated. The isolation portion 150 may be formed up to the first semiconductor layer 111 of the epitaxial stacked structure 110 to pixelate the epitaxial stacked structure 110 . In order to form the isolation portion 150, as shown in FIG. 4D, a mask 140 pattern is formed on the epitaxial stack structure 110, that is, the thinned second semiconductor layer 115, and the mask 140 pattern Ion implantation may be performed through the opening. By ion implantation, up to the first semiconductor layer 111 is formed as a high-resistance region, and an isolation portion 150 that pixelates the epitaxial stacked structure 110 may be formed as shown in FIG. 4E . A region between the isolation portions 150 of the epitaxial stack structure 110 corresponds to the micro light emitting device 105 , and the micro light emitting devices 105 may be electrically separated by the isolation portion 150 . Here, instead of forming a high-resistance region by ion implantation or the like, for example, a trench is formed up to the first semiconductor layer 111 and an insulating material layer is selectively formed in the trench to form an epitaxial stack structure (110). ) may be formed into pixels.

Next, referring to FIG. 4F , a second electrode 170 electrically connected to the second semiconductor layer 115 is formed to form an array of a plurality of micro light emitting devices 105 of the display unit 100, thereby forming a driving unit backplane. The micro light emitting device display device 10 may be manufactured with a structure in which the display unit 100 is bonded to the 200 .

For example, the second electrode 170 may be provided to be electrically connected to the second semiconductor layer 115 while forming an opening region exposing the second semiconductor layer 115 . As shown in FIGS. 1, 4E, and 4F, when the isolation portion 150 is formed between the micro light emitting devices 105, the second electrode 170 is formed on the isolation portion 150 by the second semiconductor layer 115. , and may be formed to be electrically connected to the second semiconductor layer 115 while forming an opening region exposing the second semiconductor layer 115 .

Meanwhile, the surface of the second semiconductor layer 115 may be roughened to increase extraction efficiency. The process of roughening the surface of the second semiconductor layer 115 may be omitted. 1 and 4F exemplarily show a case in which the surface of the second semiconductor layer 115 is roughened.

6 is a schematic cross-sectional view of a micro light emitting device display device 10' according to another embodiment, compared to the micro light emitting device display device 10 of FIG. 1, a color conversion layer on the micro light emitting device 105. (190a, 190b, 190c) are further included.

Referring to FIG. 6 , for full color implementation of the micro light emitting device display device 10' according to the embodiment, the color conversion layers 190a, 190b, and 190c constituting one pixel are, for example, the light emitting device 105 ) converts the light emitted by the first color light into first color light, the second color conversion layer 190b converts the light emitted by the light emitting element 105 into second color light, and the light emitting element 105 ) may include a third color conversion layer 190c that converts the emitted light into third color light. For example, the first color light may be red light, the second color light may be green light, and the third color light may be blue light. When the light emitting element 105 is provided to emit blue light, the first color conversion layer 190a is provided to convert blue light into red light, and the second color conversion layer 190b is provided to convert blue light into green light. The three-color conversion layer 190c may be provided to convert blue light generated from the light emitting device 105 into blue light having a narrowed bandwidth. Instead of the third color conversion layer 190c, a transparent layer that transmits blue light may be provided. Depending on the full color implementation method, the number and arrangement of the color conversion layers 190a, 190b, and 190c constituting one pixel may vary.

A barrier rib 195 may be disposed between the color conversion layers 190a, 190b, and 190c. For example, the barrier rib 195 is formed on the area between the micro light emitting devices 105, that is, on the second electrode 170 formed on the isolation portion 150, and the color conversion layers 190a, 190b, and 190c are It may be formed in the opening area between the barrier ribs 195 .

FIG. 7 is a schematic cross-sectional view of a micro light emitting device display device 300 according to another embodiment. Compared to the micro light emitting device display device 10 of FIG. 1 , the isolation portion 330 is formed as a high resistance region. Instead, there is a difference in forming a trench.

Referring to FIG. 7 , in the display unit 100, the micro light emitting devices 105 are pixelated to form a two-dimensional array of a plurality of micro light emitting devices 105, for example, as an isolation portion 330. A trench may be formed up to the position of the first semiconductor layer 111 . Due to this trench, adjacent micro light emitting devices 105 may be electrically isolated.

In this embodiment, an insulating layer 340 may be formed in the trench, and the second electrode 170 on the insulating layer 340 extends to the second semiconductor layer 115 of the epitaxial stacked structure 110. can be formed

8A to 8G illustratively show a process of manufacturing the micro light emitting device display device 300 according to the embodiment.

The process of FIGS. 8A to 8C for manufacturing the micro light emitting device display device 300 according to the embodiment is as described above with reference to FIGS. 4A to 4C and 5A to 5F. That is, the driver backplane 200 and the display structure 100a are manufactured and prepared, respectively, and the prepared driver backplane 200 and the display structure 100a are connected to the first coupling surface 230a of the drive backplane 200 and the display structure. Position the second coupling surface (130a) of (100a) to face. Then, a plurality of dot pads 130 are formed for each bonding pad 230 by bonding the first coupling surface 230a of the driving unit backplane 200 and the second coupling surface 130a of the display unit structure 100a. By forming the corresponding bonding structure 210, the driving unit backplane 200 and the display unit structure 100a are coupled. Then, with the driver backplane 200 positioned below, the growth substrate 101 is removed to expose the second semiconductor layer 115', and the exposed second semiconductor layer 115' is a micro light emitting device. A thinned second semiconductor layer 115 is formed by removing a partial height to have a thickness suitable for (105).

Next, as shown in FIGS. 8D and 8E, the first semiconductor layer 111, the active layer 113, and the second semiconductor layer 115 are formed to form an array of a plurality of micro light emitting devices 105 on the display unit 100. The epitaxial stacked structure 110 may be pixelated. An isolation portion 330 , for example, a trench, may be formed up to the first semiconductor layer 111 of the epitaxial stack structure 110 to pixelate the epitaxial stack structure 110 . As shown in FIG. 8D, a mask 140 pattern is formed on the epitaxial structure 110, that is, the thinned second semiconductor layer 115, and the epitaxial structure 110 is formed through the opening of the mask 140 pattern. A trench may be formed by etching up to the first semiconductor layer 111 . Due to this trench, adjacent micro light emitting devices 105 may be electrically isolated.

Next, as shown in FIGS. 8F and 8G , an insulating layer 340 is formed in the trench, and a second electrode 170 is formed on the insulating layer 340 to form a second semiconductor layer 115 of the epitaxial stack structure 110 It can be formed to extend up to. For example, the second electrode 170 may be formed to be electrically connected to the second semiconductor layer 115 while forming an opening region exposing the second semiconductor layer 115 . By forming a plurality of arrays of micro light emitting devices 105 in the display unit 100 in this way, the micro light emitting device display device 300 can be manufactured with a structure in which the display unit 100 is bonded to the driving unit backplane 200 .

Meanwhile, the surface of the second semiconductor layer 115 may be roughened to increase extraction efficiency. The process of roughening the surface of the second semiconductor layer 115 may be omitted. 7 and 8G exemplarily show a case in which the surface of the second semiconductor layer 115 is roughened.

Meanwhile, the micro light emitting device display device 300 according to the embodiment described with reference to FIGS. 7 and 8A to 8G may further include a color conversion layer on the micro light emitting device 105 to implement full color. . As in the micro light emitting device display device 300 of this embodiment, when the isolation portion 150 is formed as a trench, the color conversion layer for realizing full color and the barrier rib therebetween are the micro light emitting device display device 10 of FIG. ') can be formed similarly.

In the case of the micro light emitting device display device 300 of this embodiment, in order to implement full color, barrier ribs may be formed to be positioned on the trench region, and a color conversion layer may be formed in an opening region between barrier ribs. In order to implement the micro light emitting device display device 300 according to the present embodiment in full color, the formation of the color conversion layer in the barrier rib and the opening region therebetween can be sufficiently inferred from FIG. omit the city.

9 is a cross-sectional view schematically showing a micro light emitting device display device 500 according to another embodiment, and a light emitting device display device 10 (10') according to the embodiment described with reference to FIGS. 1, 6 and 7 Compared to (300), instead of forming the second semiconductor layer 515 thin as a whole, the first region 515a forming the opening region of the second semiconductor layer 515 and the first region 515a The difference is that the patterning is performed to have the barrier rib 515b protruding around the periphery, and the second electrode 170 is formed on the barrier rib 515b of the second semiconductor layer 515 . The first region 515a of the second semiconductor layer 515 corresponds to the thinned second semiconductor layer 115 in FIG. 1, and the barrier rib 515b of the second semiconductor layer 515 is shown in FIGS. It may correspond to the relatively thick second semiconductor layer 115 ′ before thinning in . The first region 515a of the second semiconductor layer 515 may correspond to an opening region.

Meanwhile, the surface of the first region 515a of the second semiconductor layer 515 may be roughened to increase extraction efficiency. A process of roughening the surface of the first region 515a of the second semiconductor layer 515 may be omitted. 9 illustrates a case where the surface of the first region 515a of the second semiconductor layer 515 is roughened.

10 is a cross-sectional view schematically showing a micro light emitting device display device 500' according to another embodiment, compared to the micro light emitting device display device 500 of FIG. 9, on the micro light emitting device 105 in FIG. There is a difference in that the color conversion layers 190a, 190b, and 190c are further included.

Referring to FIG. 10 , in order to realize full color of the micro light emitting device display device 500' according to the embodiment, the color conversion layers 190a and 190b are formed in the opening area between the barrier ribs 170 of the second semiconductor layer 115. , 190c) can be formed. The color conversion layers 190a, 190b, and 190c constituting one pixel include, for example, the first color conversion layer 190a converting light emitted from the light emitting element 105 into first color light, and the light emitting element 105. It may include a second color conversion layer 190b for converting the light emitted by the second color light into second color light, and a third color conversion layer 190c for converting the light emitted by the light emitting element 105 into third color light. For example, the first color light may be red light, the second color light may be green light, and the third color light may be blue light. When the light emitting element 105 is provided to emit blue light, the first color conversion layer 190a is provided to convert blue light into red light, and the second color conversion layer 190b is provided to convert blue light into green light. The three-color conversion layer 190c may be provided to convert blue light generated from the light emitting device 105 into blue light having a narrowed bandwidth. Instead of the third color conversion layer 190c, a transparent layer that transmits blue light may be provided. Depending on a method for implementing full color, the number and arrangement of color conversion layers 190a, 190b, and 190c constituting one pixel may vary.

According to the micro light emitting device display device 500' according to the embodiment described with reference to FIGS. 9 and 10, the isolation portion 150 for pixelating the micro light emitting device 105 is formed as, for example, a high resistance region. The barrier rib 515b forming the color conversion layers 190a, 190b, and 190c may be formed in an area other than the opening area of the second semiconductor layer 515. Here, the isolation portion 150 that pixelates the micro light emitting device 105 may be formed of a trench formed up to the first semiconductor layer 111, similarly to FIG. 7 .

As described above, the micro light emitting device display devices 10, 10', 300, 500, and 500' according to various embodiments have a plurality of bonding pads spaced apart from each other on the bonding surfaces of the display unit 100 and the driving unit backplane 200 facing each other. By forming the bonding structure 210 including the 230 and the array of dot pads 130 provided to cover it, when the display unit 100 and the driving unit backplane 200 are coupled, a plurality of dot pads per bonding pad 230 ( 130) is bonded, alignment-free bonding is possible.

Since the display unit 100 and the driving unit backplane 200 are bonded with the bonding structure 210, there is no need to form and cut a hole at the top after align-free bonding the bonding pads. That is, a mesa-free structure is possible.

As described above, according to the micro light emitting device display devices 10, 10', 300, 500, and 500' according to the embodiment, since the bonding pad 230 and the plurality of dot pads 130 have a corresponding bonding structure 210, the display unit When the 100 and the driving unit backplane 200 are coupled, since alignment free bonding is possible, the difficulty of aligning the bonding pad 230 and the level of bonding surface processing can be reduced, thereby increasing the yield.

The micro light emitting device display devices 10, 10', 300, 500, and 500' according to various embodiments described above may be used in various electronic devices. For example, the micro light emitting device display apparatuses 10, 10', 300, 500, and 500' according to the embodiment have a glasses or head-mounted structure requiring high PPI, AR (Augmented Reality) and/or Alternatively, it may be usefully applied to a Virtual Reality (VR) display or a device including the same. However, it is not limited thereto, and may be used for a lens type device or the like, and may also be used for a general micro light emitting device display device.

11 shows an example of a mobile device 1000 to which the micro light emitting device display devices 10, 10', 300, 500, and 500' according to the embodiment are applied. The mobile device 1000 may include the display device 1100 . The display device 1100 may include the micro light emitting diode display devices 10, 10', 300, 500, and 500' according to the embodiments described with reference to FIGS. 1 to 10 . The display device 1100 may have a foldable structure, and for example, a multi-folder display may be applied. Here, the mobile device 1000 is illustrated as having a foldable display, but this is shown as an example, and a flat display may be applied to the mobile device 1000 .

12 shows an example of a vehicle to which the micro light emitting device display devices 10, 10', 300, 500, and 500' according to the embodiment are applied. The micro light emitting device display devices 10, 10', 300, 500, and 500' according to the embodiment may be applied to a head-up display device for a vehicle. The head-up display device 2000 includes a display device 2100 provided in one area of the vehicle and at least one optical path changing member ( 2200) may be included.

13 shows an example of augmented reality glasses 3000 (or virtual reality glasses) to which the micro light emitting device display devices 10, 10', 300, 500, and 500' according to the embodiment are applied. The augmented reality glasses 3000 may include a projection system 3100 that forms an image, and at least one element 3200 that guides the image from the projection system 3100 to enter the user's eyes. The projection system 3100 may include the micro light emitting device display devices 10, 10', 300, 500, and 500' according to the exemplary embodiment.

14 shows an example of a wearable display to which the micro light emitting device display devices 10, 10', 300, 500, and 500' according to the embodiment are applied. The wearable display 4000 may include the micro light emitting device display devices 10, 10', 300, 500, and 500' according to the exemplary embodiment.

Micro light emitting device display devices (10, 10', 300, 500, 500') according to the embodiment can be applied to μLED TVs, mobile displays, smart watches, AR (augmented reality) glasses, VR (virtual reality) glasses, heads-up displays, signage, etc. can In addition, it can be applied to various devices requiring high PPI, such as rollable TVs and stretchable displays.

The above embodiments are merely exemplary, and various modifications and equivalent other embodiments may be made therefrom by those skilled in the art. Therefore, the true technical scope of protection according to exemplary embodiments should be determined by the technical idea described in the claims below.

10,10',300,500,500': micro light emitting element display device
100: display unit 100a: display unit structure 105: micro light emitting device
110: epitaxial layer structure 111: first semiconductor layer 113: active layer
115: second semiconductor layer 120: first electrode 130: dot pad
130a, 230a: coupling surface 150: isolation portion 170: second electrode
190a, 190b, 190c: color conversion layer 200: driving unit backplane
210: bonding structure 230: bonding pad

Claims (20)

a display unit including a plurality of micro light emitting device arrays;
a driving unit backplane including a plurality of driving elements for driving the display unit;
A bonding structure formed on mating surfaces of the display unit and the driving unit backplane facing each other to electrically connect the micro light emitting device of the display unit and the driving element of the driving unit backplane;
The bonding structure,
a plurality of bonding pads formed to be spaced apart from each other on one coupling surface of the backplane of the display unit and the driver;
A micro light emitting device including a plurality of bonding pads on different bonding surfaces of the display unit and the driver backplane and a dot pad array formed in a two-dimensional array to cover an area between the bonding pads and corresponding to each bonding pad and the plurality of dot pads. display device. The micro light emitting device display device of claim 1 , wherein the display unit further comprises an isolation portion configured to pixelate the micro light emitting device. The micro light emitting device display device of claim 1 , wherein the display unit further comprises a trench configured to pixelate the micro light emitting device. The method of claim 1, wherein the micro light emitting device,
a first semiconductor layer of a first conductivity type adjacent to the bonding structure;
an active layer on the first semiconductor layer;
a second semiconductor layer formed on the active layer and having a second conductivity type opposite to that of the first semiconductor layer;
A micro light emitting device display device including an electrode electrically connected to the second semiconductor layer. The micro light emitting device display device of claim 4, wherein the micro light emitting device further comprises a first electrode under the first semiconductor layer. The method of claim 5, wherein the dot pad array is formed on a bonding surface of the display unit,
The first electrode is provided to form a laminated structure with at least one dot pad. The micro light emitting device display device according to claim 6, wherein the first electrode is provided as a two-dimensional array of dot electrodes corresponding to the dot pad array to form a stacked structure of dot pads and dot electrodes. The micro light emitting device display device of claim 7 , wherein the dot pad has a size smaller than that of the dot electrode. preparing a driving unit backplane including a plurality of driving elements and having a plurality of bonding pads spaced apart from each other on a first coupling surface;
Forming an epitaxial stack structure of a second semiconductor layer, an active layer, and a first semiconductor layer on a growth substrate, covering a bonding pad formed on a backplane of a driving unit on the first semiconductor layer and an area between them, each bonding pad and a plurality of preparing a display unit structure in which dot pads are formed in a two-dimensional array on the second bonding surface so that the dot pads of the dot pads correspond to each other;
forming a bonding structure in which each bonding pad and a plurality of dot pads correspond to each other by bonding a first bonding surface of the backplane of the driving unit and a second bonding surface of the display unit structure;
exposing the second semiconductor layer by removing the growth substrate;
Pixelating the epitaxial stack structure and forming an electrode electrically connected to the second semiconductor layer to form a plurality of micro light emitting device arrays in a display unit; 10. The method of claim 9, wherein an isolation portion is formed up to the first semiconductor layer of the epitaxial stack structure to pixelate the epitaxial stack structure. 11. The method of claim 10, wherein the isolation portion is formed by ion implantation. 10. The method of claim 9, wherein a trench is formed up to the first semiconductor layer of the epitaxial stack structure to pixelate the epitaxial stack structure. 10. The method of claim 9, wherein the micro light emitting device further comprises a first electrode under the first semiconductor layer,
At least one dot pad and the first electrode form a laminated structure micro light emitting device display device manufacturing method. 14 . The method of claim 13 , wherein the first electrode is provided as a two-dimensional array of dot electrodes corresponding to the dot pad array to form a stacked structure of dot pads and dot electrodes. 15. The method of claim 14, wherein the dot pad has a smaller size than the dot electrode. 15. The method of claim 14, wherein the step of preparing the display unit structure,
forming an epitaxial structure by sequentially stacking a second semiconductor layer of a second conductivity type, an active layer, and a first semiconductor layer of a first conductivity type opposite to the second semiconductor layer on a growth substrate;
forming a pattern of the first electrode to form a two-dimensional array of dot electrodes on the first semiconductor layer to correspond to the dot pad array;
depositing an insulating layer on the pattern of the first electrode and patterning the deposited insulating layer to expose the dot electrode of the first electrode;
forming a dot pad material layer on the patterned insulating layer to be connected to the exposed dot electrode of the first electrode;
and forming a two-dimensional array of dot pads forming a stacked structure with the dot electrode of the first electrode by removing a portion of the height of the dot pad material layer and the insulating layer. 17. The method of claim 9, further comprising removing the exposed second semiconductor layer to a partial height and thinning it. The method of any one of claims 9 to 16, wherein the electrode is provided to form an opening region exposing the second semiconductor layer,
Forming a color conversion layer disposed in the opening area; further comprising,
It further includes; removing the exposed second semiconductor layer to a partial height and thinning it;
The electrode is provided to form an opening region exposing the thinned second semiconductor layer,
Forming the color conversion layer,
forming barrier ribs positioned in regions between the micro light emitting devices;
Forming a color conversion layer in the opening area between the barrier ribs; Micro light emitting device display device manufacturing method comprising a. 17. The method of any one of claims 9 to 16, wherein the electrode is provided to form an opening region exposing the second semiconductor layer,
Forming a color conversion layer disposed in the opening area; further comprising,
The second semiconductor layer is
patterned to have a first surface forming an opening region and a barrier rib protruding from the first surface;
The electrode is formed on the barrier rib of the second semiconductor layer,
A method of manufacturing a micro light emitting device display device comprising forming a color conversion layer in an opening region in the barrier rib. An electronic device to which the micro light emitting device display device according to any one of claims 1 to 8 is applied as a display.

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