KR20220084667A - Substrate treating apparatus and method - Google Patents

Abstract

A substrate processing apparatus and method are provided. The substrate processing apparatus includes an HVDC generator for generating an output voltage at an output terminal and supplying an output voltage to the substrate support module, a voltage divider including a first capacitor and a second capacitor connected to the output terminal and connected in series to each other, and a voltage divider. A gain value generator that generates a gain value using the divided voltage, an offset adjuster that determines an offset voltage using the gain value, and a corrected set voltage by calculating the offset voltage and the set voltage are supplied to the input terminal of the HVDC generator It includes an arithmetic unit.

Description

Substrate treating apparatus and method therefor

The present invention relates to a substrate processing apparatus and a method therefor.

When manufacturing a semiconductor device or a display device, various processes such as photography, etching, ashing, ion implantation, thin film deposition, and cleaning are performed. Here, plasma is used in the etching or cleaning process. Plasma is generated by a high temperature, a strong electric field, or a high-frequency electromagnetic field, and refers to an ionized gas state composed of ions, electrons, radicals, and the like. Ions or radicals included in the plasma collide with or react with the substrate, so that the substrate may be etched or cleaned.

SUMMARY OF THE INVENTION An object of the present invention is to provide a substrate processing apparatus for constantly controlling a chucking force.

Another object to be solved by the present invention is to provide a substrate processing method for constantly controlling a chucking force.

The tasks of the present invention are not limited to the tasks mentioned above, and other tasks not mentioned will be clearly understood by those skilled in the art from the following description.

One aspect of the substrate processing apparatus of the present invention for achieving the above object is an HVDC generator for supplying an output voltage to a substrate support module by generating an output voltage at an output terminal, a first connected to the output terminal and connected in series with each other A voltage divider including a capacitor and a second capacitor, a gain value generator generating a gain value using the division voltage generated by the voltage divider, an offset adjusting unit determining an offset voltage using the gain value, and the offset voltage; and a calculator for generating a corrected set voltage by calculating the set voltage and supplying it to the input terminal of the HVDC generator.

Another aspect of the substrate processing apparatus of the present invention for achieving the above object is a process chamber, a substrate support module disposed in the process chamber, receiving an output voltage to generate a chucking force to fix the substrate, and generating the output voltage A power generator comprising: an HVDC generator that generates an output voltage at an output terminal and supplies an output voltage to the substrate support module; and a first capacitor and a second capacitor connected to the output terminal and connected in series with each other a voltage divider, a gain value generator generating a gain value using the divided voltage generated by the voltage divider, an offset adjusting unit determining an offset voltage using the gain value, and calculating the offset voltage and the set voltage and a calculator for generating the corrected set voltage and supplying it to the input terminal of the HVDC generator.

One aspect of the substrate processing method of the present invention for achieving the above object is to supply an output voltage to the substrate support module by generating an output voltage at an output terminal, and a first capacitor and a second capacitor connected to the output terminal and connected in series with each other. is used to generate a divided voltage, a gain value is generated using the divided voltage, an offset voltage is determined using the gain value, and a corrected set voltage is generated by calculating the offset voltage and the set voltage to generate a corrected set voltage at the input terminal. including the supply of

1 is a view showing a substrate processing apparatus according to some embodiments of the present invention.
FIG. 2 is a block diagram of a power generator of FIG. 1 .
3 is a flowchart illustrating a substrate processing method according to some embodiments of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Advantages and features of the present invention and methods of achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms, and only these embodiments allow the disclosure of the present invention to be complete, and common knowledge in the art to which the present invention pertains It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout.

The terminology used herein is for the purpose of describing the embodiments and is not intended to limit the present invention. In this specification, the singular also includes the plural unless specifically stated otherwise in the phrase. As used herein, “comprises” and/or “comprising” refers to the presence of one or more other components, steps, operations and/or elements mentioned. or addition is not excluded.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, and in the description with reference to the accompanying drawings, the same or corresponding components are given the same reference numbers regardless of reference numerals, A description will be omitted.

1 is a diagram illustrating a substrate processing apparatus according to some embodiments of the present invention.

Referring to FIG. 1 , the substrate processing apparatus 10 processes the substrate W using plasma. For example, the substrate processing apparatus 10 may perform an etching process on the substrate W. The substrate processing apparatus 10 may include a process chamber 100 , a support unit 200 , a gas supply unit 300 , a plasma generation unit 400 , and a baffle unit 500 .

The process chamber 100 provides a space in which a substrate processing process is performed. The process chamber 100 includes a housing 110 , a sealing cover 120 , and a liner 130 .

The housing 110 has an open upper surface therein. The inner space of the housing 110 is provided as a processing space in which a substrate processing process is performed. The housing 110 is provided with a metal material. The housing 110 may be made of an aluminum material. The housing 110 may be grounded. An exhaust hole 102 is formed in the bottom surface of the housing 110 . The exhaust hole 102 is connected to the exhaust line 151 . Reaction by-products generated during the process and gas remaining in the inner space of the housing may be discharged to the outside through the exhaust line 151 . The inside of the housing 110 is decompressed to a predetermined pressure by the exhaust process.

The sealing cover 120 covers the open upper surface of the housing 110 . The sealing cover 120 is provided in a plate shape and seals the inner space of the housing 110 . The sealing cover 120 may include a dielectric substance window.

The liner 130 is provided inside the housing 110 . The liner 130 is formed in an open space with upper and lower surfaces. The liner 130 may be provided in a cylindrical shape. The liner 130 may have a radius corresponding to the inner surface of the housing 110 . The liner 130 is provided along the inner surface of the housing 110 . A support ring 131 is formed on the upper end of the liner 130 . The support ring 131 is provided as a ring-shaped plate, and protrudes to the outside of the liner 130 along the circumference of the liner 130 . The support ring 131 is placed on the top of the housing 110 and supports the liner 130 . The liner 130 may be made of the same material as the housing 110 . That is, the liner 130 may be made of an aluminum material. The liner 130 protects the inner surface of the housing 110 . An arc discharge may be generated inside the chamber 100 while the process gas is excited. Arc discharge damages peripheral devices. The liner 130 protects the inner surface of the housing 110 to prevent the inner surface of the housing 110 from being damaged by arc discharge. In addition, impurities generated during the substrate processing process are prevented from being deposited on the inner wall of the housing 110 . The liner 130 has a lower cost than the housing 110 and is easy to replace. Accordingly, when the liner 130 is damaged by arc discharge, the operator may replace the liner 130 with a new one.

The substrate support unit 200 is positioned inside the housing 110 . The substrate support unit 200 supports the substrate W. The substrate support unit 200 may include an electrostatic chuck 210 for adsorbing the substrate W using an electrostatic force. Alternatively, the substrate support unit 200 may support the substrate W in various ways such as mechanical clamping. Hereinafter, the support unit 200 including the electrostatic chuck 210 will be described.

The support unit 200 includes an electrostatic chuck 210 , an insulating plate 250 , and a lower cover 270 . The support unit 200 may be positioned to be spaced apart from the bottom surface of the housing 110 upwardly in the chamber 100 .

The electrostatic chuck 210 includes a dielectric plate 220 , a lower electrode 223 , a heater 225 , a support plate 230 , and a focus ring 240 .

The dielectric plate 220 is positioned at an upper end of the electrostatic chuck 210 . The dielectric plate 220 is provided as a disk-shaped dielectric substance. A substrate W is placed on the upper surface of the dielectric plate 220 . The upper surface of the dielectric plate 220 has a smaller radius than the substrate W. Accordingly, the edge region of the substrate W is positioned outside the dielectric plate 220 . A first supply passage 221 is formed in the dielectric plate 220 . The first supply passage 221 is provided from the top surface to the bottom surface of the dielectric plate 210 . A plurality of first supply passages 221 are formed to be spaced apart from each other, and are provided as passages through which the heat transfer medium is supplied to the bottom surface of the substrate W.

A lower electrode 223 and a heater 225 are embedded in the dielectric plate 220 . The lower electrode 223 is positioned above the heater 225 . The lower electrode 223 is electrically connected to the power generator 223a. The power generator 223a includes DC power. A switch 223b is installed between the lower electrode 223 and the power generator 223a. The lower electrode 223 may be electrically connected to the power generator 223a by turning on/off the switch 223b. When the switch 223b is turned on, a direct current is applied to the lower electrode 223 . An electrostatic force acts between the lower electrode 223 and the substrate W by the current applied to the lower electrode 223 , and the substrate W is adsorbed to the dielectric plate 220 by the electrostatic force.

The heater 225 is electrically connected to the second lower power source 225a. The heater 225 generates heat by resisting the current applied from the second lower power source 225a. The generated heat is transferred to the substrate W through the dielectric plate 220 . The substrate W is maintained at a predetermined temperature by the heat generated by the heater 225 . The heater 225 includes a spiral-shaped coil.

A support plate 230 is positioned under the dielectric plate 220 . The bottom surface of the dielectric plate 220 and the top surface of the support plate 230 may be adhered by an adhesive 236 . The support plate 230 may be made of an aluminum material. The upper surface of the support plate 230 may be stepped so that the central area is positioned higher than the edge area. The central region of the top surface of the support plate 230 has an area corresponding to the bottom surface of the dielectric plate 220 and is adhered to the bottom surface of the dielectric plate 220 . A first circulation passage 231 , a second circulation passage 232 , and a second supply passage 233 are formed in the support plate 230 .

The support plate 230 may include a metal plate. The support plate 230 may be connected to the high frequency power supply 620 by the high frequency transmission line 610 . The support plate 230 may receive power from the high frequency power supply 620 so that plasma generated in the processing space is smoothly supplied to the substrate. That is, the support plate 230 may function as an electrode. In addition, although the substrate processing apparatus 10 in FIG. 1 is configured as an ICP type, it is not limited thereto, and the substrate processing apparatus 10 according to some embodiments of the present disclosure may be configured as a CCP type. When the substrate processing apparatus 10 is configured as a CCP type, the high frequency transmission line 610 may be connected to a lower electrode for generating plasma to apply power from the high frequency power source 620 to the lower electrode.

The first circulation passage 231 is provided as a passage through which the heat transfer medium circulates. The first circulation passage 231 may be formed in a spiral shape inside the support plate 230 . Alternatively, the first circulation passage 231 may be arranged such that ring-shaped passages having different radii have the same center. Each of the first circulation passages 231 may communicate with each other. The first circulation passage 231 is formed at the same height.

The second circulation passage 232 is provided as a passage through which the cooling fluid circulates. The second circulation passage 232 may be formed in a spiral shape inside the support plate 230 . In addition, the second circulation passage 232 may be arranged so that ring-shaped passages having different radii have the same center. Each of the second circulation passages 232 may communicate with each other. The second circulation passage 232 may have a larger cross-sectional area than the first circulation passage 231 . The second circulation passages 232 are formed at the same height. The second circulation passage 232 may be located below the first circulation passage 231 .

The second supply passage 233 extends upward from the first circulation passage 231 and is provided on the upper surface of the support plate 230 . The second supply passage 243 is provided in a number corresponding to the first supply passage 221 , and connects the first circulation passage 231 and the first supply passage 221 .

The first circulation passage 231 is connected to the heat transfer medium storage unit 231a through the heat transfer medium supply line 231b. A heat transfer medium is stored in the heat transfer medium storage unit 231a.

The heat transfer medium includes an inert gas. According to some embodiments of the present invention, the heat transfer medium includes helium (He) gas. The helium gas is supplied to the first circulation passage 231 through the supply line 231b, and is sequentially supplied to the bottom surface of the substrate W through the second supply passage 233 and the first supply passage 221 . The helium gas serves as a medium through which heat transferred from the plasma to the substrate W is transferred to the electrostatic chuck 210 .

The second circulation passage 232 is connected to the cooling fluid storage unit 232a through the cooling fluid supply line 232c. A cooling fluid is stored in the cooling fluid storage unit 232a. A cooler 232b may be provided in the cooling fluid storage unit 232a. The cooler 232b cools the cooling fluid to a predetermined temperature. Alternatively, the cooler 232b may be installed on the cooling fluid supply line 232c. The cooling fluid supplied to the second circulation passage 232 through the cooling fluid supply line 232c circulates along the second circulation passage 232 to cool the support plate 230 . The support plate 230 cools the dielectric plate 220 and the substrate W together while being cooled to maintain the substrate W at a predetermined temperature.

The focus ring 240 is disposed on an edge region of the electrostatic chuck 210 . The focus ring 240 has a ring shape and is disposed along the circumference of the dielectric plate 220 . The upper surface of the focus ring 240 may be stepped such that the outer portion 240a is higher than the inner portion 240b. The inner portion 240b of the upper surface of the focus ring 240 is positioned at the same height as the upper surface of the dielectric plate 220 . The upper inner portion 240b of the focus ring 240 supports an edge region of the substrate W positioned outside the dielectric plate 220 . The outer portion 240a of the focus ring 240 is provided to surround the edge region of the substrate W. As shown in FIG. The focus ring 240 allows plasma to be concentrated in a region facing the substrate W in the chamber 100 .

An insulating plate 250 is positioned under the support plate 230 . The insulating plate 250 is provided with a cross-sectional area corresponding to the support plate 230 . The insulating plate 250 is positioned between the support plate 230 and the lower cover 270 . The insulating plate 250 is made of an insulating material and electrically insulates the support plate 230 and the lower cover 270 .

The lower cover 270 is located at the lower end of the substrate support unit 200 . The lower cover 270 is positioned to be spaced apart from the bottom surface of the housing 110 upwardly. The lower cover 270 has an open top surface therein. The upper surface of the lower cover 270 is covered by the insulating plate 250 . Accordingly, the outer radius of the cross section of the lower cover 270 may be the same length as the outer radius of the insulating plate 250 . A lift pin module (not shown) for moving the transferred substrate W from an external transfer member to the electrostatic chuck 210 may be positioned in the inner space of the lower cover 270 .

The lower cover 270 has a connecting member 273 . The connecting member 273 connects the outer surface of the lower cover 270 and the inner wall of the housing 110 . A plurality of connection members 273 may be provided on the outer surface of the lower cover 270 at regular intervals. The connection member 273 supports the substrate support unit 200 in the chamber 100 . In addition, the connection member 273 is connected to the inner wall of the housing 110 so that the lower cover 270 is electrically grounded. The first power line 223c connected to the power generator 223a, the second power line 225c connected to the second lower power source 225a, and the heat transfer medium supply line 231b connected to the heat transfer medium storage unit 231a ) and the cooling fluid supply line 232c connected to the cooling fluid storage unit 232a extend into the lower cover 270 through the inner space of the connection member 273 .

The gas supply unit 300 supplies a process gas into the chamber 100 . The gas supply unit 300 includes a gas supply nozzle 310 , a gas supply line 320 , and a gas storage unit 330 . The gas supply nozzle 310 is installed in the central portion of the sealing cover 120 . An injection hole is formed on the bottom surface of the gas supply nozzle 310 . The injection port is located under the sealing cover 120 , and supplies a process gas to the processing space inside the chamber 100 . The gas supply line 320 connects the gas supply nozzle 310 and the gas storage unit 330 . The gas supply line 320 supplies the process gas stored in the gas storage unit 330 to the gas supply nozzle 310 . A valve 321 is installed in the gas supply line 320 . The valve 321 opens and closes the gas supply line 320 and controls the flow rate of the process gas supplied through the gas supply line 320 .

The plasma generating unit 400 excites the process gas in the chamber 100 into a plasma state. According to an embodiment of the present invention, the plasma generating unit 400 may be configured as an ICP type.

The plasma generating unit 400 may include a high frequency power source 420 , a first antenna 411 , a second antenna 413 , and a power distributor 430 . The high frequency power supply 420 supplies a high frequency signal. For example, the high frequency power supply 420 may be an RF power supply 420 . The RF power source 420 supplies RF power. Hereinafter, a case in which the high frequency power source 420 is provided as the RF power source 420 will be described. The first antenna 411 and the second antenna 413 are connected in series with the RF power source 420 . Each of the first antenna 411 and the second antenna 413 may be provided as a coil wound with a plurality of circuits. The first antenna 411 and the second antenna 413 are electrically connected to the RF power source 420 to receive RF power. The power divider 430 distributes power supplied from the RF power source 420 to the first antenna 411 and the second antenna 413 .

The first antenna 411 and the second antenna 413 may be disposed at positions facing the substrate W. Referring to FIG. For example, the first antenna 411 and the second antenna 413 may be installed above the process chamber 100 . The first antenna 411 and the second antenna 413 may be provided in a ring shape. In this case, the radius of the first antenna 411 may be smaller than the radius of the second antenna 413 . Also, the first antenna 411 may be located inside the upper portion of the process chamber 100 , and the second antenna 413 may be located outside the upper portion of the process chamber 100 .

According to some embodiments of the present invention, the first and second antennas 411 and 413 may be disposed on the side of the process chamber 100 . According to some embodiments of the present disclosure, one of the first and second antennas 411 and 413 may be disposed on the upper portion of the process chamber 100 , and the other may be disposed on the side of the process chamber 100 . have. As long as the plurality of antennas generate plasma in the process chamber 100 , the position of the coil is not limited.

The first antenna 411 and the second antenna 413 may receive RF power from the RF power source 420 to induce a time-varying electromagnetic field in the chamber, and accordingly, the process gas supplied to the process chamber 100 is converted to plasma. can be here

The baffle unit 500 is positioned between the inner wall of the housing 110 and the substrate support unit 200 . The baffle unit 500 includes a baffle in which a through hole is formed. The baffle is provided in the shape of an annular ring. The process gas provided in the housing 110 passes through the through holes of the baffle and is exhausted to the exhaust hole 102 . The flow of the process gas may be controlled according to the shape of the baffle and the shape of the through-holes.

FIG. 2 is a block diagram of a power generator of FIG. 1 .

Referring to FIG. 2 , the power generation unit 223a may include a High Voltage Direct Current (HVDC) generator 51 , a voltage divider 52 , a comparator 53 , an offset adjustment unit 54 , and an operation unit 55 . can

The HVDC generator 51 may generate an output voltage Vout at an output terminal. The output voltage Vout generated by the HVDC generator 51 may supply the output voltage Vout to the substrate supporting module.

The voltage divider 52 may include a first capacitor C1 and a second capacitor C2 . The voltage divider 52 may be connected to an output terminal of the HVDC generator 51 . The first capacitor C1 and the second capacitor C2 of the voltage divider 52 may be connected in series with each other.

The first capacitor C1 may be directly connected to an output terminal of the HVDC generator 51 . That is, the first node N1 may be a point connected to the first capacitor C1 and the output terminal of the HVDC generator 51 . The second capacitor C2 may be directly connected to the ground voltage. The second node N2 connecting the first capacitor C1 and the second capacitor C2 may be connected to the gain value generator 53 . That is, the second node N2 may be a point connecting the second capacitor C2 and the gain value generator 53 .

The gain generator 53 may receive the divided voltage Va as an input. The gain generator 53 may generate a gain value by using the divided voltage Va of the voltage divider 52 . The division voltage Va may be determined by the output voltage Vout and the voltage divider 52 .

When the voltage value of the divided voltage Va is expressed, it can be calculated by Equation 1 below.

<Equation 1>

Here, C2 is the capacitance of the second capacitor C2, C1 is the capacitance of the first capacitor C1, Vout is the output voltage value of the output terminal of the HVDC generator 51, Va is the voltage value generated by the voltage divider 52 to be.

For example, when Vout is 2500V and Va is 2.5V, C2 = 999C1 may be. Here, the capacitance of the second capacitor C2 may be greater than the capacitance of the first capacitor C1 . In other words, the capacitance of the first capacitor C1 may be smaller than the capacitance of the second capacitor C2 .

The offset adjustment unit 54 may receive a gain value and generate an offset voltage Voffset. The offset voltage Voffset may be determined using the gain generated by the gain generator 53 .

The offset adjusting unit 54 may include a table indicating the relationship between the gain value (gain) and the offset voltage (Voffset). The offset adjusting unit 54 may select and output a corresponding offset voltage Voffset using a table based on a gain input from the gain value generator 53 . That is, the offset voltage Voffset corresponding to the gain value may be output.

The calculator 55 may generate the corrected set voltage Vfset by calculating the offset voltage Voffset and the set voltage Vset. The calculating unit 55 may generate the corrected set voltage Vfset by calculating the offset voltage Voffset and the set voltage Vset generated by the offset adjusting unit 54 .

That is, the corrected set voltage Vfset may be determined by the set voltage Vset and the offset voltage Voffset.

Such a corrected set voltage Vfset can be expressed by Equation 2 below.

<Equation 2>

Here, Vfset is the voltage value of the corrected set voltage, Vset is the voltage value of the set voltage, and Voffset is the voltage value of the offset voltage.

The corrected set voltage Vfset may be supplied to the input terminal of the HVDC generator 51 .

3 is a flowchart illustrating a substrate processing method according to some embodiments of the present invention.

Referring to FIG. 3 , a divided voltage is generated by dividing the output voltage using the first capacitor and the second capacitor connected in series with the output terminal of the HVDC ( S10 ).

For example, referring to FIG. 2 , the HVDC generator 51 may generate an output voltage Vout. The output terminal of the HVDC generator 51 may be connected to the voltage divider 52 . In the voltage divider 52 , the first capacitor C1 and the second capacitor C2 are connected in series with each other. The voltage divider 52 may generate the divided voltage Va. Since the relationship between the divided voltage Va and the output voltage Vout has been described in Equation 1, it will be omitted.

Next, a gain value is obtained using the divided voltage (S20).

For example, referring to FIG. 2 , the divided voltage Va generated by the voltage divider 52 may be input to the gain value generator 53 . The gain generator 53 may generate a gain value by using the divided voltage Va.

Next, an offset voltage is determined using the gain value (S30).

For example, referring to FIG. 2 , a gain obtained by the comparator 51 may be input to the offset adjusting unit 54 . The offset adjustment unit 54 may receive a gain value and generate an offset voltage Voffset.

Finally, a corrected set voltage is generated by calculating the offset voltage and the set voltage of the HVDC and provided to the input terminal of the HVDC (S40).

For example, referring to FIG. 2 , the calculator 55 receives a set voltage Vset and an offset voltage Voffset and generates a corrected set voltage Vfset. As described in Equation 2, the corrected set voltage Vfset may be generated through the set voltage Vset and the corrected set voltage Vfset. The corrected set voltage Vfset thus generated may be provided to the input terminal of the HVDC generator 51 .

Accordingly, the corrected set voltage Vfset is provided to the input terminal of the HVDC generator 51 to generate the output voltage Vout, thereby constantly controlling the chucking force.

The embodiments of the present invention have been described above with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, but may be manufactured in various different forms, and those of ordinary skill in the art to which the present invention pertains. It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without changing the technical spirit or essential features of the present invention. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive.

51: HVDC generator 51: voltage divider
54: gain value generator 55: offset adjustment unit
55: arithmetic unit Va: division voltage
Voffset: offset voltage Vset: set voltage
Vfset: corrected set voltage Vout: output voltage

Claims (6)

an HVDC generator that generates an output voltage at the output stage and supplies the output voltage to the substrate support module;
a voltage divider connected to the output terminal and including a first capacitor and a second capacitor connected in series with each other;
a gain value generator for generating a gain value using the divided voltage generated by the voltage divider;
an offset adjustment unit for determining an offset voltage using the gain value; and
and a calculator configured to generate a corrected set voltage by calculating the offset voltage and the set voltage, and supply the calculated set voltage to an input terminal of the HVDC generator. The method of claim 1,
The first capacitor is directly connected to the output terminal, the second capacitor is directly connected to a ground voltage, and a connection node connecting the first capacitor and the second capacitor is connected to the gain value generator,
and a capacitance of the second capacitor is greater than a capacitance of the first capacitor. The method of claim 1,
The offset adjustment unit includes a table indicating the relationship between the gain value and the offset voltage,
The offset adjusting unit selects and outputs a corresponding offset voltage using the table based on the gain input from the gain value generating unit. process chamber;
a substrate support module disposed in the process chamber and configured to receive an output voltage and generate a chucking force to fix the substrate; and
a power generator generating the output voltage;
The power generator
an HVDC generator that generates an output voltage at the output stage and supplies the output voltage to the substrate support module;
a voltage divider connected to the output terminal and including a first capacitor and a second capacitor connected in series with each other;
a gain value generator for generating a gain value using the divided voltage generated by the voltage divider;
an offset adjusting unit for determining an offset voltage using the gain value; and
and a calculator configured to generate a corrected set voltage by calculating the offset voltage and the set voltage and supply the calculated set voltage to an input terminal of the HVDC generator. 5. The method of claim 4,
The first capacitor is directly connected to the output terminal, the second capacitor is directly connected to a ground voltage, and a connection node connecting the first capacitor and the second capacitor is connected to the gain value generator,
and a capacitance of the second capacitor is greater than a capacitance of the first capacitor. An output voltage is generated at the output stage to supply the output voltage to the substrate support module,
It is connected to the output terminal and generates a divided voltage using a first capacitor and a second capacitor connected in series with each other,
generating a gain value using the divided voltage;
Determine the offset voltage using the gain value,
and generating a corrected set voltage by calculating the offset voltage and the set voltage and supplying the corrected set voltage to an input terminal.

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