KR20180131529A - Sheet for manufacturing three-dimensional integrated laminated circuit and method for manufacturing three-dimensional integrated laminated circuit - Google Patents

Abstract

A three-dimensional integrated circuit circuit board (1), which is interposed between a plurality of semiconductor chips having through electrodes and which is used for bonding the plurality of semiconductor chips to each other to form a three-dimensional integrated circuit circuit, 1 has at least a curable adhesive layer 13 and the adhesive layer 13 contains a thermally conductive filler and the standard deviation of the thickness T2 of the adhesive layer 13 is 2.0 占 퐉 or less. Sheet for manufacturing a laminated circuit (1). The sheet (1) for producing a three-dimensional integrated laminated circuit can produce a three-dimensional integrated laminated circuit having excellent heat radiation.

Description

Sheet for manufacturing three-dimensional integrated laminated circuit and method for manufacturing three-dimensional integrated laminated circuit

The present invention relates to a sheet suitable for the production of a three-dimensional integrated laminated circuit, and a method for producing a three-dimensional integrated laminated circuit using the sheet.

Development of a three-dimensional integrated laminated circuit (hereinafter sometimes referred to as a " laminated circuit ") in which a plurality of semiconductor chips are three-dimensionally laminated is progressing from the viewpoint of the recent increase in capacity and functionality of electronic circuits. In such a laminated circuit, a semiconductor chip having a penetrating electrode (TSV) penetrating from the circuit formation surface to the opposite surface is used for miniaturization and high performance. In this case, the stacked semiconductor chips are electrically connected to each other through contact between the penetrating electrodes (or bumps formed on the end portions of the penetrating electrodes) provided in the semiconductor chips.

In the case of manufacturing such a laminated circuit, in order to secure the electrical connection and the mechanical strength described above, a resin composition is used to bond the semiconductor chips to each other while electrically connecting the penetrating electrodes. For example, Patent Document 1 proposes a method in which a film-like adhesive generally called NCF (Non-Conductive Film) is interposed between semiconductor chips to bond the semiconductor chips to each other.

Incidentally, in the above-described laminated circuit, since a plurality of semiconductor chips are stacked, heat is liable to be generated when a current is passed through the electric circuit. The heat generation of the laminated circuit causes a reduction in the arithmetic processing ability or a malfunction, which causes the performance of the laminated circuit to deteriorate. In addition, if the laminated circuit generates excessive heat, the laminated circuit may be deformed to cause breakage or failure. Therefore, the laminated circuit described above is required to have a high heat radiation property in order to secure reliability.

Japanese Laid-Open Patent Publication No. 2010-010368

However, there is a problem that a laminated circuit manufactured using a conventional adhesive can not necessarily achieve good heat radiation.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a three-dimensional integrated laminated circuit production sheet capable of producing a three-dimensional integrated laminated circuit having excellent heat dissipation. It is another object of the present invention to provide a method of manufacturing such a three-dimensional integrated laminated circuit.

In order to achieve the above object, first, the present invention provides a three-dimensional integrated laminated circuit which is interposed between a plurality of semiconductor chips having penetrating electrodes and which is used to adhere the plurality of semiconductor chips to each other to form a three- Wherein the sheet for production of a three-dimensionally integrated laminated circuit includes at least a curable adhesive layer, the adhesive layer contains a thermally conductive filler, and the standard deviation of the thickness (T2) of the adhesive layer is 2.0 m or less Dimensional integrated laminated circuit fabricating sheet (invention 1).

In the sheet for producing a three-dimensional integrated laminated circuit according to the invention (Invention 1), the adhesive layer contains a thermally conductive filler having a high thermal conductivity, and the standard deviation of the thickness T2 of the adhesive layer is in the above range, The laminated circuit is excellent in heat radiation. Therefore, a laminated circuit having high reliability can be manufactured by using the sheet for three-dimensional integrated circuit circuit production according to the invention (Invention 1).

In the above invention (Invention 1), it is preferable that the thermally conductive filler is made of a material selected from metal oxides, silicon carbide, carbides, nitrides and metal hydroxides (invention 2).

In the invention (Invention 1 or 2), the content of the thermally conductive filler in the adhesive layer is preferably 35 mass% or more and 95 mass% or less (Invention 3).

In the above invention (Invention 1 to 3), it is preferable that the thermal conductive filler has a thermal conductivity of 10 W / m · K or more at 23 ° C. (Invention 4).

In the above invention (Invention 1 to 4), it is preferable that the average particle diameter of the thermally conductive filler is 0.01 탆 or more and 20 탆 or less (Invention 5).

In the above inventions (Invention 1 to 5), the thermal conductivity after curing of the adhesive layer is preferably 0.5 W / m · K or more and 8.0 W / m · K or less (Invention 6).

In the above inventions (inventions 1 to 6), it is preferable that the material constituting the adhesive layer contains a thermosetting component, a high molecular weight component and a curing catalyst (invention 7).

In the above invention (Invention 1 to 7), the glass transition temperature of the high molecular weight component is preferably 50 ° C or higher (Invention 8).

In the above invention (Invention 1 to 8), it is preferable that the material constituting the adhesive layer contains a flux component (Invention 9).

In the above invention (Invention 1 to 9), it is preferable that the thickness of the adhesive layer is 2 탆 or more and 500 탆 or less (Invention 10).

In the above invention (Invention 1 to 10), the sheet for three-dimensional integrated laminate circuit production comprises a pressure-sensitive adhesive layer laminated on one side of the adhesive layer, and a pressure-sensitive adhesive layer laminated on the side opposite to the adhesive layer in the pressure- It is preferable to further provide a substrate (invention 11).

In the invention (invention 11), the thickness of the base material is preferably 10 탆 or more and 500 탆 or less (invention 12).

In the invention (Invention 11 or 12), the ratio (T2 / T1) of the thickness (T2) of the adhesive layer to the thickness (T1) of the substrate is preferably 0.01 or more and 5.0 or less.

In the invention (Inventions 11 to 13), it is preferable that the pressure-sensitive adhesive layer has a storage modulus at 23 ° C of 1 × 10 ³ Pa or more and 1 × 10 ⁹ Pa or less.

In the above inventions (inventions 11 to 14), the tensile modulus of the base material at 23 캜 is preferably 100 MPa or more and 5000 MPa or less (invention 15).

Secondly, the present invention relates to a method for producing a three-dimensional integrated circuit laminate circuit-forming sheet (Invention 1 to 10), wherein the adhesive layer of the three-dimensional integrated laminate circuit- A step of bonding at least one surface of a semiconductor wafer having a through-hole electrode and a surface opposite to the surface of the semiconductor wafer; and dicing the semiconductor wafer together with the adhesive layer of the three- A step of separating the semiconductor chip into a semiconductor chip with an adhesive layer attached thereto and a step of disposing the semiconductor chip with a plurality of separated adhesive layers thereon so that the penetrating electrodes are electrically connected to each other and the adhesive layer and the semiconductor chip are alternately arranged A step of obtaining a semiconductor chip laminate by laminating a plurality of semiconductor chips, and a step of curing the adhesive layer in the semiconductor chip laminate, And adhering the semiconductor chips constituting the laminate to each other (invention 16).

According to the sheet for producing a three-dimensional integrated laminated circuit of the present invention, it is possible to manufacture a three-dimensional integrated laminated circuit having excellent heat radiation. According to the manufacturing method of the present invention, such a three-dimensional integrated laminated circuit can be manufactured.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a sectional view of a three-dimensionally integrated laminated circuit-producing sheet according to a first embodiment of the present invention. Fig.
2 is a cross-sectional view of a three-dimensional integrated laminate circuit-producing sheet according to a second embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described.

[Sheet for the production of three-dimensional integrated laminated circuit]

Fig. 1 shows a cross-sectional view of a three-dimensional integrated laminate circuit-producing sheet 1 according to the first embodiment. 1, the three-dimensionally integrated laminated circuit-producing sheet 1 according to the present embodiment (hereinafter also referred to as a "production sheet 1") comprises an adhesive layer 13 and an adhesive layer 13 And a release sheet (14) laminated on at least one side of the release sheet (14). Further, the release sheet 14 may be omitted.

2 shows a cross-sectional view of the three-dimensional integrated laminate circuit-forming sheet 2 according to the second embodiment. 2, the three-dimensional integrated laminate circuit-producing sheet 2 (hereinafter sometimes referred to as a " production sheet 2 ") according to the present embodiment includes a base material 11, A pressure sensitive adhesive layer 12 laminated on one surface side and an adhesive layer 13 laminated on the side of the pressure sensitive adhesive layer 12 opposite to the substrate 11. Further, the release sheet 14 may be laminated on the surface of the adhesive layer 13 opposite to the pressure-sensitive adhesive layer 12.

In the three-dimensional integrated laminate circuit-producing sheets 1 and 2 according to the present embodiment, the adhesive layer 13 contains a thermally conductive filler having a high thermal conductivity. In the three-dimensional integrated circuit circuit-forming sheets 1 and 2 according to the present embodiment, the standard deviation of the thickness T2 of the adhesive layer 13 is 2.0 占 퐉 or less.

In general, the laminated circuit has a structure in which a large number of circuits as a heat source are included and a heat dissipation is not good, because a plurality of semiconductor chips are stacked. Therefore, when a current is passed through the lamination circuit, the lamination circuit is liable to generate heat, and the generated heat does not escape to the outside.

However, in the lamination circuit manufactured by using the three-dimensional integrated circuit circuit production sheets 1 and 2 according to the present embodiment, the semiconductor chips are bonded together by the adhesive layer 13 having excellent heat radiation property by containing the thermally conductive filler. The heat is liable to be released from the end portion of the adhesive layer 13. When the standard deviation of the thickness T2 of the adhesive layer 13 is in the above range, the thickness of the adhesive layer 13 constituting the lamination circuit becomes uniform and the thickness of the lamination circuit itself becomes uniform. As a result, The heat conduction in the circuit is excellent. As described above, the laminated circuit as a whole is excellent in heat dissipation and is prevented from becoming excessively hot even when a current flows. As a result, a laminated circuit having high reliability can be manufactured.

On the other hand, since a laminated circuit is obtained by laminating a plurality of semiconductor chips, it is generally difficult to manufacture a laminated circuit with a uniform thickness. This is because deviation of the thickness of the semiconductor chip or the adhesive layer constituting the laminated circuit from the desired thickness is at least caused by accumulation of the semiconductor chip and the adhesive layer. As a result, as a laminated circuit, One of the factors is to be different. In addition, voids may be generated when the penetrating electrodes or bumps of the semiconductor wafer are embedded in the adhesive layer, and the thickness of the adhesive layer in the lamination circuit may be partially changed by the voids. Particularly, in the laminated circuit, since there are a plurality of interfaces between the semiconductor wafer and the adhesive layer that can cause voids, the probability of causing voids is high, and it becomes more difficult to make the thickness of the laminated circuit uniform. However, in the three-dimensional integrated laminated circuit-producing sheets 1 and 2 according to the present embodiment, since the standard deviation of the thickness T2 of the adhesive layer 13 is in the above range, The deviation from the thickness is suppressed, thereby making it possible to manufacture the laminated circuit with a uniform thickness. In addition, since the standard deviation of the thickness T2 of the adhesive layer 13 is in the above range, generation of voids when the penetrating electrodes or bumps of the semiconductor wafer are embedded in the adhesive layer 13 is suppressed, This also makes it possible to manufacture the laminated circuit with a uniform thickness.

The three-dimensional integrated circuit circuit-producing sheets 1 and 2 according to the present embodiment are used for interposing a plurality of semiconductor chips having a through electrode therebetween and bonding the semiconductor chips to each other to form a three-dimensional integrated circuit will be. One end or both ends of the penetrating electrode may protrude from the surface of the semiconductor chip. The semiconductor chip may further include bumps. In this case, the bumps may be formed at one or both ends of the penetrating electrodes.

In the sheets 1 and 2 for three-dimensional integrated circuit circuit manufacturing according to the present embodiment, the adhesive layer 13 has curability. Here, "having curability" means that the adhesive layer 13 can be cured by heating or the like. That is, the adhesive layer 13 is uncured in the state of forming the production sheets 1 and 2. The adhesive layer 13 may be thermosetting or energy ray curable. However, it is preferable that the adhesive layer 13 is thermosetting from the viewpoint that the production sheets 1 and 2 are used in the production method of a laminated circuit, and that the curing can be satisfactorily performed. Specifically, when the production sheets 1 and 2 are used in the production method of a laminated circuit, as described later, the adhesive layer 13 is unified in a state of being stuck to a semiconductor wafer. As a result, a laminate of the semiconductor chip and the individual adhesive layer 13 is obtained. In the laminate, the surface on the side of the adhesive layer 13 is pasted on the laminate of semiconductor chips, and in this state, the adhesive layer 13 is cured. In general, semiconductor chips do not have permeability to an energy ray, or their permeability is very low. In such a case, if the adhesive layer 13 has a thermosetting property, the adhesive layer 13 can be quickly cured It becomes possible.

1. Adhesive layer

(1) Material

In the sheets 1 and 2 for three-dimensional integrated circuit circuit manufacturing according to the present embodiment, the material constituting the adhesive layer 13 contains a thermally conductive filler. It is preferable that the material further contains a thermosetting component, a curing agent, a curing catalyst, a high molecular weight component, a component having a flux function, and the like.

(1-1) Thermally Conductive Filler

The material constituting the adhesive layer 13 contains a thermally conductive filler. Here, the thermally conductive filler refers to a filler having a high thermal conductivity, for example, a filler having a thermal conductivity at 25 ° C of 10 W / m · K or more, preferably 20 W / m · K or more , Particularly preferably 30 W / m · K or more. The upper limit of the thermal conductivity at 25 占 폚 of the thermally conductive filler is not limited, but is usually 300 W / m 占 이하 or less.

As described above, the adhesive layer 13 exhibits excellent heat radiation properties by the interaction between the adhesive layer 13 containing a thermally conductive filler and the lamination circuit having a uniform thickness. Further, the adhesive layer 13 contains a thermally conductive filler, so that the stiffness of the obtained laminated circuit is increased, and the dimensional change due to the environmental change is less likely to occur.

Examples of the thermally conductive filler include metal oxides such as zinc oxide, magnesium oxide, alumina, titanium oxide and iron oxide, carbides such as silicon carbide and calcium carbonate, nitrides such as boron nitride and aluminum nitride, metal hydroxides such as magnesium hydroxide, It is preferable to use a filler made of a material selected from talc. Among them, metal oxides such as zinc oxide, magnesium oxide, alumina, titanium oxide and iron oxide, carbides such as silicon carbide and calcium carbonate, nitrides such as boron nitride and aluminum nitride, and the like are preferable from the viewpoint of achieving more excellent heat radiation property. It is preferable to use a filler composed of a material selected from metal hydroxides such as magnesium hydroxide. These materials may be used as a filler, a sphere-shaped bead-shaped material may be used as a filler, or the single crystal fiber may be used as a filler. The thermally conductive filler obtained from the above material may be used singly or in combination of two or more kinds. It is preferable that the thermally conductive filler does not have conductivity.

The shape of the thermally conductive filler is not particularly limited, and may have, for example, at least one shape selected from a granular shape, a needle shape, a plate shape, and an indeterminate shape. Of these, it is preferable to use a granular heat conductive filler. The filler of the thermally conductive filler in the adhesive layer 13 is improved and an efficient heat conduction path is formed in the adhesive layer 13. As a result, the adhesive layer 13 is more excellent So that it is heat-radiating.

In the case where the thermally conductive filler is granular, the average particle diameter is preferably 0.01 탆 or more, more preferably 0.05 탆 or more, and particularly preferably 0.1 탆 or more. The upper limit of the average particle diameter of the thermally conductive filler is preferably 20 占 퐉 or less, more preferably 5 占 퐉 or less, and particularly preferably 1 占 퐉 or less. When the average particle diameter of the thermally conductive filler is in the above range, the heat dissipation property of the adhesive layer 13 is more excellent and the film composition of the adhesive layer 13 is favorable, and the thermal conductivity The filling rate of the filler can be increased. The average particle diameter of the thermally conductive filler in the present specification refers to the particle diameter calculated as the arithmetic mean value by measuring the major axis diameter of 20 thermally conductive fillers randomly selected by an electron microscope.

When the thermally conductive filler is granular, the maximum particle diameter of the thermally conductive filler is preferably 50 占 퐉 or less, more preferably 25 占 퐉 or less. When the maximum particle diameter of the thermally conductive filler is 50 占 퐉 or less, the thermally conductive filler can be easily filled in the adhesive layer 13, and as a result, the adhesive layer 13 has better heat dissipation properties. When the maximum particle diameter of the inorganic filler is 50 m or less, the through electrodes (or the bumps formed on the end portions of the through electrodes) of the lamination circuit are easily electrically connected to each other, thereby effectively producing a lamination circuit having high reliability .

When the thermally conductive filler is granular, the particle size distribution (CV value) of the thermally conductive filler is preferably 15% or more, more preferably 30% or more. The particle size distribution (CV value) is preferably 80% or less, more preferably 60% or less. By setting the particle diameter distribution of the thermally conductive filler within the above-mentioned range, it is possible to achieve uniform heat dissipation efficiently. Also, the CV value is an index of the deviation of the particle diameter, and the larger the CV value, the larger the deviation of the particle diameter. Therefore, in particular, when the CV value is 15% or more, the deviation of the particle diameter becomes good, and the particle having a smaller size easily enters into the gap between the particle and the particle. This makes it possible to effectively fill the thermally conductive filler, and it becomes easy to obtain the adhesive layer 13 exhibiting a high heat-radiating property. In addition, when the CV value is 80% or less, the particle diameter of the thermally conductive filler is suppressed from becoming larger than the thickness of the adhesive layer 13. As a result, the occurrence of irregularities on the surface of the adhesive layer 13 opposite to the adhesive layer 12 is suppressed, and good adhesion can be easily obtained. Further, when the CV value is 80% or less, it is easy to form the adhesive layer 13 having a uniform performance. The particle size distribution (CV value) of the thermally conductive filler can be measured by observing the thermally conductive filler under an electron microscope to measure the major axis diameter of at least 200 particles, obtaining the standard deviation of the major axis diameter, Can be obtained as a value divided by the average particle size described above.

When the shape of the thermally conductive filler is acicular, the average axial length (average axial length in the major axis direction) of the thermally conductive filler is preferably 0.01 탆 or more, particularly 0.05 탆 or more, and more preferably 0.1 탆 or more . The average axial length is preferably 10 占 퐉 or less, more preferably 5 占 퐉 or less, further preferably 1 占 퐉 or less.

The aspect ratio of the thermally conductive filler is preferably 1 or more, and more preferably 5 or more. In addition, the aspect ratio is preferably 20 or less, and particularly preferably 15 or less. When the aspect ratio of the thermally conductive filler is in the above range, an efficient heat conduction path is formed in the adhesive layer 13, so that the adhesive layer 13 has better heat dissipation properties. The aspect ratio can be obtained as a value obtained by dividing the short axis average diameter of the thermally conductive filler by the long axis number average diameter. The short axis average diameter and the long axis number average diameter are the number average particle diameters calculated as the arithmetic mean values of short axis diameters and major axis diameters of twenty thermally conductive fillers randomly selected by transmission electron microscope.

The specific gravity of the thermally conductive filler is preferably 1 g / cm3 or more, particularly preferably 3 g / cm3 or more. The specific gravity is preferably 10 g / cm 3 or less, particularly preferably 6 g / cm 3 or less. When the specific gravity is in the above range, the heat radiation of the adhesive layer 13 is more excellent.

The content of the thermally conductive filler in the adhesive layer 13 is preferably 35% by mass or more, more preferably 40% by mass or more, based on the total amount of the materials constituting the adhesive layer 13 , And particularly preferably 50 mass% or more. The upper limit of the content of the thermally conductive filler is preferably 95 mass% or less, more preferably 90 mass% or less. In the material constituting the adhesive layer 13, the content of the thermally conductive filler is 35 mass% or more, so that the adhesive layer 13 has a better heat radiation property. Thus, the three-dimensional integrated laminated circuit- 1 and 2), it is possible to effectively manufacture a laminated circuit having excellent heat radiation performance. When the content is 95% by mass or less, the content of components other than the thermally conductive filler in the material constituting the adhesive layer 13 becomes relatively high, and the adhesive layer 13 exhibits better adhesion .

(1-2) Thermosetting component

The material constituting the adhesive layer 13 preferably contains a thermosetting component. The thermosetting component is not particularly limited as long as it is an adhesive component usually used for connecting semiconductor chips. Specific examples thereof include epoxy resins, phenol resins, melamine resins, urea resins, polyester resins, urethane resins, acrylic resins, polyimide resins, benzoxazine resins and phenoxy resins. Or two or more of them may be used in combination. Among them, an epoxy resin and a phenol resin are preferable, and an epoxy resin is particularly preferable from the viewpoint of adhesiveness and the like.

The epoxy resin has a property of being three-dimensionally reticulated upon heating to form a strong cured product. As the epoxy resin, various epoxy resins known in the art can be used, and specific examples thereof include glycidyl ethers of phenols such as bisphenol A, bisphenol F, resorcinol, phenyl novolac, and cresol novolak; Glycidyl ethers of alcohols such as butanediol, polyethylene glycol, and polypropylene glycol; Glycidyl ethers of carboxylic acids such as phthalic acid, isophthalic acid, and tetrahydrophthalic acid; Glycidyl type or alkyl glycidyl type epoxy resin in which active hydrogen bonded to nitrogen atom such as aniline isocyanurate is substituted with glycidyl group; Vinylcyclohexane diepoxide, 3,4-epoxycyclohexylmethyl-3,4-dicyclohexanecarboxylate, 2- (3,4-epoxy) cyclohexyl-5,5-spiro (3,4- ) Cyclohexane-m-dioxane, and the like, so-called alicyclic epoxides in which an epoxy is introduced by, for example, oxidizing a carbon-carbon double bond in a molecule. In addition, an epoxy resin having a biphenyl skeleton, a dicyclohexadiene skeleton, a naphthalene skeleton or the like may be used. These epoxy resins may be used singly or in combination of two or more.

The content of the thermosetting component in the material constituting the adhesive layer 13 is preferably 5% by mass or more, more preferably 10% by mass or more, based on the total amount of the materials constituting the adhesive layer 13 More preferable. The upper limit of the content of the thermosetting component is preferably 75 mass% or less, more preferably 55 mass% or less. When the content of the thermosetting component is in the above range, it is easy to adjust the above-described exothermic start temperature and exothermic peak temperature to the above-mentioned range.

(1-3) Hardener / Curing Catalyst

When the material constituting the adhesive layer 13 contains the above-mentioned thermosetting component, it is preferable that the material further contains a curing agent and a curing catalyst.

The curing agent is not particularly limited, but phenols, amines, thiols and the like are exemplified and can be appropriately selected depending on the kind of the above-mentioned thermosetting component. For example, when an epoxy resin is used as a curable component, phenols are preferred from the viewpoint of reactivity with an epoxy resin and the like.

The phenols include, for example, bisphenol A, tetramethyl bisphenol A, diallyl bisphenol A, biphenol, bisphenol F, diallyl bisphenol F, triphenylmethane type phenol, tetrakisphenol, novolak type phenol, And resins. These resins may be used singly or in combination of two or more.

The curing catalyst is not particularly limited, and examples thereof include an imidazole-based catalyst, phosphorus-based catalyst, and amine-based catalyst, and can be appropriately selected depending on the kind of the above-mentioned thermosetting component. As the curing catalyst, it is preferable to use a latent curing catalyst that is activated when heated at a temperature higher than the high-temperature squeezing temperature for melting the solder without being activated under predetermined conditions. The latent curing catalyst is also preferably used as a latent curing catalyst microencapsulated.

For example, in the case of using an epoxy resin as a curable component, it is preferable to use an imidazole-based curing catalyst as a curing catalyst from the viewpoints of reactivity with an epoxy resin, storage stability, physical properties of the cured product, . As the imidazole-based curing catalyst, known catalysts can be used, but an imidazole catalyst having a triazine skeleton is preferable from the viewpoints of excellent curability, storage stability and connection reliability. These may be used alone or in combination of two or more. They may also be used as a latent curing catalyst microencapsulated. The melting point of the imidazole-based curing catalyst is preferably 200 占 폚 or higher, more preferably 250 占 폚 or higher, from the viewpoints of excellent curability, storage stability and connection reliability.

In the present embodiment, the content of the curing catalyst in the material constituting the adhesive layer 13 is preferably 0.1% by mass or more based on the total amount of the materials constituting the adhesive layer 13, More preferably 0.2% by mass or more, and particularly preferably 0.4% by mass or more. The upper limit of the content of the curing catalyst is preferably 10 mass% or less, more preferably 5 mass% or less, and particularly preferably 3 mass% or less. In the material constituting the adhesive layer 13, if the content of the curing catalyst is the above lower limit value or more, the thermosetting component can be sufficiently cured. On the other hand, if the content of the curing catalyst is not more than the upper limit, the storage stability of the adhesive layer 13 becomes good.

(1-4) High molecular weight component

The material constituting the adhesive layer 13 preferably contains a high molecular weight component other than the above-mentioned thermosetting component. By containing such a high molecular weight component, the 90 DEG C melt viscosity and the average linear expansion coefficient of the material satisfy the numerical range described later, and the connection reliability of the obtained laminated circuit becomes high.

Examples of the high molecular weight component include (meth) acrylic resins, phenoxy resins, polyester resins, polyurethane resins, polyimide resins, polyamideimide resins, siloxane modified polyimide resins, polybutadiene resins, , Styrene-butadiene-styrene copolymer, styrene-ethylene-butylene-styrene copolymer, polyacetal resin, polyvinyl acetal resin including polyvinyl butyral resin, butyl rubber, chloroprene rubber, polyamide resin, acrylonitrile- Acrylonitrile-butadiene-styrene copolymer, polyvinyl acetate, and nylon. These may be used singly or in combination of two or more kinds. .

In the present specification, "(meth) acrylic acid" means both of acrylic acid and methacrylic acid. The same applies to other similar terms such as " (meth) acrylic resin ".

Among the above-mentioned high molecular weight components, it is preferable to use at least one selected from the group consisting of a polyvinyl acetal resin and a polyester resin and a phenoxy resin. The material constituting the production sheet contains such a high molecular weight component that the melt viscosity at 90 DEG C and the average linear expansion coefficient become low together, and as a result, it becomes easy to set these values within the numerical range described later.

Here, the polyvinyl acetal resin is obtained by acetalizing polyvinyl alcohol obtained by saponifying polyvinyl acetate with aldehyde. Examples of the aldehyde used for acetalization include n-butylaldehyde, n-hexylaldehyde, n-valeraldehyde and the like. As the polyvinyl acetal resin, it is also preferable to use a polyvinyl butyral resin obtained by acetalizing n-butylaldehyde.

Examples of the polyester resin include a polyester resin obtained by polycondensation of a dicarboxylic acid component and a diol component such as polyethylene terephthalate resin, polybutylene terephthalate resin and polyethylene oxalate resin; Modified polyester resins such as urethane-modified polyester resins obtained by reacting these with polyisocyanate compounds; And a polyester resin obtained by grafting an acrylic resin and / or a vinyl resin. One type or two or more types can be used in combination.

It is particularly preferable that the material constituting the adhesive layer 13 contains a polyvinyl acetal resin or a polyester resin as the high molecular weight component and further contains a phenoxy resin. When a phenoxy resin is additionally contained, the material constituting the adhesive layer 13 can more easily satisfy the melt viscosity and average coefficient of linear expansion at 90 DEG C, which will be described later.

Examples of the phenoxy resin include, but are not limited to, a bisphenol A type, a bisphenol F type, a bisphenol A / bisphenol F copolymer type, a biphenol type, and a biphenyl type.

The low molecular weight component preferably has a lower limit value of 50 캜 or higher, more preferably 100 캜 or higher, and particularly preferably 120 캜 or higher. The high molecular weight component preferably has an upper limit value of the softening point of 200 캜 or lower, more preferably 180 캜 or lower, and particularly preferably 150 캜 or lower. By containing a high molecular weight component having a softening point lower than the lower limit value, the average linear expansion coefficient of the material constituting the adhesive layer 13 can be reduced, and the numerical range described later can be easily satisfied. If the softening point is not more than the upper limit value, embrittlement of the adhesive layer 13 can be suppressed. The softening point is a value measured based on ASTM D1525.

The lower limit of the glass transition temperature of the high molecular weight component is preferably 50 ° C or higher, more preferably 60 ° C or higher, and particularly preferably 80 ° C or higher. The high molecular weight component preferably has an upper limit of the glass transition temperature of 250 캜 or lower, more preferably 200 캜 or lower, and particularly preferably 180 캜 or lower. By containing a high molecular weight component having a glass transition temperature of at least the lower limit value, the average linear expansion coefficient of the material constituting the adhesive layer 13 can be reduced, and the numerical range described later can be easily satisfied. When the glass transition temperature is not higher than the upper limit, the compatibility with other materials is excellent. The glass transition temperature of the high molecular weight component is a value measured using a differential scanning calorimeter.

The high molecular weight component preferably has a weight average molecular weight of 10,000 or more, more preferably 30,000 or more, and particularly preferably 50,000 or more. The upper limit value is preferably not more than 1,000,000, more preferably not more than 700,000, and particularly preferably not more than 500,000. When the weight average molecular weight is not lower than the lower limit value, it is preferable because the melt viscosity can be lowered while maintaining film formability. When the weight average molecular weight is not more than the upper limit value, compatibility with a low molecular weight component such as a thermosetting component improves, which is preferable. The weight average molecular weight in the present specification is a value in terms of standard polystyrene measured by Gel Permeation Chromatography (GPC).

The content of the high molecular weight component in the material constituting the adhesive layer 13 is preferably 3% by mass or more, more preferably 5% by mass or more, based on the total amount of the materials constituting the adhesive layer 13 , And particularly preferably at least 7% by mass. The content of the high molecular weight component is preferably 95 mass% or less, more preferably 90 mass% or less, and particularly preferably 80 mass% or less. When the content of the high molecular weight component is not lower than the lower limit value, the 90 ° C melt viscosity of the material constituting the adhesive layer 13 can be made to a lower value, and the numerical range described above can be easily satisfied. On the other hand, if the content of the high molecular weight component is less than the upper limit value, the coefficient of linear thermal expansion of the material constituting the adhesive layer 13 can be further reduced, and the numerical range described later can be easily satisfied.

(1-5) Component having flux function

In the present embodiment, when the penetrating electrode or the bump of the semiconductor chip is bonded by solder, the material constituting the adhesive layer 13 contains a component having a flux function (hereinafter may be referred to as a " flux component " . The flux component has a function of removing the metal oxide film formed on the electrode surface, and makes it possible to make the electrical connection between the electrodes by the solder more reliable, and to improve the connection reliability in the solder joint.

The flux component is not particularly limited, but a component having a phenolic hydroxyl group and / or a carboxyl group is preferable, and a component having a carboxyl group is particularly preferable. The component having a carboxyl group has a flux function and also has an action as a curing agent when an epoxy resin to be described later is used as a thermosetting component. Therefore, the component having a carboxyl group reacts and is consumed as a curing agent after the completion of the solder bonding, so that the problem caused by the excessive flux component can be suppressed.

Specific flux components include, for example, glutaric acid, 2-methylglutaric acid, orthoanisolic acid, diphenolic acid, adipic acid, acetylsalicylic acid, benzoic acid, benzylic acid, azelaic acid, benzylbenzoic acid, malonic acid, (Hydroxymethyl) propionic acid, salicylic acid, o-methoxybenzoic acid, m-hydroxybenzoic acid, succinic acid, 2,6-dimethoxymethyl paracresol, benzoic acid hydrazide, The present invention relates to a process for the preparation of a compound of formula (I), wherein the compound of formula (I) is selected from the group consisting of dihydrazide, dihydrazide, succinic acid dihydrazide, glutaric acid dihydrazide, salicylic acid hydrazide, iminodiacetic acid dihydrazide, itaconic acid dihydrazide, , Benzophenone hydrazone, 4,4'-oxybisbenzenesulfonyl hydrazide, adipic acid dihydrazide, and rosin derivatives. These may be used singly or in combination of two or more kinds. .

Examples of the rosin derivatives include rosin derivatives, rosin-modified phenol resins, and rosin-modified alkyd resins. Examples of the rosin derivatives include sorbic acid, toluidine, wood rosin,

Among them, it is particularly preferable to use at least one selected from 2-methylglutaric acid, adipic acid and rosin derivatives. 2-methylglutaric acid and adipic acid are excellent in the flux function even if a small amount of 2-methylglutaric acid and adipic acid has two carboxyl groups in the molecule while the molecular weight of the material constituting the adhesive layer 13 is relatively small. Can be particularly preferably used. The rosin derivative can be used particularly preferably in the present embodiment because the rosin derivative has a high softening point and is capable of imparting flux properties while maintaining a low linear expansion coefficient.

At least one of the melting point and the softening point of the flux component is preferably 80 DEG C or higher, more preferably 110 DEG C or higher, and still more preferably 130 DEG C or higher. When at least one of the melting point and the softening point of the flux component is within the above range, it is preferable because a superior flux function can be obtained and outgas can be reduced. The upper limit of the melting point and the softening point of the flux component is not particularly limited, but may be, for example, not more than the melting point of the solder.

In the present embodiment, the content of the flux component in the material constituting the adhesive layer 13 is preferably 0.1% by mass or more based on the total amount of the materials constituting the adhesive layer 13, More preferably 0.2 mass% or more, and particularly preferably 0.3 mass% or more. The upper limit of the content of the flux component is preferably 20 mass% or less, more preferably 15 mass% or less, and particularly preferably 10 mass% or less. When the content of the flux component in the material constituting the adhesive layer 13 is not less than the lower limit value described above, the electrical connection between the electrodes by the solder is made more reliable, and the connection reliability in the solder joint can be further enhanced. On the other hand, when the content of the flux component is not more than the upper limit value, problems such as ion migration due to an excessive flux component can be prevented.

(1-6) Other components

The adhesive layer 13 may be formed of a plasticizer, a stabilizer, a tackifier, a colorant, a coupling agent, an antistatic agent, an antioxidant, a conductive particle, or a thermally conductive filler other than the above- An inorganic filler, and the like.

For example, when the anisotropic conductivity is imparted to the three-dimensional integrated-circuit-circuit-forming sheets 1 and 2 because the material constituting the adhesive layer 13 contains conductive particles or the like, the solder joint may be supplemented, The semiconductor chips can be electrically connected to each other.

(2) Properties

(2-1) Thermal conductivity

The thermal conductivity of the adhesive layer 13 after curing is preferably 0.5 W / m · K or more, particularly 0.7 W / m · K or more in the sheets 1 and 2 for three-dimensional integrated circuit circuit manufacturing according to the present embodiment And further preferably 1.0 W / m · K or more. The thermal conductivity is preferably 8.0 W / m · K or less, more preferably 4.0 W / m · K or less, further preferably 3.0 W / m · K or less. Since the thermal conductivity of the adhesive layer 13 is 0.5 W / m · K or more, the adhesive layer 13 easily exhibits good heat dissipation properties. By using the sheets 1 and 2 for three-dimensional integrated circuit circuit manufacturing according to the present embodiment, The laminated circuit can be effectively manufactured. On the other hand, when the thermal conductivity is 8.0 W / m · K or less, the content of the thermally conductive filler in the adhesive layer 13 is not excessively increased. As a result, the heat radiation property of the adhesive layer 13, The adhesive property of the adhesive layer 13 and the sheet formability are both easily achieved. The method of measuring the thermal conductivity of the adhesive layer 13 is as shown in the following test examples.

(2-2) Melt viscosity

In the three-dimensional integrated laminate circuit-forming sheets 1 and 2 according to the present embodiment, the material constituting the adhesive layer 13 has a melt viscosity at 90 占 폚 before curing (hereinafter referred to as " 90 占 폚 melt viscosity " Is preferably 5.0 x 10 ⁵ Pa s or less, more preferably 1.0 x 10 ⁵ Pa s or less, and further preferably 5.0 x 10 ⁴ Pa s or less. When the melt viscosity at 90 DEG C is not more than the upper limit value, when the adhesive layer 13 is sandwiched between the electrodes, it satisfactorily follows the irregularities caused by the penetrating electrodes or bumps on the surface of the semiconductor chip, It is possible to prevent the generation of voids at the interface between the substrate and the substrate. The 90 占 폚 melt viscosity is preferably 1.0 x 10 < ⁰ > Pa s or more, more preferably 1.0 x 10 &^lt; ¹ > Pa s or more, and further preferably 1.0 x 10 < ² > If the melt viscosity at 90 DEG C is not lower than the lower limit described above, the material constituting the adhesive layer 13 does not flow excessively, and thus the apparatus can be prevented from being contaminated at the time of pasting the adhesive layer 13 or stacking semiconductor chips. Therefore, the three-dimensional integrated-circuit-circuit-forming sheets 1 and 2 according to the present embodiment have high reliability since the 90 占 폚 melt viscosity of the constituent materials is in the above range.

Here, the 90 占 폚 melt viscosity of the material constituting the adhesive layer 13 can be measured using a flow tester. Specifically, a 50-kgf load, a temperature range of 50 to 120 占 폚, and a temperature increase rate of 10 占 폚 / min (thickness: 10 占 퐉) were measured for a 15-mm thick adhesive layer 13 using a flow tester (CFT-100D manufactured by Shimadzu Corporation) The melt viscosity can be measured under the conditions of

(2-3) Average linear expansion coefficient

In the present embodiment, the material constituting the adhesive layer 13 is selected so that the average linear expansion coefficient (hereinafter simply referred to as "average linear expansion coefficient") of the cured product at 0 to 130 ° C is 45 ppm More preferably 35 ppm or less, and further preferably 25 ppm or less. If the average linear expansion coefficient is less than the upper limit value, the difference in coefficient of linear expansion between the adhesive layer 13 made of a cured product and the semiconductor chip becomes small, and the stress that may occur between the adhesive layer 13 and the semiconductor chip . As a result, the three-dimensional integrated laminate circuit-producing sheets 1 and 2 according to the present embodiment can achieve high connection reliability between the semiconductor chips and exhibit high connection reliability particularly in the temperature cycle test shown in the embodiment .

On the other hand, the lower limit value of the average coefficient of linear expansion is not particularly limited, but is preferably 5 ppm or more, and more preferably 10 ppm or more, from the viewpoint of film formability.

Here, the average coefficient of linear expansion of the material constituting the adhesive layer 13 can be measured using a thermomechanical analyzer. Specifically, the cured product obtained by curing the adhesive layer 13 by forming the adhesive layer 13 having a thickness of 45 占 퐉 on the substrate and then treating it at 160 占 폚 for 1 hour is subjected to thermomechanical analysis TMA4030SA manufactured by AX Corporation) under the conditions of a load of 2 g, a temperature range of 0 to 300 占 폚, and a temperature increase rate of 5 占 폚 / min. From the measurement results, the average linear expansion coefficient at 0 to 130 占 폚 can be calculated.

(2-4) Glass transition temperature

In the present embodiment, as the material constituting the adhesive layer 13, the glass transition temperature (Tg) of the cured product is preferably 150 占 폚 or higher as the lower limit value, more preferably 200 占 폚 or higher, and particularly preferably 240 占 폚 or higher Do. If the glass transition temperature of the cured product is not lower than the above lower limit value, it is preferable that the cured product is not deformed during the temperature cycle test, and stress is hardly generated. On the other hand, the upper limit value of the glass transition temperature of the cured product is not particularly limited, but from the viewpoint of suppressing embrittlement of the cured product, it is preferably 350 ° C or lower, more preferably 300 ° C or lower.

The glass transition temperature of the cured product of the material constituting the adhesive layer 13 was measured using a dynamic viscoelasticity measuring instrument (DMA Q800, manufactured by TA Instruments Co., Ltd.) at a frequency of 11 Hz, an amplitude of 10 m, (Loss elastic modulus / storage elastic modulus) when the temperature is elevated from 0 占 폚 to 300 占 폚 in a temperature range of 占 폚 / min. To measure viscoelasticity in the tensile mode.

(2-5) 5% mass reduction temperature

It is preferable that the cured product of the material constituting the adhesive layer 13 in the three-dimensional integrated laminated circuit production sheets 1 and 2 according to the present embodiment has a 5% mass reduction temperature by thermogravimetry of 350 ° C or higher And particularly preferably 360 ° C or higher. The 5% mass reduction temperature is 350 DEG C or higher, whereby the cured product of the adhesive layer 13 is excellent in resistance to high temperatures. Therefore, even when the cured product is exposed to a high temperature in the production of a laminated circuit, the generation of volatile components accompanying decomposition of the contained components of the cured product is suppressed, and the performance of the laminated circuit is maintained satisfactorily. The upper limit of the 5% mass reduction temperature is not particularly limited, but the 5% mass reduction temperature is preferably 500 ° C or lower.

Here, the 5% mass reduction temperature can be measured using a simultaneous differential thermal / thermogravimetry device. Specifically, a cured product obtained by forming an adhesive layer 13 having a thickness of 45 占 퐉 on a substrate and then curing the adhesive layer 13 at 160 占 폚 for 1 hour is subjected to a heat treatment in accordance with JIS K7120: 1987, The temperature was changed from 40 占 폚 to 550 占 폚 at a gas inlet rate of 100 ml / min and a temperature raising rate of 20 占 폚 / min by using a differential thermal and simultaneous thermogravimeter (DTG-60 manufactured by Shimadzu Corporation) And thermogravimetric measurements are carried out. Based on the obtained thermogravimetric curve, a temperature (5% mass reduction temperature) at which the mass is reduced by 5% with respect to the mass at the temperature of 100 占 폚 is obtained.

(2-6) Storage modulus

In the three-dimensional integrated laminate circuit-forming sheets 1 and 2 according to the present embodiment, the storage elastic modulus at 23 ° C after curing of the adhesive layer 13 is preferably 1.0 × 10 ² MPa or more, particularly 1.0 × 10 2 ³ MPa or more. The storage elastic modulus is preferably 1.0 10 ⁵ MPa or less, more preferably 1.0 10 ⁴ MPa or less. When the storage elastic modulus is in the above range, the laminate in which the semiconductor chips and the individual adhesive layers 13 are alternately stacked has good strength when the laminated circuit is manufactured. As a result, even when the semiconductor chips are further laminated or when the laminate is handled, the laminated state is maintained satisfactorily, and a laminated circuit having excellent quality can be manufactured.

Here, the storage elastic modulus at 23 캜 after curing of the adhesive layer 13 can be measured using a dynamic viscoelasticity measuring instrument. Specifically, a cured product obtained by forming an adhesive layer 13 having a thickness of 45 탆 on a substrate and then curing the adhesive layer 13 by treating the adhesive layer 13 at 160 캜 for 1 hour is subjected to a dynamic viscoelasticity measuring instrument (DMA Q800, manufactured by Instrument Co., Ltd.) is used to measure the viscoelasticity by the tensile mode when the temperature is raised from 0 占 폚 to 300 占 폚 at a frequency of 11 Hz, an amplitude of 10 占 퐉, and a heating rate of 3 占 폚 / min. From the measurement results, the storage elastic modulus (MPa) at 23 deg. C after curing of the adhesive layer can be read.

(2-7) Heat generation initiation temperature and exothermic peak temperature by differential scanning calorimetry

In the three-dimensional integrated laminate circuit-forming sheets 1 and 2 according to the present embodiment, the adhesive layer 13 before curing is heated by a differential scanning calorimetry (DSC) method at a heating rate of 10 ° C / It is preferable that the initiation temperature (TS) is within the range of 70 占 폚 to 150 占 폚, particularly preferably within the range of 100 占 폚 to 150 占 폚, and more preferably within the range of 120 占 폚 to 150 占 폚. When the heat generation starting temperature (TS) is in the above range, the adhesive layer 13 is hardened at an unintended stage, for example, when heat generated when the semiconductor wafer is diced by the dicing blade is received And the storage stability of the production sheets 1 and 2 is also excellent. Particularly, in the case where a plurality of adhesive layers 13 existing between semiconductor chips are cured in a batch after a plurality of semiconductor chips are stacked to manufacture a laminated circuit, It is possible to suppress the curing of the adhesive layer 13 at a stage where the adhesive layer 13 is not cured.

In the three-dimensional integrated laminate circuit-forming sheets 1 and 2 according to the present embodiment, the adhesive layer 13 before curing is heated by a differential scanning calorimetry (DSC) method at a heating rate of 10 ° C / It is preferable that the peak temperature (TP) is the heat generation starting temperature (TS) + 5 to 60 占 폚, particularly TS + 5 to 50 占 폚, further preferably TS + 10 to 40 占 폚. When the exothermic peak temperature TP is in the range described above, the time from the start to the completion of the curing is relatively short when the adhesive layer 13 is cured. Generally, when a laminated circuit is manufactured using an adhesive such as NCF, it takes time to cure the adhesive. Therefore, the tack time in the production of the laminated circuit is often defined by the curing time of the adhesive. Therefore, by shortening the time until the adhesive layer 13 is cured as described above, it is possible to effectively shorten the tack time. Particularly, there is a case where a plurality of adhesive layers 13 existing between semiconductor chips are cured in a batch after a plurality of semiconductor chips are stacked (temporary mounting) have. Even in such a case, since the exothermic peak temperature TP is in the above-described range, in the unintended stage before the lamination of the semiconductor chips is completed, the adhesive layer 13) can be suppressed from being hardened.

Here, the heating start temperature and the heating peak temperature can be measured using a differential scanning calorimeter. Specifically, the adhesive layer 13 having a thickness of 15 mm was heated from a room temperature to 300 캜 at a temperature raising rate of 10 캜 / min using a differential scanning calorimeter (Q2000, manufactured by TA Instruments). From the DSC curve thus obtained , The temperature at which heat generation starts (heat generation start temperature) (TS), and the exothermic peak temperature (TP) can be obtained.

(2-8) Thickness of the adhesive layer

The thickness T2 of the adhesive layer 13 in the three-dimensional integrated laminate circuit-producing sheets 1 and 2 according to the present embodiment is preferably 2 m or more, more preferably 5 m or more, and further preferably 10 m Or more. The thickness T2 is preferably 500 占 퐉 or less, more preferably 300 占 퐉 or less, and further preferably 100 占 퐉 or less. When the thickness T2 of the adhesive layer 13 is 2 占 퐉 or more, penetrating electrodes or bumps existing in the semiconductor chip can be satisfactorily embedded in the adhesive layer 13. [ Further, when the thickness T2 of the adhesive layer 13 is 500 占 퐉 or less, when the semiconductor chip having the penetrating electrode is bonded via the adhesive layer 13, the adhesive layer 13 is excessively seated on the side surface A highly reliable semiconductor device can be manufactured. The thickness T2 of the adhesive layer 13 is an average value when a total of 100 points are measured at an interval of 50 mm in the production sheet 1. [

The standard deviation of the thickness T2 of the adhesive layer 13 in the three-dimensional integrated laminated circuit fabricating sheet 1 or 2 according to the present embodiment is 2.0 m or less, preferably 1.8 m or less, and particularly preferably 1.6 m or less . When the standard deviation exceeds 2.0 占 퐉, voids are liable to occur when the penetrating electrodes or bumps of the semiconductor wafer are embedded in the adhesive layer 13 by using the production sheets 1 and 2, It becomes difficult to make the thickness of the constituent adhesive layer 13 and the thickness of the lamination circuit itself uniform. As a result, the heat radiation performance of the lamination circuit becomes insufficient. Particularly, since the laminated circuit is obtained by laminating a plurality of semiconductor chips and the adhesive layer 13, when the standard deviation of the thickness T2 of the adhesive layer 13 exceeds 2.0 占 퐉, the uniformity The heat radiation performance of the laminated circuit can not be achieved. The method for measuring the standard deviation of the thickness T2 of the adhesive layer 13 is as shown in the following test examples.

The ratio T2 of the thickness T2 of the adhesive layer 13 to the thickness T1 of the base material 11 in the sheet 2 for producing a three-dimensionally integrated laminated circuit according to the second embodiment having the base material 11 / T1) is preferably 0.01 or more, more preferably 0.1 or more, and further preferably 0.4 or more. The ratio (T2 / T1) is preferably 1.5 or less, more preferably 1.0 or less, and further preferably 0.9 or less. When the ratio (T2 / T1) is in the above range, the balance between the thickness of the base material 11 and the thickness of the adhesive layer 13 is favorable, and the handling property when the production sheet 2 is attached to the semiconductor wafer is excellent. Together, it becomes easy to adjust the adhesive suitability of the concerned adhesive sheet. As a result, it is possible to satisfactorily perform the applied adhesive, and to manufacture a laminated circuit having excellent quality. In particular, when the ratio (T2 / T1) is 0.01 or more, the relative thickness of the base material 11 in the production sheet 1 is relatively small, and the relative stiffness of the production sheet 1 is relatively low. As a result, when the production sheet 1 is attached to the semiconductor wafer, the penetrating electrodes or bumps present in the semiconductor wafer can be easily embedded in the adhesive layer 13. On the other hand, when the ratio (T2 / T1) is 1.5 or less, the relative thickness of the base material 11 in the production sheet 1 is relatively large, and the relative rigidity of the production sheet 1 is maintained relatively high. As a result, the handling property of the production sheet 1 is excellent, and the production sheet 1 can be easily attached to the semiconductor wafer. The thickness T1 of the base material 11 is an average value when a total of 100 points are measured at an interval of 50 mm in the production sheet 1. [

2. Adhesive layer

(1) Material

In the sheet 2 for producing a three-dimensionally integrated laminated circuit according to the second embodiment having the pressure-sensitive adhesive layer 12, the pressure-sensitive adhesive layer 12 may be composed of a non-curable pressure-sensitive adhesive or a curable pressure-sensitive adhesive. When the sheet 2 for producing a three-dimensional integrated circuit circuit according to the present embodiment is used in a method for manufacturing a laminated circuit, the adhesive layer 13 is formed by laminating the base material 11 and the pressure-sensitive adhesive layer 12 . Therefore, from the viewpoint of easily carrying out the exfoliation, it is preferable that the pressure-sensitive adhesive layer 12 is composed of a curable pressure-sensitive adhesive, and the pressure-sensitive adhesive force is lowered by curing.

When the pressure-sensitive adhesive layer 12 is composed of a curable pressure-sensitive adhesive, the pressure-sensitive adhesive may be an energy ray-curable pressure-sensitive adhesive or a thermosetting pressure-sensitive adhesive. Here, since the pressure-sensitive adhesive layer 12 and the adhesive layer 13 are cured in different stages, when the pressure-sensitive adhesive layer 13 has a thermosetting property, the pressure-sensitive adhesive layer 12 is preferably composed of an energy ray- , And when the adhesive layer 13 has energy ray curability, the pressure-sensitive adhesive layer 12 is preferably composed of a thermosetting pressure-sensitive adhesive. However, since it is preferable that the adhesive layer 13 has a thermosetting property for the above-mentioned reason, it is preferable that the pressure-sensitive adhesive layer 12 is made of an energy radiation curable pressure-sensitive adhesive.

The non-curable pressure-sensitive adhesive preferably has a desired adhesive force and re-releasability. For example, an acrylic pressure-sensitive adhesive, a rubber pressure-sensitive adhesive, a silicone pressure-sensitive adhesive, a urethane pressure-sensitive adhesive, a polyester pressure-sensitive adhesive, a polyvinyl ether pressure- . Among them, an acrylic pressure-sensitive adhesive is preferable from the viewpoint of effectively suppressing peeling at the interface between the pressure-sensitive adhesive layer 12 and the adhesive layer 13 at an unintended stage such as a dicing step.

The energy ray-curable pressure-sensitive adhesive may be one comprising a polymer having energy ray-curable properties as a main component, a non-energy ray-curable polymer (polymer having no energy ray curable property), a monomer having at least one energy ray- Or a mixture of oligomers as a main component. Also, a mixture of a polymer having energy ray curability and a non-energy ray curable polymer may be used, or a mixture of a polymer having energy ray curability and a monomer and / or oligomer having at least one energy ray curable group may be used. .

The polymer having energy ray curability is preferably a (meth) acrylic acid ester (co) polymer into which a functional group having energy ray curability (energy ray curable group) is introduced into the side chain. The polymer is preferably obtained by reacting an acrylic copolymer having a functional group-containing monomer unit with an unsaturated group-containing compound having a functional group binding to the functional group.

As the monomer and / or oligomer having at least one energy ray-curable group, for example, an ester of a polyhydric alcohol and (meth) acrylic acid can be used.

As the non-energy radiation curable polymer component, for example, an acrylic copolymer having the above-mentioned functional group-containing monomer unit can be used.

(2) Properties

In the sheet 3 for producing a three-dimensional integrated circuit circuit according to the present embodiment, the pressure-sensitive adhesive layer 12 preferably has a storage elastic modulus at 23 캜 of 1 x 10 ³ Pa or more, particularly 1 x 10 ⁴ Pa or more desirable. The storage elastic modulus is preferably 1 x 10 ⁹ Pa or lower, more preferably 1 x 10 ⁸ Pa or lower. The storage elastic modulus refers to the storage elastic modulus before curing when the pressure sensitive adhesive layer 12 is composed of a curable pressure sensitive adhesive. Since the storage elastic modulus of the pressure sensitive adhesive layer 12 at 23 캜 is in the above range, the penetrating electrodes or bumps present in the semiconductor wafer are favorably adhered to the adhesive layer 13 when the production sheet 2 is attached to the semiconductor wafer As shown in Fig. In the case of back-grinding the surface of the semiconductor wafer on which the bumps are not formed using the production sheets 1 and 2, it is possible to suppress the occurrence of warping or dimpling of the semiconductor wafer. The storage elastic modulus of the pressure-sensitive adhesive layer 12 at 23 캜 is measured by a dynamic viscoelasticity measuring device (ARES, manufactured by TA Instruments Co., Ltd.) at a frequency of 1 Hz, a measurement temperature range of -50 to 150 Deg.] C and a rate of temperature increase of 3 [deg.] C / min.

The thickness of the pressure-sensitive adhesive layer 12 is not particularly limited. For example, the thickness of the pressure-sensitive adhesive layer 12 is preferably 1 占 퐉 or more, more preferably 10 占 퐉 or more. The thickness is preferably, for example, 100 占 퐉 or less, particularly preferably 50 占 퐉 or less. When the thickness of the pressure-sensitive adhesive layer 12 is 1 占 퐉 or more, the pressure-sensitive adhesive layer 12 can exert a good adhesion. In addition, when the thickness is 100 占 퐉 or less, the pressure-sensitive adhesive layer 12 is prevented from becoming unnecessary thickness, and the cost can be reduced.

3. Equipment

(1) Material

In the sheet 2 for producing a three-dimensional integrated circuit circuit according to the second embodiment having the base material 11, the material constituting the base material 11 is not particularly limited. However, in the case of using the production sheet 2 as the dicing sheet integral type adhesive sheet (dicing and die bonding sheet), the material constituting the base material 11 may be a material commonly used for the base material constituting the dicing sheet . For example, the material of the substrate 11 may be selected from the group consisting of polyethylene, polypropylene, polybutene, polybutadiene, polymethylpentene, polyvinyl chloride, vinyl chloride copolymer, polyethylene terephthalate, polybutylene terephthalate, poly (Meth) acrylic acid ester copolymer, polystyrene, vinylpolyisoprene, polycarbonate, polyolefin, and the like. Of these, one kind or two or more kinds selected from the group consisting of ethylene- Or a mixture of two or more of them may be used.

When the production sheet 2 is a back grind sheet integral type adhesive sheet, the material constituting the base material 11 is preferably a material generally used for the base material constituting the back-grind sheet. For example, the material of the substrate 11 may be a resin made of a resin such as polyethylene terephthalate, polyethylene, polypropylene, ethylene-vinyl acetate copolymer, etc., and one or a mixture of two or more thereof Can be used.

The surface of the substrate 11 on the side of the pressure-sensitive adhesive layer 12 may be subjected to surface treatment such as primer treatment, corona treatment, plasma treatment or the like in order to improve adhesion with the pressure-sensitive adhesive layer 12.

(2) Properties

In the sheet 3 for producing a three-dimensional integrated circuit circuit according to the present embodiment, the tensile modulus of the base material 11 at 23 캜 is preferably 100 MPa or more, more preferably 200 MPa or more, further preferably 300 MPa or less Or more. The tensile modulus of elasticity is preferably 5000 MPa or less, more preferably 1000 MPa or less, further preferably 400 MPa or less. By setting the tensile modulus of elasticity of the base material 11 at 23 캜 within the above range, the penetrating electrodes or bumps present in the semiconductor wafer are prevented from adhering to the adhesive layer 13 when the production sheet 2 is attached to the semiconductor wafer It becomes possible to embed it. When the production sheet 2 is a dicing sheet-integrated type adhesive sheet, the tensile modulus of the base material 11 at 23 캜 is within the above range, so that the production sheet 2 is expanded, When the interval is widened, it is preferable that the base material 11 is not broken well. The tensile modulus of the base material 11 at 23 캜 can be measured using a tensile tester in accordance with JIS K7127: 1999.

The thickness (T1) of the base material 11 is not particularly limited, but is preferably, for example, 10 占 퐉 or more, and particularly preferably 15 占 퐉 or more. The thickness T1 is preferably, for example, 500 탆 or less, and particularly preferably 100 탆 or less. The value of the ratio (T2 / T1) of the thickness T2 of the adhesive layer 12 to the thickness T1 of the base material 11 described above can be obtained by the tact It is easy to set to one range and the handling property when the production sheets 1 and 2 are attached to the semiconductor wafer is excellent. As a result, it becomes possible to effectively manufacture a laminated circuit having excellent quality.

4. Release sheet

The constitution of the release sheet 14 is optional, and examples thereof include plastic films such as polyethylene terephthalate, polybutylene terephthalate, polyester films such as polyethylene naphthalate, and polyolefin films such as polypropylene and polyethylene . These peeling surfaces (surfaces contacting the adhesive layer 13) are preferably peeled. As the releasing agent used in the peeling treatment, for example, a releasing agent such as a silicone type, a fluorine type, and a long chain alkyl type can be mentioned.

The thickness of the release sheet is not particularly limited, but is usually 20 占 퐉 or more and 250 占 퐉 or less.

5. Manufacturing method of sheet for manufacturing three-dimensional integrated laminated circuit

The three-dimensional integrated laminated circuit production sheet 1 according to the first embodiment can be manufactured in the same manner as the conventional three-dimensional integrated laminated circuit production sheet. For example, in the case of producing the three-dimensional integrated laminated circuit-producing sheet 1 having the release sheet 14, the above-mentioned thermally conductive filler, the material constituting the other adhesive layer 13, A coating liquid containing a solvent or a dispersion medium is prepared and the coating liquid is coated on the release surface of the release sheet 14 by a die coater, a curtain coater, a spray coater, a slit coater, a knife coater, And the coating film is dried to produce the production sheet (2). When the coating solution can be applied, the coating solution is not particularly limited, and the component for forming the adhesive layer 13 may be contained as a solute or may be contained as a dispersion. The release sheet 14 may be peeled off as a process material or may be protected while the adhesive layer 13 is attached to the semiconductor wafer.

As a production method of a laminate in which two sheets of release sheets 14 are laminated on both sides of a three-dimensional integrated laminate circuit-forming sheet 1, a coating liquid is applied on the release surface of the release sheet 14 described above A layer formed of the adhesive layer 13 and the release sheet 14 is formed and a surface opposite to the release sheet 14 in the adhesive layer 13 of the layered product is formed A laminate composed of the release sheet 14 / the adhesive layer 13 / the release sheet 14 can be obtained by sticking to the release surface of the other release sheet 14. The release sheet 14 in this laminate may be peeled off as a process material or may be protected while the adhesive sheet 13 is attached to a semiconductor wafer.

The three-dimensional integrated laminated circuit production sheet 2 according to the second embodiment can be manufactured in the same manner as the conventional three-dimensional integrated laminated circuit production sheet 2. For example, a laminate of the adhesive layer 13 and the release sheet 14 and a laminate of the pressure-sensitive adhesive layer 12 and the substrate 11 are produced, and the adhesive layer 13 and the pressure- And these laminated bodies are brought into contact with each other to form a production sheet (2).

The layered product of the adhesive layer 13 and the release sheet 14 is obtained by preparing the above-mentioned coating solution for forming the adhesive layer 13 and applying the coating solution on the release surface of the release sheet 14 by the above- To form a coating film, and drying the coating film.

Examples of the solvent include organic solvents such as toluene, ethyl acetate and methyl ethyl ketone. By mixing these organic solvents and forming a solution having an appropriate solid content concentration, it is possible to further suppress the deviation of the thickness (T2) of the adhesive layer 13 and to prevent the adhesive layer 13 having the standard deviation described above with respect to the thickness T2 And it becomes possible to effectively form. In particular, the solid content concentration of the coating liquid is preferably 5% by mass or more, more preferably 10% by mass or more, from the viewpoint of uniformly coating the coating liquid. From the same viewpoint, the solid content concentration is preferably 55 mass% or less, and more preferably 50 mass% or less. When the concentration of the solid content is 5% by mass or more, occurrence of cratering or the like is suppressed at the time of forming the coating film, and the solvent is easily dried sufficiently, and the variation in thickness and physical properties of the adhesive layer 13 is more easily suppressed . As a result, it becomes easy to adjust the standard deviation of the thickness T2 of the adhesive layer 13 to the above-mentioned range. When the concentration of the solid content is 55% by mass or less, flocculation of the filler in the coating liquid is suppressed, the coating liquid becomes easy to be conveyed, and coating unevenness (crossing), which occurs continuously in the direction perpendicular to the coating direction, Occurrence of unevenness of the adhesive layer 13 is suppressed, and the occurrence of a variation in the thickness of the adhesive layer 13 can be further suppressed. The viscosity at 25 캜 measured by a B-type viscometer of the coating solution is preferably 20 mPa s or more, and more preferably 25 mPa s or more. The viscosity is preferably 500 mPa · s or less, and particularly preferably 100 mPa · s or less.

The layered product of the pressure-sensitive adhesive layer 12 and the substrate 11 can be obtained by preparing a coating solution containing a solvent or a dispersion medium according to a material constituting the pressure-sensitive adhesive layer 12 as desired, Is coated on one side of the substrate 11 to form a coating film, and the coating film is dried. As another manufacturing method of the laminate of the pressure-sensitive adhesive layer 12 and the base material 11, the pressure-sensitive adhesive layer 12 is formed on the release face of the release sheet for processing, Sensitive adhesive layer 12 and the base material 11 may be obtained by transferring the pressure-sensitive adhesive layer 12 to one side of the pressure-sensitive adhesive layer 11 and peeling the process release sheet from the pressure-sensitive adhesive layer 12.

[Manufacturing method of three-dimensional integrated laminated circuit]

A three-dimensional integrated laminated circuit can be manufactured using the three-dimensional integrated laminated circuit production sheets 1 and 2 according to the present embodiment. Hereinafter, an example of the manufacturing method will be described.

First, the three-dimensional integrated laminate circuit-producing sheets 1 and 2 according to the present embodiment are affixed to one surface of a semiconductor wafer having a penetrating electrode. Concretely, the surface of the three-dimensional integrated laminate circuit-forming sheets 1, 2 on the side of the adhesive layer 13 is affixed to one side of the semiconductor wafer.

Further, the semiconductor wafer having the penetrating electrode may have a weak strength. Therefore, the semiconductor wafer may be reinforced by fixing it to a support such as a support glass through a trowel. In this case, after the three-dimensional integrated-circuit-circuit-forming sheets 1 and 2 are bonded to the surface of the laminate on the semiconductor wafer side, the support is peeled together with the temporary fixing.

When the three-dimensional integrated laminate circuit-producing sheet 1 according to the first embodiment is used, a dicing sheet is further laminated. In this case, the dicing sheet may be first affixed to the semiconductor wafer, and the production sheet 1 may be affixed to the side opposite to the dicing sheet in the semiconductor wafer. The production sheet 1 may be first affixed to the semiconductor wafer, and the dicing sheet may be affixed to the side opposite to the production sheet 1 in the semiconductor wafer. Alternatively, the dicing sheet may be stuck to the surface of the laminate obtained by bonding the production sheet 1 to the semiconductor wafer on the side of the production sheet 1 side. On the other hand, in the case of using the three-dimensional integrated laminate circuit-producing sheet 2 according to the second embodiment, it is not necessary to further laminate the dicing sheet, and the following dicing process is carried out on the production sheet 2 can do.

Next, the semiconductor wafer is cut into individual chips (dicing step). At this time, the adhesive layer 13 is cut along with the semiconductor wafer. The method of cutting the wafer is not particularly limited and is carried out by various conventionally known dicing methods. For example, there is a method of cutting a semiconductor wafer using a dicing blade. Another dicing method such as laser dicing may be employed.

After the dicing process, the semiconductor chip is picked up. At this time, the semiconductor chip is picked up in a state in which the individualized adhesive layer 13 is pasted. That is, the semiconductor chip to which the adhesive layer 13 is pasted is peeled off from the pressure-sensitive adhesive layer of the dicing sheet or the pressure-sensitive adhesive layer 12 of the sheet for producing a three-dimensional integrated circuit circuit 2. When the pressure-sensitive adhesive layer 12 is made of an energy radiation curable pressure-sensitive adhesive, it is preferable to irradiate the pressure-sensitive adhesive layer 12 with an energy ray before picking up. As a result, the adhesive force of the pressure-sensitive adhesive decreases, so that the pickup of the semiconductor chip becomes easy. If necessary, the dicing sheet or the sheet for producing a three-dimensional integrated circuit circuit 2 may be expanded before pickup to widen the gap between the semiconductor chips.

Subsequently, the semiconductor chip with the adhesive layer is placed on the circuit board. The semiconductor chip to which the adhesive layer is attached is aligned so that the electrode on the semiconductor chip side and the electrode on the circuit board are opposed to each other and placed on the circuit board.

Further, the semiconductor chip and the circuit board with the adhesive layer are heated and pressed, and then cooled. As a result, the semiconductor chip and the circuit board are bonded via the adhesive layer 13, and the electrodes of the semiconductor chip and the electrodes of the chip mounting portion on the circuit board are electrically bonded via the solder bumps formed on the semiconductor chip. The conditions of the solder bonding may vary depending on the metal composition to be used. For example, in the case of Sn-Ag, it is preferable to heat the solder at 200 to 300 ° C for 1 to 30 seconds.

When the solder bonding is performed, the adhesive layer 13 interposed between the semiconductor chip and the circuit board is cured. The curing can be carried out, for example, by heating at 100 to 200 DEG C for 1 to 120 minutes. This curing step may be carried out under pressurized conditions. The curing step may be omitted when the curing of the adhesive layer 13 is completed in the above-described step of solder bonding.

Subsequently, a semiconductor chip with a new adhesive layer is laminated on the semiconductor chip bonded on the circuit board as described above. At this time, the surface of the semiconductor chip to which the new adhesive layer is attached, on the side of the adhesive layer 13, and the surface of the circuit substrate of the semiconductor chip stacked on the circuit substrate are in contact with each other, Are stacked so that they are electrically connected to each other. Thereafter, solder bonding is performed between the penetrating electrodes of the newly stacked semiconductor chips and the penetrating electrodes of the semiconductor chips stacked on the circuit board, and the adhesive layer 13 interposed between these semiconductor chips is cured. The solder bonding at this time and the curing of the adhesive layer 13 can be carried out in accordance with the above-described methods and conditions. Thereby, a laminate in which two semiconductor chips are laminated on a circuit board is obtained.

By repeating the above-described steps of laminating the semiconductor chip with the adhesive layer on the semiconductor chip stacked on the circuit board, and curing the solder joint and the adhesive layer 13, the plurality of semiconductor chips are bonded to the adhesive layer A laminated circuit adhered with a hardened material of the laminated body 13 can be obtained. In this laminated circuit, since the adhesive layer 13 contains the thermally conductive filler and the standard deviation of the thickness T2 of the adhesive layer 13 is in the above-mentioned range, the laminated circuit is excellent in heat radiation property. Therefore, by using the sheets 1 and 2 for three-dimensional integrated circuit circuit manufacturing according to the present embodiment, a laminated circuit having high reliability can be manufactured.

Further, in the above-described method of manufacturing a laminated circuit, the solder bonding and the adhesive layer 13 are cured each time one semiconductor chip is laminated. However, in order to increase the efficiency of the process, The solder bonding between these semiconductor chips and the curing of the adhesive layer 13 interposed between these semiconductor chips may be performed at the same time.

The embodiments described above are provided for the purpose of facilitating understanding of the present invention and are not described for limiting the present invention. Therefore, each element disclosed in the above embodiment is intended to include all design modifications and equivalents falling within the technical scope of the present invention.

Example

Hereinafter, the present invention will be described in more detail with reference to examples and test examples, but the present invention is not limited to the following test examples and the like at all.

[Examples 1 to 7, Comparative Example 1]

The composition containing the components shown in Table 1 was diluted with methyl ethyl ketone to a solid content concentration of 40% by mass to obtain a coating solution. The viscosity of the coating liquid at 25 캜 was measured using a B-type viscometer and found to be 50 mPa.. The coating solution was applied onto a silicone-treated release film (SP-PET381031, manufactured by Lin Tec Co., Ltd.), and the obtained coating film was dried in an oven at 100 ° C for 1 minute to obtain a first To obtain a laminate.

80 parts by mass of 2-ethylhexyl acrylate, 10 parts by mass of methyl acrylate and 10 parts by mass of 2-hydroxyethyl acrylate (100 parts by mass in terms of solid content conversion value; And 10 parts by mass of an isocyanate-based crosslinking agent (Coronate L manufactured by Polyurethane Industry Co., Ltd.) were mixed to prepare a pressure-sensitive adhesive composition.

The pressure-sensitive adhesive composition thus obtained was applied to one side of an ethylene-methacrylic acid copolymer (EMAA) film (thickness: 100 m, tensile elastic modulus: 230 MPa) as a substrate to form a coating film. As a result, a pressure-sensitive adhesive layer having a thickness of 10 占 퐉 and a second laminate composed of a substrate were obtained. The storage elastic modulus of the pressure-sensitive adhesive layer at 23 캜 was measured by a method described later, and found to be 4.6 × 10 ⁵ Pa.

Subsequently, the surface of the first laminate on the side of the adhesive layer and the side of the pressure-sensitive adhesive layer side of the second laminate were bonded to each other to obtain a three-dimensional integrated laminate circuit-forming sheet.

[Comparative Example 2]

The composition containing the components shown in Table 1 was diluted with methyl ethyl ketone to a solid concentration of 55% by mass to obtain a coating solution. The viscosity of the coating liquid at 25 캜 was measured using a B-type viscometer and found to be 150 mPa.. A sheet for the production of a three-dimensional integrated laminated circuit was obtained in the same manner as in Example 1, except that the adhesive layer was formed using the coating solution.

The details of the components shown in Table 1 are as follows.

High molecular weight component

Bisphenol A (BPA) / bisphenol F (BPF) copolymerized phenoxy resin: product name "ZX-1356-2", manufactured by Toto Chemical Co., Ltd., glass transition temperature 71 ° C., weight average molecular weight 60,000

Thermosetting component

Epoxy resin 1: Tris (hydroxyphenyl) methane type solid epoxy resin, manufactured by Japan Epoxy Resin Co., Ltd., product name "E1032H60", 5% weight reduction temperature 350 캜, solid, melting point 60 캜

Epoxy resin 2: bis-F type liquid epoxy resin, product of Japan Epoxy Resin Co., Ltd., product name "YL-983U", epoxy equivalent 184

Epoxy resin 3: long-chain Bis-F modified epoxy resin, manufactured by Japan Epoxy Resin Co., Ltd., product name: YL-7175

Curing catalyst

2MZA-PW: 2,4-diamino-6- [2'-methylimidazolyl- (1 ')] -ethyl-s-triazine, product name "2MZA-PW" manufactured by Shikoku Kasei Kogyo Co., ℃

Flux component

· Rosin derivative: manufactured by Arakawa Chemical Industries, softening point 124 ~ 134 ° C

filler

(Spherical alumina): spherical alumina, product name "DAM-0" manufactured by Denki Kagaku Kogyo Co., Ltd., average particle diameter 3 μm, thermal conductivity 40 W / m · K

(Spherical zinc oxide): spherical zinc oxide, manufactured by Sakai Chemical Industry Co., Ltd., average particle size: 0.6 占 퐉, thermal conductivity: 54 W / m 占 K

(UHP-2), shape: Plate shape, average particle size 11.8 占 퐉, aspect ratio 11.2, thermal conductivity in the major axis direction 200 W / m 占 K

· Fused silica filler: average particle diameter 3 μm, thermal conductivity 2 W / m · K

The storage elastic modulus of the above-mentioned pressure-sensitive adhesive layer at 23 占 폚 was measured by laminating a plurality of pressure-sensitive adhesive layers to produce a laminate of pressure-sensitive adhesive layers having a thickness of 800 占 퐉 and stamping the laminate of the pressure- Using a dynamic viscoelasticity measuring device (ARES, manufactured by TA Instruments Co., Ltd.), a sample having a storage elastic modulus at a frequency of 1 Hz, a measurement temperature range of -50 to 150 DEG C and a temperature increase rate of 3 DEG C / (Pa).

[Test Example 1] Measurement of thermal conductivity

For each of Examples and Comparative Examples, a composition containing the components shown in Table 1 was diluted with methyl ethyl ketone so as to have a solid content concentration of 40% by mass, and a silicone-treated release film (SP-PET381031, , And the obtained coating film was dried in an oven at 100 DEG C for 1 minute to form an adhesive layer having a thickness of 40 mu m. A plurality of adhesive layers obtained by this procedure were laminated so as to have a thickness of 2 mm. An adhesive layer in the form of a disc having a diameter of 5 cm was punched out from the laminate having the thickness of 2 mm to obtain a sample for measurement.

The sample was cured by heating at 130 占 폚 for 2 hours and then the thermal conductivity (W / m 占 K) was measured using a thermal conductivity meter (HC-110 manufactured by EKO Co., Ltd.). The results are shown in Table 2.

[Test Example 2] Measurement of the thickness of the adhesive layer and the standard deviation of the thickness

For the first laminate prepared in Examples and Comparative Examples, a total of 100 points of the thickness (T2) of the adhesive layer were measured at intervals of 50 mm. Based on the measurement results, the average value (占 퐉) of the thickness T2 and the standard deviation (占 퐉) of the thickness T2 were calculated. The results are shown in Table 2.

[Test Example 3] Evaluation of heat dissipation property by temperature cycle test

An evaluation wafer having bumps formed on one surface thereof and pads formed on the other surface thereof was prepared and evaluated by using a full auto multi-wafer mounter (RAD-2700F / 12 manufactured by Lin Tec Co., Ltd.) The three-dimensional integrated circuit laminated sheet produced in Examples and Comparative Examples was pasted on the side of the bump formed side and fixed to the ring frame.

Subsequently, the wafer for evaluation was diced together with the adhesive layer using a fully automatic dicing saw (DFD651, manufactured by DISCO Corporation), and the chips were separated into chips having a size of 7.3 mm x 7.3 mm in plan view.

Subsequently, the chip was picked up with a flip chip bonder (FC3000W, manufactured by Toray Engineering Co., Ltd.) together with the separated adhesive layer, and then flip-chip bonded to the substrate. Thereafter, on the first-stage chip temporarily held on the substrate, a chip having the second-level adhesive layer attached thereto was flip-chip bonded. This procedure was repeated to produce a semiconductor device in which a total of five chips were stacked on a substrate.

The obtained semiconductor device was subjected to a temperature cycle test in which 1,000 cycles were given under an environment of one cycle at -55 占 폚, 10 minutes, and 125 占 폚 for 10 minutes. The connection resistance value between the semiconductor chips before and after the test was measured by a digital multimeter and the rate of change of the connection resistance value in the semiconductor device after the test with respect to the connection resistance value in the semiconductor device before the test Respectively. Then, the heat radiation performance was evaluated according to the following evaluation criteria. The results are shown in Table 2.

?: The change rate of the connection resistance value is 20% or less.

X: The change rate of the connection resistance value exceeds 20%.

[Test Example 4] Evaluation of Fillability

A plurality of semiconductor devices were manufactured by the method described in Test Example 3. Four side faces of five semiconductor devices randomly selected from these semiconductor devices were observed with a digital microscope to confirm whether or not cracks were generated in the bumps and the state of bumps being embedded in the adhesive layer, The thickness in the lamination direction was measured. On the basis of these results, according to the following evaluation criteria, the filling property of the bumps in the three-dimensional integrated laminated circuit-producing sheet obtained in the examples and the comparative examples was evaluated. The results are shown in Table 2.

?: In all of the five semiconductor devices, cracks were not generated in the bumps, the bumps were well embedded in the adhesive layer, and the thickness in the lamination direction was the same between the four sides.

X: Among the five semiconductor devices, cracks are generated in the bumps, the bump is not sufficiently filled in the adhesive layer, or the thickness in the lamination direction is not the same between the four sides.

As can be seen from Table 2, the adhesive layer in the three-dimensional integrated laminated circuit-forming sheet according to the example has an excellent thermal conductivity of 0.5 W / m · K or more and the standard of the thickness (T2) of the adhesive layer The deviation was 2.0 占 퐉 or less. It was confirmed that the laminated circuit produced by using the sheet for three-dimensional integrated circuit circuit production obtained in the examples was excellent in heat radiation property, and the result of the temperature cycle test was good and the bump filling property was also excellent.

On the other hand, the adhesive layer in the three-dimensional integrated laminated circuit-forming sheet relating to the comparative example is insufficient in heat conductivity such as 0.3 W / m 占,, and the heat radiation property of the laminated circuit manufactured using the production sheet is insufficient. Further, with respect to the sheet for the three-dimensional integrated circuit circuit production according to Comparative Example 2, the standard deviation of the thickness (T2) of the adhesive layer is 2.5 占 퐉, and the heat radiation property of the lamination circuit is insufficient and the bump filling property is deteriorated.

Industrial availability

The three-dimensional integrated laminated circuit production sheet according to the present invention can be suitably used for manufacturing a laminated circuit having excellent heat dissipation and high reliability.

1, 2 ... Sheet for the production of three-dimensional integrated laminated circuit
11 ... materials
12 ... The pressure-
13 ... Adhesive layer
14 ... Peeling sheet

Claims (16)

A three-dimensionally integrated laminated circuit production sheet used for interposing a plurality of semiconductor chips interposed between a plurality of semiconductor chips having penetrating electrodes to form a three-dimensional integrated laminated circuit,
The three-dimensional integrated laminated circuit production sheet includes at least a curable adhesive layer,
Wherein the adhesive layer contains a thermally conductive filler,
Wherein the standard deviation of the thickness (T2) of the adhesive layer is 2.0 占 퐉 or less. The method according to claim 1,
Wherein the thermally conductive filler is made of a material selected from metal oxides, silicon carbide, carbides, nitrides and metal hydroxides. 3. The method according to claim 1 or 2,
Wherein the content of the thermally conductive filler in the adhesive layer is 35 mass% or more and 95 mass% or less. 4. The method according to any one of claims 1 to 3,
Wherein the thermally conductive filler has a thermal conductivity of 10 W / m · K or more at 23 ° C. 5. The method according to any one of claims 1 to 4,
Wherein the average particle diameter of the thermally conductive filler is 0.01 占 퐉 or more and 20 占 퐉 or less. 6. The method according to any one of claims 1 to 5,
Wherein the thermal conductivity after curing of the adhesive layer is 0.5 W / m · K or more and 8.0 W / m · K or less. 7. The method according to any one of claims 1 to 6,
Wherein the material constituting the adhesive layer contains a thermosetting component, a high molecular weight component, and a curing catalyst. 8. The method according to any one of claims 1 to 7,
Wherein the high molecular weight component has a glass transition temperature of 50 DEG C or higher. 9. The method according to any one of claims 1 to 8,
Characterized in that the material constituting the adhesive layer contains a flux component. 10. The method according to any one of claims 1 to 9,
Wherein the thickness of the adhesive layer is not less than 2 占 퐉 and not more than 500 占 퐉. 11. The method according to any one of claims 1 to 10,
Wherein the sheet for three-dimensionally integrated laminated circuit production further comprises a pressure-sensitive adhesive layer laminated on one side of the adhesive layer and a substrate laminated on the side opposite to the adhesive layer in the pressure-sensitive adhesive layer. Sheet for the manufacture of integrated laminate circuits. 12. The method of claim 11,
Wherein the thickness of the base material is 10 占 퐉 or more and 500 占 퐉 or less. 13. The method according to claim 11 or 12,
Wherein the ratio (T2 / T1) of the thickness (T2) of the adhesive layer to the thickness (T1) of the substrate is 0.01 or more and 5.0 or less. 14. The method according to any one of claims 11 to 13,
Wherein the pressure-sensitive adhesive layer has a storage elastic modulus at 23 캜 of 1 x 10 ³ Pa or more and 1 x 10 ⁹ Pa or less. 15. The method according to any one of claims 11 to 14,
Wherein the base material has a tensile elastic modulus at 23 占 폚 of 100 MPa or more and 5000 MPa or less. A method for manufacturing a three-dimensionally integrated laminated circuit sheet according to any one of claims 1 to 10, comprising the steps of: applying the adhesive layer on one side of the adhesive layer or the sheet for producing a three-dimensional integrated laminated circuit according to any one of claims 11 to 15 A step of bonding at least one surface of a semiconductor wafer having a through electrode and a surface opposite to the pressure-
A step of dicing the semiconductor wafer together with the adhesive layer of the three-dimensional integrated laminate circuit-forming sheet and separating the semiconductor wafer into a semiconductor chip with an adhesive layer attached thereto,
A step of obtaining a semiconductor chip laminate by stacking a plurality of semiconductor chips with a plurality of separated adhesive layers so that the penetrating electrodes are electrically connected to each other and the adhesive layer and the semiconductor chips are alternately arranged;
And adhering the semiconductor chips constituting the semiconductor chip laminate body to each other by curing the adhesive layer in the semiconductor chip laminate body.

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