KR20170062587A - Horizontal electric field type liquid crystal display device - Google Patents

Abstract

The present invention relates to a horizontal electric field type liquid crystal display device capable of increasing the transmissivity and includes a gate line, a common line, a data line, a thin film transistor, a first pixel electrode, a first common electrode, a second pixel electrode and a second common electrode do. The gate lines and the common lines are arranged on the substrate in a first direction separated from each other. The data lines are arranged in a second direction that intersects the first direction. A first pixel electrode is disposed in a first opening region that is a part of a pixel region defined by the gate line and the data line, and receives a data voltage from the data line. A first common electrode is connected to the common line and is arranged to form a horizontal electric field with the first pixel electrode in the first opening region. The second pixel electrode is disposed in a second opening region where a portion of the gate line is removed, and is connected to the first pixel electrode. A second common electrode is connected to the first common electrode and is arranged to form a horizontal electric field with the second pixel electrode in the second opening region.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a horizontal electric field type liquid crystal display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a horizontal electric field type liquid crystal display device and a manufacturing method thereof, and more particularly to a horizontal electric field type liquid crystal display device capable of increasing the transmissivity.

The liquid crystal display device displays an image by adjusting the light transmittance of the liquid crystal using an electric field. Such a liquid crystal display device is divided into a vertical electric field type and a horizontal electric field type in accordance with the direction of the electric field for driving the liquid crystal.

In a vertical electric field type liquid crystal display device, a common electrode formed on an upper substrate and a pixel electrode formed on a lower substrate are opposed to each other to drive a liquid crystal of a TN (twisted nematic) mode by a vertical electric field formed therebetween. Such a vertical electric field type liquid crystal display device has a disadvantage that the aperture ratio is large, but the viewing angle is as narrow as 90 degrees.

The horizontal electric field type liquid crystal display device drives the liquid crystal by the horizontal electric field between the pixel electrode and the common electrode arranged in parallel to the lower substrate. Such a horizontal electric field type liquid crystal display device has an advantage of having a wide viewing angle of 170 degrees or more and a fast response speed since it is switched in a horizontal state.

Hereinafter, a conventional horizontal electric field type liquid crystal display device will be described with reference to FIGS. 1 and 2. FIG.

FIG. 1 is a plan view showing a conventional horizontal electric field type liquid crystal display device, and FIG. 2 is a sectional view taken along the line I-I 'of FIG.

1 and 2, a conventional horizontal electric field type liquid crystal display includes a plurality of gate lines GL and data lines DL arranged to cross each other on a substrate SUB, (TFT) arranged at the intersection of the data lines GL and the data lines DL and the pixel regions defined by the intersection of the plurality of gate lines GL and the data lines DL Connected to the data lines DL through the thin film transistors TFT and connected to the common lines SL arranged in parallel with the pixel electrodes Px and the gate lines GL arranged in the respective pixel regions, And a common electrode (COM) arranged to form a horizontal electric field with the pixel electrodes (P).

The common line SL is arranged in parallel with the gate line GL in the same layer as the gate line GL.

The common electrode C includes a common electrode line portion Ca and a plurality of common electrode fringes Cb branched from the common electrode line portion Ca and extending to the pixel region. The common electrode line portion Ca is disposed on the opposite side of the common line with the pixel region therebetween. The common electrode fringes Cb are arranged side by side at regular intervals.

The pixel electrode P includes a pixel electrode line portion Pa and a plurality of pixel electrode branch portions Pb branched from the pixel electrode line portion Pa and extending to the pixel region. The pixel electrode line portions Pa are arranged to overlap with the common line CL to form a storage capacitor. The pixel electrode line portion Pa is also connected to the drain electrode DE of the thin film transistor TFT and supplied with the data voltage supplied from the data line DL. The pixel electrode (P) is disposed on the same layer as the common electrode (C). The plurality of pixel electrode branch portions Pb and the plurality of common electrode branch portions Cb are alternately arranged in the pixel region to form a horizontal electric field.

In the conventional horizontal electric field type liquid crystal display device described above, the gate line GL including the gate electrode GE and the common line CL are arranged on the substrate SUB. A gate insulating film GI is disposed on the substrate SUB so as to cover the gate line GL and the common line CL. On the gate insulating film GI, a semiconductor active layer A is disposed at a position where a source / drain electrode and a data line to be described later are to be formed. A source electrode SE and a drain electrode DE separated from each other so as to expose a part of the semiconductor active layer are disposed on the semiconductor active layer A on which the thin film transistor TFT is to be disposed, A data line DL is disposed on the active layer A2. A first insulating film INS1 is disposed on the gate insulating film GI so as to cover the source electrode SE, the drain electrode DE and the data line DL. A second insulating film INS2 for planarization is disposed on the second insulating film INS2. The common electrode C and the pixel electrode P are arranged on the second insulating film INS2 so as to form a horizontal electric field. The pixel electrode P is connected to the drain electrode DE of the thin film transistor TFT exposed through the second insulating film INS2 and the drain contact hole CH1 passing through the first insulating film INS1. The common electrode COM is connected to the common line CL exposed through the second insulating film INS2, the first insulating film INS1 and the common line contact hole CH2 penetrating the gate insulating film GI.

When such a conventional horizontal electric field type liquid crystal display device is constructed with an extremely large area, the thickness of the gate line or the data line is increasing to reduce the load of the wirings. However, when the thickness of the gate line and the data line is increased, the thickness of the gate insulating film is gradually increased to secure the reliability of the thin film transistor adjacent thereto. As the thickness of the gate insulating film increases, the value of the storage capacitor formed by the common line under the gate insulating film and the source electrode and the drain electrode above the gate insulating film becomes smaller. Therefore, a larger area is required for securing an appropriate capacitance, but this results in a decrease in the aperture ratio and a problem of lowering the transmittance.

SUMMARY OF THE INVENTION An object of the present invention is to provide a horizontal electric field type liquid crystal display device capable of improving the transmissivity by using a part of a gate line which does not greatly affect resistance reduction among gate lines .

According to an aspect of the present invention, there is provided a horizontal electric field type liquid crystal display device including a gate line, a common line, a data line, a thin film transistor, a first pixel electrode, a first common electrode, And a second common electrode. The gate lines and the common lines are arranged on the substrate in a first direction separated from each other. The data lines are arranged in a second direction that intersects the first direction. A first pixel electrode is disposed in a first opening region that is a part of a pixel region defined by the gate line and the data line, and receives a data voltage from the data line. A first common electrode is connected to the common line and is arranged to form a horizontal electric field with the first pixel electrode in the first opening region. The second pixel electrode is disposed in a second opening region where a portion of the gate line is removed, and is connected to the first pixel electrode. A second common electrode is connected to the first common electrode and is arranged to form a horizontal electric field with the second pixel electrode in the second opening region.

In addition, the horizontal electric field type liquid crystal display device of the present invention further includes a thin film transistor for supplying the data voltage to the first pixel electrode and the second pixel electrode.

The thin film transistor and the data line are disposed on a gate insulating film that covers the gate line, and the first pixel electrode, the second pixel electrode, and the common line are disposed on a transparent substrate, Wherein the first common electrode and the second common electrode are disposed on an insulating film covering the thin film transistor and the data line and the first pixel electrode is electrically connected to the drain electrode exposed through the first contact hole passing through the insulating film, And the first common electrode is connected to a common line exposed through the insulating film and the second contact hole exposed through the gate insulating film.

The thin film transistor and the data line are arranged on a gate insulating film covering the gate line, and the first common electrode and the second common electrode are arranged on the gate insulating film, Wherein the first pixel electrode and the second pixel electrode are disposed on a second insulating film covering the first common electrode and the second common electrode, Wherein the first pixel electrode is connected to the drain electrode exposed through the first contact hole passing through the first and second insulating films, the first common electrode is connected to the first and second insulating films, And is connected to the common line exposed through the second contact hole exposed through the insulating film.

Another horizontal electric field type liquid crystal display device according to the present invention includes a gate line and a common line, a data line, a first pixel electrode, a first common electrode, a second pixel electrode, and a second common electrode. The gate lines and the common lines are arranged on the substrate in a first direction separated from each other. And the data lines are arranged in a second direction intersecting with the first direction. A first pixel electrode is disposed in a first opening region that is a part of a pixel region defined by the gate line and the data line, and receives a data voltage from the data line. A first common electrode is connected to the common line and is arranged to form a horizontal electric field with the first pixel electrode in the first opening region. The second pixel electrode is disposed in a second opening area where a part of the gate line is removed, and is connected to the auxiliary data line. A second common electrode is connected to the first common electrode and is arranged to form a horizontal electric field with the second pixel electrode in the second opening region.

The horizontal electric field type liquid crystal display device further includes a first thin film transistor for supplying the data voltage to the first pixel electrode and the second pixel electrode and a second thin film transistor for supplying a voltage corresponding to the maximum luminance peak to the second pixel And a second thin film transistor for supplying the thin film transistor with an electrode.

The first pixel electrode and the first common electrode are formed on the same layer to form a horizontal electric field in the first opening region, and the second pixel electrode and the second common electrode are formed on the same layer And forms a horizontal electric field in the second opening region.

The first pixel electrode and the first common electrode are formed in different layers to form a horizontal electric field in the first opening region, and the second pixel electrode and the second common electrode are formed in different layers And a horizontal electric field is formed in the second opening region.

The first and second thin film transistors, the data line and the auxiliary data line are formed on a gate insulating film covering the gate line and the common line, Wherein the first pixel electrode, the second pixel electrode, the first common electrode, and the second common electrode are disposed on an insulating film covering the first and second thin film transistors, the data line, and the auxiliary data lines Wherein the first pixel electrode is connected to the drain electrode exposed through the first contact hole passing through the insulating film, the first common electrode is connected to the second contact hole exposed through the insulating film and the gate insulating film, To the exposed common line.

In the above structure, the gate line may include two branches crossing the data lines for each pixel region.

Also, at least one of the gate line and the data line may be formed such that the width of the intersection region intersecting with each other is narrower than the width of the comparison difference region.

In the horizontal electric field type liquid crystal display device according to the present invention, since an opening region is additionally formed for every pixel region in a part of the gate line, the opening ratio can be increased by that region. Therefore, since a part of the gate line can be used as an opening region, the display quality can be improved by increasing the transmittance.

Further, by reducing the line width of the gate line in the region intersecting the data line and setting the number of the branches of the gate line crossing each pixel to a plurality of, the resistance can be reduced and the aperture ratio can be increased.

1 is a plan view of a conventional horizontal electric field type liquid crystal display device,
FIG. 2 is a cross-sectional view taken along the line I-I 'of FIG. 1,
3 is a block diagram schematically showing a horizontal electric field type liquid crystal display device according to an embodiment of the present invention.
4 is a plan view schematically showing one pixel region of a horizontal electric field type liquid crystal display device according to the first embodiment of the present invention,
5 is a cross-sectional view taken along line I-I 'of FIG. 4,
6 is a plan view schematically showing one pixel region of a horizontal electric field type liquid crystal display device according to a second embodiment of the present invention,
FIG. 7 is a cross-sectional view taken along the line I-I 'of FIG. 6,
8 is a plan view schematically showing one pixel region of a horizontal electric field type liquid crystal display device according to a third embodiment of the present invention,
9 is a cross-sectional view taken along line I-I 'of FIG.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Like reference numerals throughout the specification denote substantially identical components. In the following description, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear. In addition, the component names used in the following description may be selected in consideration of easiness of specification, and may be different from the parts names of actual products.

First, a liquid crystal display according to embodiments of the present invention will be described with reference to FIG.

3 is a block diagram schematically showing a horizontal electric field type liquid crystal display according to embodiments of the present invention.

3, a horizontal electric field type liquid crystal display according to embodiments of the present invention includes a liquid crystal display panel 10 having a pixel array PA, a source drive integrated circuit (IC) 12, a gate drive circuit 13, and a timing controller 11. [ A backlight unit for uniformly irradiating light to the liquid crystal display panel 10 may be disposed below the liquid crystal display panel 10.

The liquid crystal display panel 10 includes a thin film transistor array and a color filter array.

The thin film transistor array includes a pixel array PA. A plurality of gate lines GL arranged in a first direction (e.g., x direction) and a plurality of gate lines GL arranged in a second direction (e.g., x direction) are formed on the first substrate of the pixel array PA, The data lines DL arranged in parallel with the gate lines GL, the thin film transistors arranged adjacent to the intersections of the gate lines GL and the data lines DL, the gate lines GL, And second liquid crystal cells arranged in a part of the gate line, and a plurality of second liquid crystal cells arranged in a region defined by the plurality of data lines, And common electrodes are arranged to form an electric field with the plurality of pixel electrodes.

The color filter array includes a black matrix and a color filter formed on a second substrate facing the first substrate with a liquid crystal layer interposed therebetween. Polarizing plates are attached to the outer surfaces of the first substrate and the second substrate of the liquid crystal display panel 10 respectively and alignment films for setting the pretilt angle of the liquid crystal are formed on the inner surfaces of the first and second substrates in contact with the liquid crystal layer . A column spacer may be formed between the color filter array CFA and the thin film transistor array TFTA of the liquid crystal display panel 10 to maintain a cell gap of the liquid crystal cell.

Meanwhile, the common electrodes are arranged on the second substrate in a vertical electric field driving method such as TN (Twisted Nematic) mode and VA (Vertical Alignment) mode. The common electrodes are horizontally arranged in the IPS (In Plane Switching) mode and the FFS And is arranged on the first substrate together with the pixel electrode in the electric field driving method. In the following embodiments of the present invention, an example of a horizontal electric field driving method will be described.

The pixel array PA displays an image by driving the liquid crystals of the liquid crystal layer by adjusting the amount of light transmitted by the voltage difference between the pixel electrodes through which the data voltage is charged through the thin film transistor and the common electrodes to which the common voltage is applied.

The liquid crystal display device can be implemented in any form such as a transmissive liquid crystal display device, a transflective liquid crystal display device, and a reflective liquid crystal display device. In a transmissive liquid crystal display device and a transflective liquid crystal display device, a backlight unit is required. The backlight unit may be implemented as a direct type backlight unit or an edge type (edGE type) backlight unit.

The source drive ICs 12 are mounted on a TCP (Tape Carrier PackaGE) 15 and bonded to the glass substrate of the liquid crystal display panel 10 by a TAB (Tape Automated Bonding) (14). The source drive ICs 12 may be bonded onto the transparent substrate of the liquid crystal display panel 10 by a COG (Chip On Glass) process.

Each of the source drive ICs 12 receives the digital video data and the source timing control signal from the timing controller 11. The source drive ICs 12 convert the digital video data into positive / negative data voltages in response to the source timing control signal and supply them to the data lines of the pixel array PA. The source drive ICs 12 output the data voltages to the data lines under the control of the timing controller 11. [

The gate drive circuit 13 receives the gate timing control signal from the timing controller 11. [ The gate driving circuit 13 sequentially supplies gate pulses (or scan pulses) to the gate lines of the pixel array in response to the gate timing control signal. The gate drive circuit 13 is mounted on the TCP and can be bonded to the lower glass substrate of the liquid crystal display panel 10 by the TAB process. Alternatively, the gate drive circuit 13 may be formed directly on the transparent substrate simultaneously with the pixel array PA by a GIP (Gate In Panel) process. The gate drive circuit 13 may be disposed on one side of the pixel array PA or on both sides of the pixel array PA as shown in Fig.

The timing controller 11 receives digital video data, a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and timing signals such as a dot clock from an external system board. The timing controller 11 generates a timing control signal for controlling the operation timing of the source drive ICs 12 based on the digital video data and timing signals and a gate timing control signal for controlling the operation timing of the gate drive circuit 13 And generates a control signal. The timing controller 11 supplies digital video data and a source timing control signal to the source drive ICs 12. [ The timing controller 11 supplies a gate timing control signal to the source drive ICs 12. [ The timing controller 11 is mounted on the control PCB 16. The control PCB 16 and the source PCB 14 may be connected via a flexible circuit board 17 such as a flexible flat cable (FFC) or a flexible printed circuit (FPC).

Next, the pixel structure of the pixel array of the horizontal electric field type liquid crystal display according to the first embodiment of the present invention will be schematically described with reference to FIG.

4 is a plan view schematically showing one pixel region of a horizontal electric field type liquid crystal display device according to the first embodiment of the present invention.

Referring to FIG. 4, the pixel array of the horizontal electric field type liquid crystal display according to the first embodiment of the present invention includes a plurality of gate lines GL and data lines DL, Pixel region.

Each of the gate lines GL has at least two gate line branches Gb1 and Gb2 that are branched at an area intersecting the data line DL and formed to be narrower than the width of the gate line GL. The data line DL may also be configured to have a narrow width in an area intersecting the gate line GL. As described above, by narrowing the widths of the data line DL and the gate line GL in the regions crossing each other, the resistance due to parasitic capacitance can be reduced and the transmittance can also be improved.

The pixel array also includes a common line CL spaced from the gate line GL and arranged in parallel with the gate line GL.

Each pixel region includes a first opening region OA1 and a second opening region OA2 through which light is transmitted.

The first pixel electrode P1 and the first common electrode C1 are disposed in the first opening region OA1.

The first pixel electrode P1 includes a first pixel electrode stripe portion Pa1 overlapping the common line CL and a plurality of second pixel electrode stripe portions Pa1 extending from the first pixel electrode stripe portion Pa1 to the first opening region OA1 And the first pixel electrode branch portions Pb1. The first pixel electrode strip portion Pa1 is connected to the drain electrode DE of the thin film transistor TFT exposed through the first contact hole CH1.

The first common electrode C1 includes a first common electrode line portion Ca1 arranged on the opposite side of the first pixel line portion Pa1 of the first pixel electrode P1 in the first opening region OA1, And a plurality of first common electrode fringes Cb1 extending in parallel from the first common electrode line portion Ca1 to the first opening region OA1. The first common electrode branch Cb1 disposed on the outermost side is connected to the common line CL exposed through the second contact hole CH2. The plurality of first pixel electrode fringe portions Pb1 and the plurality of first common electrode fringe portions Cb1 are arranged alternately in the first opening region OA1.

The second opening area OA2 is an area disposed in the opening where a part of the gate line GL is removed. And the second pixel electrode P2 and the second common electrode C2 are disposed in the second opening region OA2.

The second pixel electrode P2 includes a second pixel electrode line portion Pa2 connected to the first pixel electrode line portion Pa1 by a connection portion Pc extending to the first pixel electrode line portion Pa1, And a plurality of second pixel electrode branch portions Pb2 extending in parallel from the two pixel electrode stripe portion Pa2 to the second opening region OA2. The second pixel electrode line portion Pa2 is connected to the drain electrode DE of the thin film transistor TFT exposed through the first pixel electrode line portion Pa1 and the first contact hole CH1.

The second common electrode C2 includes a second common electrode line portion Ca2 disposed on the opposite side of the second pixel line portion Pa2 of the second pixel electrode P2 in the second opening region OA2, And a plurality of second common electrode fringes Cb2 extending in parallel from the second common electrode line portion Ca2 to the second opening region OA1. The second common electrode line portion Ca2 is connected to the second connecting portion C2C extending from the second common electrode line portion Ca2 and the common line CL exposed through the second contact hole CH2. The plurality of second pixel electrode fringes Pb2 and the plurality of second common electrode fringes Cb2 are alternately arranged in the second opening region OA2.

Next, the sectional structure of the pixel structure of the pixel array of the horizontal electric field type liquid crystal display device according to the first embodiment of the present invention will be described with reference to FIGS. 4 and 5. FIG. 5 is a cross-sectional view taken along line I-I 'of FIG.

4 and 5, on the substrate SUB, the gate line GL and the common line CL are disposed side by side apart from each other.

A gate insulating film GI is disposed on the substrate SUB so as to cover the gate line GL including the gate electrode GE and the common line CL.

A data line DL and a source electrode SE and a drain electrode DE of the thin film transistor TFT are arranged on the gate insulating film GI. The drain electrode DE may extend from the data line DL.

A first insulating film INS1 and a second insulating film INS2 for planarization are disposed on the gate insulating film GI so as to cover the data line DL and the source electrode SE and the drain electrode DE of the thin film transistor TFT . One of the first insulating film INS1 and the second insulating film INS2 may be omitted.

The first pixel electrode P1 and the first common electrode C1 are arranged in the first opening area OA1 on the second insulating film INS2 and the second pixel electrode P2 and the second pixel electrode P2 are formed in the first opening area OA1. And a second common electrode C2 is disposed.

The first pixel electrode line portion Pa1 is connected to the drain electrode DE of the thin film transistor exposed through the first contact hole CH1 passing through the first and second insulating films INS1 and INS2. The outermost common electrode branch portion Cb1 is connected to the common line CL exposed through the second contact hole CH2 passing through the first and second insulating films INS1 and INS2.

The second common electrode C2 and the second pixel electrode P2 of the second opening region OA2 in which the gate line GL is disposed are formed in the horizontal direction of the liquid crystal display device according to the first embodiment of the present invention, The electric field is applied to the liquid crystal by the voltage difference between the liquid crystal molecules, and the light transmission can be achieved because the electric field can change the behavior of the liquid crystal and transmit the light.

Next, the pixel structure of the pixel array of the horizontal electric field type liquid crystal display according to the second embodiment of the present invention will be schematically described with reference to FIG.

6 is a plan view schematically showing one pixel region of a horizontal electric field type liquid crystal display device according to a second embodiment of the present invention.

Referring to FIG. 6, the horizontal electric field type liquid crystal display according to the second embodiment of the present invention includes a plurality of pixel regions defined by a plurality of gate lines GL and data lines DL arranged to intersect with each other .

Each of the gate lines GL has at least two gate line branches Gb1 and Gb2 that are branched at an area intersecting the data line DL and formed to be narrower than the width of the gate line GL. The data line DL may also be configured to have a narrow width in an area intersecting the gate line GL. As described above, by narrowing the widths of the data line DL and the gate line GL in the regions crossing each other, the resistance due to parasitic capacitance can be reduced and the transmittance can also be improved.

The pixel array also includes a common line CL spaced from the gate line GL and arranged in parallel with the gate line GL.

Each pixel region includes a first opening region OA1 and a second opening region OA2 through which light is transmitted.

The first pixel electrode P1 and the first common electrode C1 are disposed in the first opening region OA1.

The first common electrode C1 is arranged to cover the first opening area OA1.

The first pixel electrode P1 includes a first pixel electrode stripe portion Pa1 overlapping the common line CL and a plurality of second pixel electrode stripe portions Pa1 extending from the first pixel electrode stripe portion Pa1 to the first opening region OA1 And the first pixel electrode branch portions Pb1. The first pixel electrode P1 may further include a first pixel electrode branch connecting portion Pb1c connecting the ends of the first pixel electrode branch portions Pb1 on the opposite side of the first pixel electrode stripe portion Pa1 have.

The first pixel electrode strip portion Pa1 is connected to the drain electrode DE of the thin film transistor TFT exposed through the first contact hole CH1. The plurality of first pixel electrode fringe portions Pb1 are arranged so as to overlap the first common electrode C1 disposed on the lower layer thereof.

The second opening area OA2 is an area disposed in the opening where a part of the gate line GL is removed. And the second pixel electrode P2 and the second common electrode C2 are disposed in the second opening region OA2.

The second common electrode C2 is arranged to cover the second opening region OA2.

The second pixel electrode P2 includes a second pixel electrode line portion Pa2 connected to the first pixel electrode line portion Pa1 by a pixel electrode connection portion Pc extending to the first pixel electrode line portion Pa1, And a plurality of second pixel electrode branch portions Pb2 extending in parallel from the second pixel electrode stripe portion Pa2 to the second opening region OA2. The second pixel electrode P2 may further include a second pixel electrode branch Pb2c connecting the ends of the plurality of second pixel electrode fringes Pb2 on the opposite side of the second pixel electrode stripe Pa2 have. The second pixel electrode line portion Pa2 is connected to the first pixel electrode line portion Pa1 through the pixel electrode connection portion Pc and the first pixel electrode line portion Pa1 is connected to the first pixel electrode line portion Pa1 through the first contact hole CH1 And is connected to the drain electrode DE of the exposed thin film transistor TFT. The plurality of second pixel electrode branch portions Pb2 are arranged so as to overlap with the second common electrode C2 arranged in the lower layer.

In the horizontal electric field type liquid crystal display device according to the second embodiment of the present invention, the first and second pixel electrodes P1 and P2 are arranged on the first and second common electrodes C1 and C2 However, the present invention is not limited thereto. For example, the first and second common electrodes C1 and C2 may be disposed on the first and second pixel electrodes P1 and P2. In this case, the first and second pixel electrodes P1 and P1 are formed to have electrode patterns that do not have branches, and the first and second common electrodes C1 and C2 are formed to have branches. That is, liquid crystals arranged in the liquid crystal layer can be driven by using an electric field generated by a voltage difference between a common voltage applied to the first and second common electrodes and a data voltage applied to the first and second pixel electrodes The first and second common electrodes, and the upper electrodes of the first and second pixel electrodes are formed to have branches.

Next, a cross-sectional structure of a pixel array pixel of a horizontal electric field type liquid crystal display device according to a second embodiment of the present invention will be described with reference to FIGS. 6 and 7. FIG. 7 is a cross-sectional view taken along line I-I 'of FIG.

On the substrate SUB, a gate line GL including a gate electrode GE and a common line CL are arranged. A gate insulating film GI is disposed on the substrate SUB on which the gate line GL and the common line CL are disposed so as to cover the gate line GL and the common line CL.

A data line DL and a source electrode SE and a drain electrode DE of the thin film transistor TFT are arranged on the gate insulating film GI. The drain electrode DE may extend from the data line DL.

A first insulating film INS1 and a second insulating film INS2 for planarization are disposed on the gate insulating film GI so as to cover the data line DL and the source electrode SE and the drain electrode DE of the thin film transistor TFT . One of the first insulating film INS1 and the second insulating film INS2 may be omitted.

The first common electrode C1 is disposed in the first opening region OA1 on the second insulating layer INS2 and the first common electrode C1 is connected to the second opening region OA2 by the common electrode connecting portion Cc. And a second common electrode C2 connected thereto is disposed.

A third insulating film INS3 is formed on the second insulating film INS2 on which the first common electrode C1 and the second common electrode C2 are disposed so as to cover the first common electrode C1 and the second common electrode C2 .

A first pixel electrode P1 and a second pixel electrode P2 are disposed on the third insulating film INS3. The first pixel electrode branch portions Pb1 of the first pixel electrode P1 are arranged to overlap the first common electrode C1 in the first opening region OA1 and the second pixel electrode branch portions Pb1 of the second pixel electrode P2 overlap the first common electrode C1, The electrode fringes Pb2 are arranged to overlap the second common electrode C2 in the second opening area OA2.

The first pixel electrode strip portion Pa1 is connected to the drain electrode DE of the thin film transistor exposed through the first contact hole CH1 passing through the first to third insulating films INS1, INS2 and INS3. The common electrode connection part Cc is connected to the common line CL exposed through the second contact hole CH2 passing through the first and second insulating films INS1 and INS2.

The second common electrode C2 and the second pixel electrode P2 of the second opening region OA2 in which the gate line GL is disposed are formed in the horizontal direction in the horizontal direction. The electric field is applied to the liquid crystal by the voltage difference between the liquid crystal molecules, and the light transmission can be achieved because the electric field can change the behavior of the liquid crystal and transmit the light.

Next, a horizontal electric field type liquid crystal display device according to a third embodiment of the present invention will be schematically described with reference to FIG.

8 is a plan view schematically showing one pixel region of a horizontal electric field type liquid crystal display device according to the third embodiment of the present invention.

Referring to FIG. 8, the pixel array of the horizontal electric field type liquid crystal display according to the third embodiment of the present invention includes a plurality of gate lines GL arranged to intersect with each other, and a plurality of data lines DL And a plurality of pixel regions. An auxiliary data line DLs is disposed adjacent to each data line.

Each of the gate lines GL branches at an area intersecting the data line DL and the auxiliary data line DLs and includes at least two gate line branches Gb1 and Gb2 formed to be narrower than the width of the gate line GL . The data line DL and the auxiliary data line DLs may also be configured to have a narrow width in a region that intersects the gate line GL. As described above, by narrowing the widths of the data line DL and the gate line GL in the regions crossing each other, the resistance due to parasitic capacitance can be reduced and the transmittance can also be improved.

The pixel array also includes a common line CL spaced from the gate line GL and arranged in parallel with the gate line GL.

Each pixel region includes a first opening region OA1 and a second opening region OA2 through which light is transmitted.

The first pixel electrode P1 and the first common electrode C1 are disposed in the first opening region OA1.

The first pixel electrode P1 includes a first pixel electrode stripe portion Pa1 overlapping the common line CL and a plurality of second pixel electrode stripe portions Pa1 extending from the first pixel electrode stripe portion Pa1 to the first opening region OA1 And the first pixel electrode branch portions Pb1. The first pixel electrode line portion Pa1 is connected to the first drain electrode DE of the first thin film transistor TFT1 exposed through the first contact hole CH1. The first thin film transistor TFT1 includes a first gate electrode GE1, a first source electrode SE1, and a first drain electrode DE1. The first source electrode SE1 extends from the data line DL and the first drain electrode DE1 is connected to the first pixel electrode strip portion Pa1 exposed through the first contact hole CH1.

The first common electrode C1 includes a first common electrode line portion Ca1 arranged on the opposite side of the first pixel line portion Pa1 of the first pixel electrode P1 in the first opening region OA1, And a plurality of first common electrode fringes Cb1 extending in parallel from the first common electrode line portion Ca1 to the first opening region OA1. The first common electrode branch Cb1 disposed on the outermost side is connected to the common line CL exposed through the second contact hole CH2.

The plurality of first pixel electrode fringe portions Pb1 and the plurality of first common electrode fringe portions Cb1 are arranged alternately in the first opening region OA1.

The second opening area OA2 is an area disposed in the opening where a part of the gate line GL is removed. And the second pixel electrode P2 and the second common electrode C2 are disposed in the second opening region OA2.

The second pixel electrode P2 has a second pixel electrode line portion Pa2 connected to the second drain electrode DE2 of the second thin film transistor TFT2 and a second pixel electrode line portion Pa2 connected to the second pixel electrode line portion Pa2. And a plurality of second pixel electrode branch portions Pb2 extending in parallel to the region OA2. And the second pixel electrode line portion Pa2 is connected to the second drain electrode DE of the second thin film transistor TFT2 exposed through the third contact hole CH3.

The second thin film transistor TFT2 includes a second gate electrode GE2, a second source electrode SE2 and a second drain electrode DE2. The second source electrode SE2 extends from the auxiliary data line DLs adjacent to the data line corresponding to the adjacent pixel region.

The second common electrode C2 includes a second common electrode line portion Ca2 disposed on the opposite side of the second pixel line portion Pa2 of the second pixel electrode P2 in the second opening region OA2, And a plurality of second common electrode fringes Cb2 extending in parallel from the second common electrode line portion Ca2 to the second opening region OA1. The second common electrode line portion Ca2 is connected to the second connecting portion C2C extending from the second common electrode line portion Ca2 and the common line CL exposed through the second contact hole CH2. The plurality of second pixel electrode fringes Pb2 and the plurality of second common electrode fringes Cb2 are alternately arranged in the second opening region OA2.

Next, the sectional structure of the pixel structure of the pixel array of the horizontal electric field type liquid crystal display device according to the third embodiment of the present invention will be described with reference to FIGS. 8 and 9. FIG. 9 is a cross-sectional view taken along line I-I 'of FIG.

8 and 9, on the substrate SUB, the gate line GL and the common line CL are arranged side by side apart from each other.

A gate insulating film GI is disposed on the substrate SUB so as to cover the gate line GL including the gate electrodes GE1 and GE2 and the common line CL.

A data line DL and an auxiliary data line DLs are arranged on the gate insulating film GI in parallel to each other and a first thin film transistor TFT1 connected to the data line DL, And a second thin film transistor TFT2 connected to the auxiliary data line DLs adjacent to the data line DL. The first source electrode SE1 of the first thin film transistor TFT1 extends from the data line DL and the second source electrode SE2 of the second thin film transistor TFT2 extends from the auxiliary data line DLs .

A data voltage is supplied to the first pixel electrode P1 through a data line DL and a voltage capable of exhibiting peak luminance through the auxiliary data line DLs is supplied to the second pixel electrode P2. Accordingly, the auxiliary data lines DLs can be formed to have a narrower width than the data lines DL.

A first insulating film INS1 is formed on the gate insulating film GI so as to cover the data line DL and the auxiliary data lines DLs and the first and second thin film transistors TFT1 and TFT2 and a second insulating film INS2. One of the first insulating film INS1 and the second insulating film INS2 may be omitted.

The first pixel electrode P1 and the first common electrode C1 are arranged in the first opening area OA1 on the second insulating film INS2 and the second pixel electrode P2 and the second pixel electrode P2 are formed in the first opening area OA1. And a second common electrode C2 is disposed.

The first pixel electrode line portion Pa1 is connected to the first drain electrode DE1 of the first thin film transistor TFT1 exposed through the first contact hole CH1 passing through the first and second insulating layers INS1 and INS2 And the second pixel electrode line portion Pa2 is connected to the second thin film transistor TFT2 exposed through the first contact hole CH1 passing through the first and second insulating films INS1 and INS2. 2 drain electrode DE2.

According to the horizontal electric field type liquid crystal display device according to the third embodiment of the present invention described above, the data voltage supplied from the data line DL through the first thin film transistor TFT1 is supplied to the first pixel electrode P1, A constant voltage for driving the liquid crystal supplied from the auxiliary data lines DLs through the second thin film transistor TFT2 can be supplied to the second pixel electrode P2. The electric field is applied to the liquid crystal by the voltage difference between the second common electrode C2 and the second pixel electrode P2 in the second opening area OA2 in which the gate line GL is disposed, A change in the behavior of the liquid crystal can be caused and light can be transmitted, so that the effect of increasing the transmittance can be obtained.

Further, in the horizontal electric field type liquid crystal display device according to the third embodiment of the present invention, data is displayed only through the first aperture region in the general image, and data is displayed through the first aperture region when it is desired to increase the luminance, And light can be transmitted through the second opening region to exhibit the peak luminance. Therefore, the effect of increasing the transmittance of the horizontal electric field display device can be obtained.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. For example, the first and second transistors and the auxiliary data lines used in the horizontal electric field display device according to the third embodiment of the present invention can also be applied to the horizontal electric field display device according to the second embodiment of the present invention . In this case, the first and second common electrodes C1 and C2 are disposed on the second insulating film INS2 of the second embodiment, and the first and second pixel electrodes P1 and P2 are disposed on the second insulating film INS2 of the second embodiment. And is disposed on the third insulating film INS3.

Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

C1, C2: common electrode Ca1, Ca2:
Cb1, Cb2: Common electrode branch Cc: Common electrode connection
P1, P2: pixel electrode Pa1. Pa2: pixel electrode strip portion
Pb1, Pb2: pixel electrode branch portions Pb1c, Pb2c: pixel electrode branch portions
Pc: pixel electrode connection part DL: data line
GL: gate lines Gb1 and Gb2:
OA1, OA2: opening area

Claims (11)

A gate line and a common line which are separated from each other on the substrate and arranged in a first direction;
A data line arranged in a second direction intersecting the first direction;
A first pixel electrode arranged in a first opening region which is a part of a pixel region defined by the gate line and the data line, the first pixel electrode being supplied with a data voltage from the data line;
A first common electrode connected to the common line and arranged to form a horizontal electric field with the first pixel electrode in the first opening region;
A second pixel electrode disposed in a second opening region where a part of the gate line is removed, the second pixel electrode being connected to the first pixel electrode; And
And a second common electrode connected to the first common electrode and arranged to form a horizontal electric field with the second pixel electrode in the second opening region.
The method according to claim 1,
And a thin film transistor for supplying the data voltage to the first pixel electrode and the second pixel electrode.
3. The method of claim 2,
Wherein the gate line and the common line are disposed on a transparent substrate,
Wherein the thin film transistor and the data line are disposed on a gate insulating film covering the gate line,
Wherein the first pixel electrode, the second pixel electrode, the first common electrode, and the second common electrode are disposed on an insulating film covering the thin film transistor and the data line,
The first pixel electrode is connected to the drain electrode exposed through the first contact hole passing through the insulating film,
Wherein the first common electrode is connected to a common line exposed through the insulating film and the second contact hole exposed through the gate insulating film.
3. The method of claim 2,
Wherein the gate line and the common line are disposed on a transparent substrate,
Wherein the thin film transistor and the data line are disposed on a gate insulating film covering the gate line,
Wherein the first common electrode and the second common electrode are disposed on a first insulating film covering the thin film transistor and the data line,
Wherein the first pixel electrode and the second pixel electrode are disposed on a second insulating film covering the first common electrode and the second common electrode,
The first pixel electrode is connected to the drain electrode exposed through the first contact hole passing through the first and second insulating films,
Wherein the first common electrode is connected to a common line exposed through the first and second insulating films and the second contact hole exposed through the gate insulating film.
A gate line and a common line which are separated from each other on the substrate and arranged in a first direction;
A data line and an auxiliary data line arranged in a second direction intersecting the first direction;
A first pixel electrode arranged in a first opening region which is a part of a pixel region defined by the gate line and the data line, the first pixel electrode being supplied with a data voltage from the data line;
A first common electrode connected to the common line and arranged to form a horizontal electric field with the first pixel electrode in the first opening region;
A second pixel electrode disposed in a second opening region where a part of the gate line is removed, the second pixel electrode being connected to the auxiliary data line; And
And a second common electrode connected to the first common electrode and arranged to form a horizontal electric field with the second pixel electrode in the second opening region.
6. The method of claim 5,
A first thin film transistor for supplying the data voltage to the first pixel electrode and the second pixel electrode; And
And a second thin film transistor for supplying a voltage corresponding to a maximum luminance peak value to the second pixel electrode through the auxiliary data line.
6. The method of claim 5,
Wherein the first pixel electrode and the first common electrode are formed on the same layer to form a horizontal electric field in the first opening region and the second pixel electrode and the second common electrode are formed on the same layer, (2) A horizontal electric field is formed in the opening area.
6. The method of claim 5,
Wherein the first pixel electrode and the first common electrode are formed in different layers to form a horizontal electric field in the first opening region and the second pixel electrode and the second common electrode are formed in different layers, (2) A horizontal electric field is formed in the opening area.
The method according to claim 6,
Wherein the gate line and the common line are disposed on a transparent substrate,
The first and second thin film transistors, the data line, and the auxiliary data line are disposed on a gate insulating film covering the gate line and the common line,
Wherein the first pixel electrode, the second pixel electrode, the first common electrode, and the second common electrode are disposed on an insulating film covering the first and second thin film transistors, the data line, and the auxiliary data lines ,
The first pixel electrode is connected to the drain electrode exposed through the first contact hole passing through the insulating film,
Wherein the first common electrode is connected to a common line exposed through the insulating film and the second contact hole exposed through the gate insulating film.
10. The method according to any one of claims 1 to 9,
Wherein the gate line includes two branches crossing the data line for each pixel region.
11. The method of claim 10,
Wherein a width of an intersection region where at least one of the gate line and the data line cross each other is narrower than a width of the comparison sub-region.

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