KR20160014757A - Driving Circuit For Light Emitting Diode and Method for Driving the LED - Google Patents

Abstract

Provided are an integrated circuit for driving a light-emitting diode (LED) and a method for driving the same. The integrated circuit for driving the LED of the present invention relates to a multi-channel AC direct-type LED driving circuit comprising: an LED array including first to k^th LED groups connected in series, wherein k is an integer equal to or greater than 2; a control unit including multiple (two or more) switches connected to the LED array, and a switch control circuit which is to selectively open and close the switches; and a valley-fill circuit which receives the rectified voltage of an alternating current (AC) voltage to supply first and second modified rectifier voltages to the LED array. The valley-fill circuit supplies the first modified rectified voltage to the input of the first LED group of the LED array, and supplies the second modified rectified voltage to the input of one of the remaining LED group other than the first LED group.

Description

[0001] The present invention relates to an LED driving integrated circuit, and more particularly,

The present invention relates to an illumination driving circuit and method, and more particularly, to an LED driving integrated circuit for driving an LED illumination, and a driving method thereof.

In recent years, as one of the measures for energy saving, there has been a tendency to introduce an efficient LED light source instead of the conventional inefficient light source.

LED lighting is driven by an AC-DC conversion type drive method that converts AC power to DC power and drives the LED by using DC power, and AC There is an AC direct drive system that drives LED directly by power supply.

On the other hand, there is a flicker index as one of the quality factors of LED illumination. It is a numerical value indicating the degree of flicker of the LED illumination. To improve the quality of the LED illumination, it is necessary to reduce the flicker.

In addition, in the conventional incandescent lamp, a brightness adjusting device (for example, a device for adjusting the brightness using a rotary switch) is used to adjust the brightness of the incandescent lamp. Therefore, a device for adjusting brightness in LED lighting is also needed.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide an AC direct type LED driving circuit capable of reducing a flicker of an LED lighting.

It is another object of the present invention to provide an AC direct type LED driving circuit capable of detecting a phase cut ratio of an AC power source by a brightness adjusting device and adjusting the brightness of the LED lighting.

An LED driving circuit according to an embodiment of the present invention is an AC direct type LED driving circuit comprising: an LED array including first through k-th (two or more integer) LED groups connected in series; A control unit including a plurality (two or more) of switches connected to the LED array and a switch control circuit for selectively opening and closing the switches; And a valley fill circuit receiving the rectified voltage of the AC voltage and supplying the first and second modified rectified voltages to the LED array.

The valley fill circuit supplies the first modified rectified voltage to the input of the first LED group of the LED array and supplies the second modified rectified voltage to one of the remaining LED groups except for the first LED group Each of the first through k-th LED groups includes at least one LED, and when two or more LEDs are in one LED group, two or more LEDs are connected in series, parallel, or a combination of series and parallel.

The valley fill circuit comprising: a first capacitor coupled between a first node and a second node; A first diode coupled between the second node and the third node; A second capacitor connected between the third node and ground; A second diode coupled between the ground and the second node; And a third diode coupled between the third node and the fourth node.

Wherein the first node is coupled to an input of the first LED group and the fourth node is coupled to an input of a j th LED group of the first through k (two or more integer) LED groups, Is an integer equal to or less than k.

The first modified rectified voltage may be a voltage of the first node, and the second modified rectified voltage may be a voltage of the fourth node.

The LED array may further include a diode coupled between an input of the jth LED group and an output of the (j-1) th LED group.

The valley fill circuit may further include a resistor connected between the first capacitor and the second capacitor.

The plurality of switches include first to m-th (2 or more integer) switches, and the switch control circuit can selectively open and close each of the first to m-th switches.

The control unit may further include an analog dimming unit for adjusting the brightness of the LED array by adjusting currents flowing through the first through the m-th switches.

M is equal to or smaller than k.

(J-1) LED groups from the first node in the valley interval, and the current control circuit controls the currents flowing through the j-th LED group to the k-th LED group from the fourth node, It is possible to generate the control signal so as to flow.

An LED driving circuit according to another embodiment of the present invention is an AC direct type LED lighting driving circuit, which includes first through n-th (two or more integer) LEDs connected in series and is driven using a phase- LED array; And a control unit coupled to the LED array.

Wherein the control unit comprises: a multi-channel switch circuit including first through m-th (2 or more integer) switches connected to the LED array; A multi-channel switch control circuit for selectively opening and closing each of the first through m-th switches; A phase detector for receiving the phase cut rectified voltage and detecting duty information indicating a phase cut ratio to generate a duty detection signal PDS; A phase-dimming control unit for generating a dimming reference voltage in response to the duty detection signal; And an analog dimming unit for adjusting the brightness of the LED array by adjusting currents flowing through the first through the m-th switches according to the dimming reference voltage.

The control unit may further comprise a breather circuit for flowing a holding current necessary for operation of the phase cut dimmer generating the phase cut AC voltage.

The phase detector may include a comparator that compares a comparison target voltage with a comparison reference voltage to generate the duty detection signal, and the comparison target voltage Vc may be a voltage based on the phase cut rectified voltage.

The phase detector may include a Schmitt trigger that receives the comparison target voltage to generate the duty detection signal, and the comparison target voltage may be a voltage based on the phase cut rectified voltage.

The phase detector may include a resistor and a zener diode connected in series between a node to which the phase cut rectified voltage is input and the ground.

Wherein the phase dimming control unit multiplexes a first reference voltage and a second reference voltage in response to the duty detection signal and outputs the first reference voltage and the second reference voltage; And a low-pass filter that low-pass filters the output of the multiplexer and outputs the low-pass filtered output as the dimming reference voltage.

Wherein the phase dimming control unit multiplexes a first reference voltage and a second reference voltage in response to the duty detection signal and outputs the first reference voltage and the second reference voltage; A sampling switch connected to the output of the multiplexer and opened and closed in response to a sampling clock signal; And a low-pass filter that low-pass filters an output of the sampling switch to output the dimming reference voltage.

The phase dimming control unit may generate an N-bit digital code that varies according to the duty detection signal, and convert the generated digital code to an analog voltage to generate the dimming reference voltage.

Wherein the LED driving circuit includes: a rectifier for generating a rectified voltage of the phase-cut AC voltage; A diode connected to the rectifier; And a valley fill circuit connected between the diode and the LED array for supplying a strained rectified voltage to the LED array.

Wherein the modified rectified voltage includes first and second strained rectified voltages and the valley fill circuit supplies the first modified rectified voltage to an input of a first LED group of the LED array, The second modified rectified voltage can be supplied to any one of the remaining LED groups.

The valley fill circuit comprising: a first capacitor coupled between a first node and a second node; A first diode coupled between the second node and the third node; A second capacitor connected between the third node and ground; A second diode coupled between the ground and the second node; And a third diode coupled between the third node and the fourth node, wherein the first node is coupled to the input of the first LED group, and the fourth node is coupled to the first through the k- ) J, where j is an integer equal to or greater than 2 and equal to or less than k, and the LED array is connected between the input of the jth LED group and the output of the (j-1) th LED group And may further include a diode connected thereto.

An LED driving circuit according to an embodiment of the present invention is an AC direct type LED driving circuit comprising: an LED array including first through k-th (two or more integer) LED groups connected in series; A control unit including a plurality (two or more) of switches connected to the LED array and a switch control circuit for selectively opening and closing the switches; And a switchable fill circuit for receiving a rectified voltage of an alternating current (AC) voltage to supply current to the LED array.

Wherein the switchable fill circuit provides a first input current to an input of the first LED group of the LED array in a first period and a second input current to an input of the first LED group of the LED array in a second interval, And provides a third input current to any one input of the remaining LED groups except for the first LED group.

The LED driving circuit may further include a switchable fill control circuit for controlling the switchable fill circuit to operate differently in the first period and the second period.

The switchable fill circuit comprises: A resistor coupled between the first node and the second node; A capacitor coupled between the second node and ground; A transistor coupled between the second node and a third node and coupled to the switchable filter control circuit; A first diode connected in parallel to the resistor; And a second diode coupled between the third node and the fourth node, wherein the first node is coupled to an input of the first LED group, and the fourth node is coupled to the first through k < th > Integer) can be connected to the input of the j-th LED group among the LED groups.

The switchable filter control circuit may turn off the transistor in the first section and turn on the transistor in the second section.

According to an embodiment of the present invention, the flicker of the LED illumination can be reduced.

Also, according to the embodiment of the present invention, the brightness of the LED illumination can be adjusted by detecting the phase cut ratio of the AC power by the brightness adjusting device. Particularly, it is compatible with existing brightness control devices by detecting the phase cut ratio of the AC power by the brightness control device (for example, rotary switch) used in the conventional incandescent lamp and controlling the brightness of the LED lighting.

BRIEF DESCRIPTION OF THE DRAWINGS A brief description of each drawing is provided to more fully understand the drawings recited in the description of the invention.
1 is a schematic block diagram of an LED driving circuit according to an embodiment of the present invention.
Fig. 2 is a circuit diagram showing one embodiment of the filter / rectifier, the valley-fill circuit and the LED array shown in Fig.
3A is a schematic voltage waveform diagram showing one embodiment of a rectified voltage.
3B is a schematic voltage waveform diagram showing one embodiment of the first modified rectified voltage which is the output of the valley-fill circuit.
4 shows the LED brightness in the absence of the valley fill circuit.
Fig. 5 shows the LED brightness in the case of a valley-fill circuit.
6 shows the voltage and current waveforms of the AC power source.
7 to 10 are circuit diagrams showing various modifications of the valley fill circuit, the LED array, and the multi-channel switch circuit according to the embodiment of the present invention.
11A and 11B are schematic block diagrams of an LED lighting driving circuit according to another embodiment of the present invention.
Figs. 12A and 12B are block diagrams showing a modified example of the LED lighting driving circuit shown in Figs. 11A and 11B, respectively.
13 is a voltage waveform diagram showing various embodiments of the rectified voltage.
14 is a current waveform diagram illustrating various embodiments of the LED current.
15A is a circuit diagram showing a phase detector according to an embodiment of the present invention.
15B is a circuit diagram showing a phase detector according to another embodiment of the present invention.
15C is a circuit diagram showing a phase detector according to another embodiment of the present invention.
16 is a circuit diagram showing a phase-dimming control unit according to an embodiment of the present invention.
17 is a circuit diagram showing a phase-dimming control unit according to another embodiment of the present invention.
18 shows an embodiment of the waveform of the duty detection signal and the sampling clock signal.
19 is a circuit diagram showing a phase-dimming control unit according to another embodiment of the present invention.
20 is a schematic block diagram of an LED lighting driving circuit according to another embodiment of the present invention.
21 is a block diagram showing a modified example of the LED lighting driving circuit shown in Fig.
22A and 22B are graphs each showing an example of the dimming profile.
23 is a schematic block diagram of an LED lighting driving circuit according to another embodiment of the present invention.
24 is a circuit diagram showing one embodiment of the filter / rectifier, the switchable filter circuit, the multi-channel switch, and the LED array shown in Fig.
25 is a circuit diagram for explaining the operation in the section 1 of the LED lighting driving circuit shown in Fig.
26 is a schematic waveform diagram for explaining the operation in the section 1 of the LED lighting drive circuit shown in Fig.
Fig. 27 is a circuit diagram for explaining the operation in section 2 of the LED lighting drive circuit shown in Fig. 24; Fig.
Fig. 28 is a schematic waveform diagram for explaining operation in a section 2 of the LED lighting drive circuit shown in Fig. 24. Fig.
29 is a waveform diagram schematically showing the LED input voltage and current in the conventional AC direct type LED driving circuit.
30 is a waveform diagram schematically showing the LED input voltage and current in the LED lighting driving circuit according to the embodiment of the present invention shown in Figs. 25 and 27. Fig.

Specific structural and functional descriptions of the embodiments of the present invention disclosed herein are merely illustrative for the purpose of illustrating embodiments of the inventive concept, And can be embodied in various forms and should not be construed as limited to the embodiments set forth herein.

The embodiments according to the concept of the present invention can make various changes and have various forms, so that specific embodiments are illustrated in the drawings and described in detail herein. It is to be understood, however, that it is not intended to limit the embodiments according to the concepts of the present invention to the particular forms of disclosure, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

The terms first and / or second, etc. may be used to describe various elements, but the elements should not be limited by the terms. The terms are intended to distinguish one element from another, for example, without departing from the scope of the invention in accordance with the concepts of the present invention, the first element may be termed the second element, The second component may also be referred to as a first component.

It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between. Other expressions that describe the relationship between components, such as "between" and "between" or "neighboring to" and "directly adjacent to" should be interpreted as well.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In this specification, the terms "comprises ", or" having ", or the like, specify that there is a stated feature, number, step, operation, , Steps, operations, components, parts, or combinations thereof, as a matter of principle.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as ideal or overly formal in the sense of the art unless explicitly defined herein Do not.

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail with reference to the preferred embodiments of the present invention with reference to the accompanying drawings.

1 is a schematic block diagram of an LED driving circuit according to an embodiment of the present invention. Fig. 2 is a circuit diagram showing one embodiment of the filter / rectifier, the valley-fill circuit and the LED array shown in Fig. Referring to FIGS. 1 and 2, the LED driving circuit 10 includes a filter / rectifier 110, a valley fill circuit 120, and a control unit 130.

The filter / rectifier 110 receives an AC voltage Vac from an AC power source 101, filters and rectifies noise to output a rectified voltage Vr. The AC voltage Vac may be a commercial AC voltage (e.g., 110V, 220V, etc.) but is not limited thereto. 3A is a schematic voltage waveform diagram showing an embodiment of the rectified voltage Vr.

The valley fill circuit 120 receives the rectified voltage Vr and outputs the first and second modified rectified voltages Vvf1 and Vvf2 to the LED array 190. [ 3B is a schematic voltage waveform diagram showing an embodiment of the first strained rectified voltage Vvf1 and the second strained rectified voltage Vvf2 which are the outputs of the valley fill circuit 120. [

Referring to FIG. 3B, the first modified rectified voltage Vvf1 represents the voltage of the first node N1 of FIG. 2, and unlike the rectified voltage Vr, the first modified rectified voltage Vvf1 does not decrease below a predetermined lower limit voltage. Also, the second modified rectified voltage Vvf2 represents the voltage of the fourth node N4 of FIG. 2 and does not decrease below a predetermined lower limit voltage like the first modified rectified voltage Vvf1. In one embodiment, the valley fill circuit 120 may use at least one capacitor to modify the voltage of a valley section falling below a specific voltage in the waveform of the rectified voltage Vr to be equal to or greater than the lower limit voltage.

Assuming that the rectified voltage Vr as shown in FIG. 3A is directly applied to the LED array 190, no current flows in the LED array 190 in the section 1 in which the rectified voltage Vr falls below the lower limit voltage. Accordingly, the LED array 190 is not driven and does not emit light. Therefore, as shown in FIG. 4, in the section 1, the LED array 190 is completely turned off and the LED brightness becomes zero. As a result, the flicker phenomenon is severe.

On the other hand, when the rectified voltages Vvf1 and Vvf2 deformed by the valley fill circuit 120 are applied to the LED array 190 as shown in Fig. 3B, the valley fill circuit (also referred to as " 120 are discharged to the LED array 190, whereby a current flows through a part of the LED array 190 to emit light. As a result, a section in which the LED array 190 is completely turned off does not occur. Therefore, as shown in FIG. 5, the LED array 190 is partially turned on even in the interval 1, and the LED brightness is maintained at a predetermined value or more, so that the flicker phenomenon is reduced.

The LED array 190a according to an exemplary embodiment of the present invention may include first through k-th (two or more integer) LED groups 191-1 through 191-k connected in series, where k is an integer of 2 or more. Each LED group 191-1 through 191-k may include at least one LED and may include a plurality of LEDs. When a plurality of LEDs are included, a plurality of LEDs in one LED group may be connected in series, parallel, or a combination of series and parallel.

The control unit 130 includes a multi-channel switch circuit 140 including m (two or more integer) switches connected to the LED array 190 and a multi-channel switch control circuit 150 for selectively opening and closing the switches .

In the embodiment of FIG. 2, the multi-channel switch circuit 140a includes m switches 141-n provided in one-to-one correspondence with the first through k-th (two or more integer) LED groups 191-1 through 191- 1 to 141-m). That is, m and k can be the same. Each of the first to m-th switches 141-1 to 141-m is connected to the output nodes N2i, N3i, ..., Nki of the corresponding LED groups 191-1 to 191-k, And selectively opened and closed by the switch control circuit 150, thereby selectively driving the LED groups.

In the embodiment of FIG. 2, the number k of LED groups and the number of switches m are the same, but the embodiment of the present invention is not limited thereto. Various embodiments for this are described below.

In the embodiment of FIG. 2, the filter / rectifier 110a may be implemented as a bridge diode.

In the embodiment of FIG. 2, the valley fill circuit 120a includes first and second capacitors 121 and 122, and first to third diodes 123-125.

The first capacitor 121 is connected between the first node N1 and the second node N2 and the first diode 123 is connected between the second node N2 and the third node N3, 2 capacitor 122 may be coupled between the third node N3 and ground. Also, the second diode 124 may be connected between the ground and the second node N2, and the third diode 125 may be connected between the third node N3 and the fourth node N4.

The first node N1 is connected to the input of the first LED group 191-1 of the LED array 190a and the fourth node N4 is connected to the input of the first LED group 191- 1) of the LED groups 191-2 to 191-k.

For example, the fourth node N4 is connected to the input of the j-th LED group 191-j among the first to k-th (two or more integer) LED groups 191-1 to 191-k. In this case, j is an integer of 2 or more and k or less. A reverse current prevention diode 192 is provided between the jth LED group and the (j-1) th LED group and the fourth node N4 is connected between the reverse current prevention diode 192 and the jth LED group 191-j Lt; / RTI >

The backflow prevention diode 192 may be connected between the output of one LED group (e.g., the (j-1) LED group) and the input of the next LED group (e.g., the j th LED group 191-j). In the embodiment of FIG. 5, the backflow prevention diode 192 is connected between the output of the second LED group 191-2 and the input of the third LED group 191-3, but is not limited thereto.

The first node N1 is connected to the input of the first LED group 191-1 of the LED array 190a and the fourth node N4 is connected to the input of the third LED group 191-3, And is connected to the output of the diode 192.

Accordingly, a primary current path can be formed through the first node N1 to the input of the first LED group 191-1 and a third current path can be formed through the fourth node N4 to the third LED group 191-3. A secondary current path can be formed.

The LEDs connected between the first node N1 and the fourth node N4 are connected to the LED group GR1 connected to the primary current path and the LEDs connected after the fourth node N4 are connected to the secondary current path And the LED group GR2 connected to the LED group GR2.

Assuming that the fourth node N4 is connected to the input of the j-th LED group 191-j, the LEDs connected to the first LED group 191-1 to the (j-1) LEDs connected to the k LED groups 191-j to the k-th LED group 191-k can be classified as GR2. The control unit 130 also includes an analog dimming unit 160, a reference generating circuit 170, And may further include a power supply circuit 180.

The analog dimming unit 160 adjusts the brightness of the LEDs by adjusting currents flowing through the switches through the multi-channel switch circuit 140 connected to the LED array 190.

The analog dimming unit 160 can pre-determine and drive the driving current for each channel or adjust the driving current for each channel according to the external resistance and the external analog signal.

The reference generating circuit 170 generates a reference voltage or a reference current necessary for the operation of the analog dimming unit 160. The reference generation circuit 170 may be implemented by a bandgap circuit, but is not limited thereto.

The power supply circuit 180 generates a voltage or current required for operation inside the control unit 130. For example, the power supply circuit 180 may generate the DC voltage by receiving the first modified rectified voltage Vvf1, which is one of the output voltages of the valley fill circuit 120. [

The LED driving circuit 10 according to an embodiment of the present invention is not a method of driving an LED by converting an AC voltage into a DC voltage but an AC voltage direct drive type LED driving circuit to be.

According to an embodiment of the present invention, if the fourth node N4 is connected to the j-th LED group 191-j as in the embodiment of Fig. 2, the j-th LED The LEDs may be divided into GR1 up to the group 191-j-1 and GR2 up to the k-th LED group 191-j through the j-th LED group 191-j. When the absolute value of the AC power 101 input voltage Vac is larger than the voltage Vvf1 charged in the capacitor of the valley fill circuit 120a as shown in the interval 2 of FIG. 3, the AC power 101 Current flows to the switch through the group and the LED group of GR2. The switch control circuit 150 adjusts the regulated current to flow to the LED groups GR1 and GR2 and the switch. In this case, since the LED current path is one, a control signal must be generated so that the number of current-flowing switches is one.

When the second modified rectified voltage Vvf2 is higher than the anode voltage of the backflow prevention diode 192, a current path from the fourth node N4 to the group of the GR2 LEDs is further generated. 3B, a current flows due to the voltage Vvf1 of the first node N1 in the GR1 LED group, and a current flows in the GR2 LED group due to the voltage Vvf2 of the fourth node N4. Therefore, in the interval 1 of FIG. 3B, a control signal is required to generate a signal so that a regulated current flows simultaneously in one of the switches to which the GR1 LED group is connected and one of the switches to which the GR2 LED group is connected. Using this method doubles the number of LEDs and doubles the brightness of the current flowing in the prior art. It can also reduce flicker.

As described above, according to the embodiment of the present invention, the first transformed rectified voltage Vvf1, which is the first output of the valley fill circuit 120, is input to the input of the first LED group 191-1 of the LED array 190 And the second modified rectified voltage Vvf2, which is another output of the valley fill circuit 120, is connected to the input of any one of the remaining LED groups of the LED array 190 to drive the LED array 190. [ Accordingly, the power source of the second capacitor 122 of the valley-fill circuit 120 separately forms an LED drive current path, so that the brightness of the same number of LEDs is increased or the LED arrays connected to the multiple channels are sequentially driven The luminance variation with time is reduced, and the flicker characteristic is improved.

In FIG. 2, the number of series connections of the LEDs in the LED group GR2 connected to the secondary current path may be equal to the number of series connections of the LEDs in the LED group GR1 connected to the primary current path. However, the LED group (GR1) connected to the primary current path and the LED group (GR2) connected to the secondary current path can be variously modified.

Number of LEDs emitted due to the secondary current path if the number of series connections of LEDs in the LED group (GR2) connected to the secondary current path is equal to or greater than the number of LED connections in the LED group (GR1) connected to the primary current path . Accordingly, as shown in FIG. 6, the LED input voltage decreases in the interval 1, and the time during which the AC input current flows increases. Thus, THD (total harmonic distortion) is improved.

6 shows the voltage (Vac) and the current waveform of the AC power source 101. Fig. 6 is a current flowing from the AC power source 101 to the LED array 190 and a period 2 is a current flowing from the AC power source 101 to the LED array 190 and a current flowing from the AC power source 101 to the capacitor of the valley- . The section 3 is a current flowing from the AC power source 101 to the LED array 190. This is because the voltage Vac of the AC power source 101 is lower than the first deformation rectified voltage Vvf1 in the section where no current flows in the AC power source 101 as in the section 4, Current flows from the capacitors 121 and 122 to the LED array 190. This is the reason why the THD increases because the AC waveform of the AC power source 101 does not coincide with the voltage waveform of the AC power source 101. THD is reduced by reducing the maximum value of the current of the AC power supply 101 and by reducing the time (period 4) during which the AC power supply 101 current does not flow. The maximum value of the AC power source 101 current can be reduced when a resistor is added between the first and second capacitors 121 and 122 in the valley fill circuit 120a of the embodiment of FIG. When the number of LED serial connections in the GR2 group is larger than the number of LED series in the GR1 group, the first modified rectified voltage Vf1 of FIG. 3B decreases. Therefore, the current range flowing from the AC power source 101 to the LED array 190 And the interval in which the AC current does not flow is reduced, thereby decreasing the THD.

7 to 10 are circuit diagrams showing various modifications of the valley fill circuit, the LED array, and the multi-channel switch circuit according to the embodiment of the present invention

The embodiment of Fig. 7 has a configuration similar to that of the embodiment of Fig. However, the embodiment of FIG. 7 corresponds to the case where k is 4 and m is 4.

The backflow prevention diode 192 is connected between the output of the second LED group 191-2 and the input of the third LED group 191-3 and the fourth node N4 is connected between the output of the third LED group 191-3 ), That is, the output of the backflow prevention diode 192. [

The valley fill circuit 120b shown in Fig. 7 further includes a resistor 126 connected between the first diode 123 and the third node N3 in comparison with the valley fill circuit 120a shown in Fig. 2 . As described above, when a resistor (for example, 126) is added between the first and second capacitors 121 and 122 of the valley fill circuit 120b, the maximum value of the AC power source 101 current can be reduced.

The embodiment of FIG. 8 corresponds to the case where k is 4 and m is 4.

The backflow prevention diode 192 is connected between the output of the second LED group 191-2 and the input of the third LED group 191-3 and the fourth node N4 is connected between the output of the third LED group 191-3 ≪ / RTI >

The valley-fill circuit 120a shown in Fig. 8 is the same as the valley-fill circuit 120a shown in Fig. 2, and the LED array 190c and the multi-channel switch circuit 140c correspond to the LED array 190b And the multi-channel switch circuit 140b.

The embodiment of FIG. 9 also corresponds to the case where k is 4 and m is 4.

The embodiment of Fig. 9 has a configuration similar to that of the embodiment of Fig. 9, the backflow prevention diode 192 is connected between the output of the third LED group 191-3 and the input of the fourth LED group 191-4, the fourth node N4 is connected, Is connected to the input of the fourth LED group 191-4.

The embodiment of FIG. 10 corresponds to the case where k is 4 and m is 2. The switch 141-3 connected to the GR1 LED groups 191-1 to 191-3 is constituted by one and the switch 141-4 connected to the GR2 LED group 191-4 is also constituted by one.

11A and 11B are schematic block diagrams of an LED lighting driving circuit according to another embodiment of the present invention. First, referring to FIG. 11A, the LED lighting driver circuit 20A includes a filter / rectifier 110, and a control unit 230a. Referring to FIG. 11B, the LED lighting driver circuit 20A 'differs from the LED lighting driver circuit 20A of FIG. 11A in that it further includes a valley fill circuit 220. The LED lighting driver circuit 20A 'may further include a diode 207 between the filter / rectifier 110 and the valley fill circuit 220.

A phase cut dimmer 105 may be inserted between the AC power supply 105 and the filter / The phase cut dimmer 105 is a device for adjusting the brightness (brightness) of the LED illumination, and is a part of each cycle of the AC voltage (Vac) (when the cycle is 100%, for example, 10% (Referred to as a phase cut).

The filter / rectifier 110 receives the phase-cut AC voltage Vpc by the phase-cut dimmer 105 and performs noise filtering and rectification to output the rectified voltage Vpr. 13 is a voltage waveform diagram showing various embodiments of the rectified voltage Vpr. 13 (a), 13 (b), 13 (c) and 13 (d) illustrate the phase-cut rectified voltage Vpr and the valley-fill circuit 220 of 90%, 75%, 50% (E) shows the rectified voltage Vpr when the phase is not cut, and the output voltage Vvf of the valley-fill circuit 220. In Fig.

14 is a current waveform diagram illustrating various embodiments of the LED current. 14 (a), 14 (b), 14 (c) and 14 (d) show LED currents when 90%, 75%, 50% And shows the LED current when not phase-cut.

The valley fill circuit 220 receives the rectified voltage Vr and outputs the modified rectified voltage Vvf to the LED array 190. Unlike the valley fill circuit 120 of FIG. 1, which provides different strained rectified voltages to different nodes of the LED array 190, the valley fill circuit 220 only applies the modified rectified voltage Vvf), and is not connected to other nodes in the LED array 190. [

The valley fill circuit 220 may be implemented as a conventional valley fill circuit. For example, the bypass fill circuit 220 may be implemented with only a capacitor, or an active-valley fill circuit including an active switch element and a capacitor.

The control unit 230a includes a multi-channel switch circuit 240, a multi-channel switch control circuit 250, an analog dimming unit 260, a reference generating circuit 270, Circuit 280. In one embodiment, The configurations and functions of the multi-channel switch circuit 240, the multi-channel switch control circuit 250, the analog dimming section 260, the reference generating circuit 270, and the power supply circuit 280 are the same as those of the multi- 140, the multi-channel switch control circuit 150, the analog dimming unit 160, the reference generating circuit 170, and the power supply circuit 180, the description thereof will be omitted.

The control unit 230 may further include a phase detection unit 275 and a phase dimming control unit 285. [

The phase detector 275 receives the phase-cut rectified voltage Vpr and detects a phase-cut ratio, that is, duty information to generate a duty detection signal PDS. The phase-dimming control unit 285 controls the channel-by-channel driving current according to the duty detection signal PDS. Thus, the luminance (LED brightness) is adjusted in accordance with the phase of the phase-cut dimmer 105.

According to one embodiment, when the phase-dimming control unit 285 controls the driving current for each channel according to the duty detection signal PDS, the driving current for each channel can be controlled according to an algorithm for adjusting the dimming profile. The dimming profile shows the relationship between the degree of phase cut and the brightness of the LED.

22A and 22B are graphs each showing an example of the dimming profile. FIG. 22A is a diagram showing the dimming profile of the National Electrical Manufacturers Association (NEMA), and FIG. 22B is a dimming profile diagram of a lighting research center (LRC).

According to an embodiment of the present invention, the dimming profile may be preset or may be adjusted to have a specific slope or value by a single algorithm. The dimming profile may also be adjusted to meet the NEMA dimming profile specification or the LRC dimming profile specification. The phase-dimming control unit 285 may adjust the brightness of the LED array by adjusting the dimming reference voltage according to a dimming profile adjusted according to a preset dimming profile or algorithm.

Figs. 12A and 12B are block diagrams showing a modified example of the LED lighting driving circuit shown in Figs. 11A and 11B, respectively. 12A, the LED lighting driver circuit 20B includes a filter / rectifier 110, and a control unit 230b, similar to the LED lighting driver circuit 20A shown in Fig. 11A, and Fig. 12B The LED lighting driver circuit 20B 'includes a filter / rectifier 110, a diode 207, a valley fill circuit 220, and a control circuit (not shown) similar to the LED lighting driver circuit 20A' Unit 230b.

However, the control unit 230b of Figs. 12A and 12B may further include a breather circuit 265 in comparison with the control unit 230a of Figs. 11A and 11B. The breather circuit 265 operates to ensure a holding current for normal operation of the triac dimmer, which is one type of the phase cut dimmer 105. Although not shown, the breeder circuit 265 may be implemented as a passive type breeder circuit composed of a resistor and a capacitor, or may be implemented as an active breeder circuit using an active element.

According to the embodiment of the present invention, even if the phase-cut AC power supply Vpc is inputted by the phase cut dimmer 105, the valley fill circuit 220 supplies the basic voltage and controls the LED drive current according to the phase cut phase Thereby performing the phase-cut dimming operation in which the flicker is reduced.

15A is a circuit diagram showing a phase detection section 275A according to an embodiment of the present invention. Referring to this, the phase detector 275A includes a comparator 275-1.

The comparator 275-1 compares the comparison target voltage Vc with the comparison reference voltage REF to detect the duty detection signal PDS. The comparison target voltage Vc is a voltage associated with the phase-cut rectified voltage Vpr, for example, a voltage obtained by dividing the phase-cut rectified voltage Vpr. In the embodiment of Fig. 15A, the phase-cut rectified voltage Vpr is divided using the R1 resistor and the R2 resistor and used as the comparison target voltage Vc.

While the comparison target voltage Vc is equal to or higher than the comparison reference voltage REF, the duty detection signal PDS is at the first logic level (for example, '1') and while the comparison target voltage Vc is below the comparison reference voltage REF The duty detection signal PDS may be a second logic level (e.g., '0'). Accordingly, the duty detection signal PDS is a pulse signal having a period substantially equal to the cycle of the phase-cut rectified voltage Vpr, and the duty ratio of the pulse is determined according to the phase-cut ratio. The comparison target voltage Vc and the comparison reference voltage REF may be analog voltages, respectively.

15B is a circuit diagram showing a phase detection section 275B according to another embodiment of the present invention. Referring to this, the phase detection section 275B includes a Schmitt trigger 275-2.

The Schmitt trigger 275-2 is a comparator having a hysteresis characteristic. The Schmitt trigger 275-2 is a comparator having a hysteresis characteristic. The trigger voltage of the Schmitt trigger 275-2 is predetermined without a separate reference signal. The Schmitt trigger 275-2 receives the comparison target voltage Vc, Signal (PDS).

In the embodiment of Fig. 15B, the phase-cut rectified voltage Vpr is divided using the R1 resistor and the R2 resistor and used as the comparison target voltage Vc.

Although not shown, one or more inverters may be used instead of the Schmitt trigger 275-2. It can be used as an inverter that sets the logic threshold voltage of the inverter above the voltage to be compared.

15C is a circuit diagram showing a phase detection section 275C according to still another embodiment of the present invention. Referring to this, the phase detector 275C includes a zener diode 275-3. Specifically, the phase detector 275C includes a resistor R1 and a Zener diode 275-3 connected in series between the node N0 and ground. For example, when the zener diode 275-3 is implemented as a 5V zener diode, about 5V is output as the duty detection signal PDS in the section where the phase cut rectified voltage Vpr is 5V or more, and the phase cut rectified voltage Vpr is 0 V is output in a period of less than 5 V, and this voltage can be used as a duty detection signal (PDS), or this voltage can be output to a schmitt trigger or one or more inverters. Though not shown, a schmitt trigger connected to the zener diode 275-3 or an inverter, a buffer, or a level shifter may be further provided.

16 is a circuit diagram showing a phase-dimming control unit 285A according to an embodiment of the present invention. Referring to this, the phase-dimming control unit 285A includes a multiplexer 313 and a low-pass filter 314. The multiplexer 313 multiplexes and outputs the first reference voltage Ref1 and the second reference voltage Ref2 in response to the duty detection signal PDS.

The first reference voltage Ref1 and the second reference voltage Ref2 may be analog voltages and the first reference voltage Ref1 may be higher than the second reference voltage Ref2. For example, the first reference voltage Ref1 may be 5V and the second reference voltage Ref2 may be 0V.

The low pass filter 314 includes a resistor 315 and a capacitor 316 and generates a third reference voltage Ref3 based on the output of the multiplexer 313. [ The third reference voltage Ref3 is a value between the first reference voltage Ref1 and the second reference voltage Ref2 and depends on the duty detection signal PDS.

The multiplexer 313 may further include buffers 311 and 312 for buffering the first reference voltage Ref1 and the second reference voltage Ref2 at the previous stage. The buffers 311 and 312 may be implemented as a source follower.

17 is a circuit diagram showing a phase-dimming control unit 285B according to another embodiment of the present invention. Referring to this, the phase-dimming control unit 285B further includes a sampling switch 317 in comparison with the phase-dimming control unit 285A.

The sampling switch 317 is connected between the multiplexer 313 and the low-pass filter 314 and is opened / closed in response to the sampling clock signal SCLK.

One embodiment of the waveform of the duty detection signal PDS and the sampling clock signal SCLK is shown in Fig. Referring to FIG. 18, the period of the sampling clock signal SCLK may be several times to several tens of times the period of the duty detection signal PDS, and the first logic level ('1') period of the sampling clock signal SCLK May be shorter than the second logic level ('0').

In the embodiment of FIG. 17, the first and second reference voltages Ref1 and Ref2 are sampled using the fast sampling clock signal SCLK and transferred to the capacitor 316. Thus, the size of the resistor 315 and the capacitor 316 can be reduced compared to the embodiment of FIG.

FIG. 19 is a circuit diagram showing a phase-dimming control unit 285C according to another embodiment of the present invention. Referring to this, the phase-dimming control unit 285C includes a counter 320, a digital-to-analog converter 330, a pulse generator 340, and a phase locked loop (PLL) 350.

The duty detection signal PDS output from the phase detection unit 275 is applied to the input IN of the counter 320. [ The pulse generator 340 receives the duty detection signal PDS to generate a one-shot pulse signal OSP. For example, the pulse generator 340 generates a pulse signal OSP by detecting a rising edge or a falling edge of the duty detection signal PDS, thereby generating one pulse per period of the duty detection signal PDS Shot pulse signal OSP for generating a pulse of the pulse signal OSP. The period (OSP) of the one-shot pulse signal is a period when the duty of the phase-cut rectified voltage Vpr is 100% (Fig. 13 (e)).

The one shot pulse signal OSP is input to the PLL 350 and also to the reset signal of the counter 320.

The PLL 350 includes a phase frequency detector 351, a charge pump 352, a voltage controlled oscillator 353, and a frequency divider 354.

The phase frequency detector 351 detects the frequency and phase difference between the one-shot pulse signal OSP and the feedback signal FBS and outputs the detection result to the charge pump 352. The charge pump 352 pumps the charge in response to the output signal of the phase frequency detector 351 to generate a voltage signal that varies in accordance with the output signal of the phase frequency detector 351. The voltage controlled oscillator 350 generates the oscillation signal PCLK in accordance with the output voltage of the charge pump 352. [

The frequency divider 354 divides the oscillation signal PCLK by N (an integer of 2 or more) - bits to generate the feedback signal FBS. For example, the frequency divider 354 can divide the frequency of the oscillation signal PCLK by 1/2 ^N.

By the operation of the PLL 340, the phases and frequencies of the feedback signal FBS and the one-shot pulse signal OSP are gradually synchronized. That is, the rising edge of the feedback signal FBS and the one-shot pulse signal OSP is synchronized in the phase frequency detector 351. [

When the feedback signal FBS and the one-shot pulse signal OSP are synchronized, the oscillation signal PCLK can be toggled 2 ^N times during one period of the duty detection signal PDS.

The counter 320 may be an N-bit counter.

Therefore, the oscillation signal PCLK generated to fit the N-bit counter 320 is applied to the clock 320 of the counter 320. [

The counter 320 counts a rising edge or a falling edge of the oscillation signal PCLK for a first logic level interval (e.g., a high level interval) of the duty detection signal PDS to generate a count result as an N-bit digital code DC, .

The N-bit digital code DC generated at the counter 320 is applied to the N-bit DAC 330. The N-bit DAC 330 selects one of the voltages obtained by dividing the voltage between the first reference voltage Ref1 and the second reference voltage Ref2 by 2 ^N according to the digital code DC to generate a third reference voltage Ref3).

The third reference voltage Ref2 is a third reference voltage which is a value corresponding to the duty ratio detected in the voltages between the first reference voltage Ref1 and the second reference voltage Ref2 by the duty detection signal PDS generated by the phase detector 275. [ The voltage Ref3 is outputted.

The third reference voltage Ref3 is input to the analog dimming unit 260 as the dimming reference voltage DRef. The analog dimming section 260 adjusts the LED brightness by adjusting the current flowing through each switch through the multi-channel switch circuit 240 connected to the LED array 190 according to the dimming reference voltage DRef.

The reference generating circuit 270 generates a reference voltage or a reference current necessary for the operation of the analog dimming unit 260. The reference generation circuit 270 may be implemented as a bandgap circuit, but is not limited thereto.

The power supply circuit 280 generates a voltage or current necessary for operation inside the control unit 230. [

20 is a schematic block diagram of an LED lighting driving circuit according to another embodiment of the present invention. Referring to FIG. 20, the LED lighting driver circuit 30A includes a filter / rectifier 110, a diode 207, a valley fill circuit 120, and a control unit 230a.

The LED lighting driver circuit 30A in Fig. 20 is similar to the configuration and operation of the LED lighting driver circuit 20A in Fig. However, the LED lighting driver circuit 30A shown in Fig. 20 differs from the LED lighting driver circuit 30A shown in Fig. 20 in that it includes the valley fill circuit 120 shown in Fig. 1 instead of the valley fill circuit 220 shown in Fig.

21 is a block diagram showing a modified example of the LED lighting driving circuit shown in Fig. 21, the LED lighting driver circuit 30B includes a filter / rectifier 110, a diode 207, a valley fill circuit 220, and the like, similar to the LED lighting driver circuit 30A shown in Fig. And a control unit 230b.

However, the control unit 230b of Fig. 21 may further include a breather circuit 265 in comparison with the control unit 230a of Fig. The breather circuit 265 operates to ensure a holding current for normal operation of the triac dimmer, which is one type of the phase cut dimmer 105. Although not shown, the breeder circuit 265 may be implemented as a passive type breeder circuit composed of a resistor and a capacitor, or may be implemented as an active breeder circuit using an active element.

23 is a schematic block diagram of an LED lighting driving circuit according to another embodiment of the present invention. 24 is a circuit diagram showing one embodiment of the filter / rectifier 110, the switchable fill 420, the multi-channel switch 140 and the LED array 190 shown in Fig. Referring to FIGS. 23 and 24, the LED driving circuit 40 includes a filter / rectifier 110, a switchable fill circuit 420, and a control unit 430.

The filter / rectifier 110 receives an AC voltage Vac from an AC power source 101, filters and rectifies noise to output a rectified voltage Vr. The AC voltage Vac may be a commercial AC voltage (e.g., 110V, 220V, etc.) but is not limited thereto.

The switchable fill circuit 420 receives the rectified voltage Vr and provides current to the LED array 190.

The control unit 430 includes a multi-channel switch circuit 140 including m (two or more integer) switches connected to the LED array 190 and a multi-channel switch control circuit 150 for selectively opening and closing the switches .

The control unit 430 may further include a switchable fill control circuit 440 for controlling the switchable fill circuit 420.

Although not shown, the control unit 430 also includes an analog dimming unit 160, 260, a reference generating circuit 170 (shown in FIG. 1, 11A, 11B, 12A, 12B, 20, The power supply circuits 180 and 280, the breather circuit 265, the phase detection unit 275, and the phase dimming control unit 285. [

The filter / rectifier 110a, the LED array 190a, the multichannel switch circuit 140a and the multichannel switch control circuit 150 in the embodiment of Fig. 24 correspond to the filter / rectifier 110a, Channel switch circuit 140a, and the multi-channel switch control circuit 150, detailed description thereof will be omitted in order to avoid duplication of description.

However, the filter / rectifier 110a, the LED array 190a, the multi-channel switch circuit 140a, and the multi-channel switch control circuit 150 are shown in FIGS. 7 through 10, 11A, 11B, 12A, 12B, The LED array 190b, 190c, 190e or 190g, the multi-channel switch circuit 140b, 140c, 140e, 140g or 240 and the multi-channel switch control circuit 250 shown in any one of Figs. 21 and 22 have.

In the embodiment of FIG. 24, the switchable fill circuit 420 includes a resistor 421, a capacitor 422, a transistor 423, and first and second diodes D1 and D2-. In this embodiment, the transistor 423 is implemented as a PMOS transistor, but is not limited thereto.

The resistor 421 is connected between the first node N1 and the second node N2 and the capacitor 422 is connected between the second node N3 and the ground and the transistor 423 is connected between the second node N2 N2) and the third node N3. The gate of the transistor 423 may be connected to the switchable filter control circuit 440. The first diode D1 is connected in parallel to the resistor 421 between the second node N2 and the first node N1 and the second diode D2 is connected in parallel between the third node N3 and the second node N2. 4 < / RTI > node N4.

The first node N1 is connected to the input of the first LED group 191-1 of the LED array 190a and the fourth node N4 is connected to the input of the first LED group 191- 1) of the LED groups 191-2 to 191-k.

The control unit 430 may be implemented as one or more integrated circuit (IC) chips, and the transistor 423 may be embedded in the IC chip or externally.

Fig. 25 is a circuit diagram for explaining the operation in the section 1 of the LED lighting driving circuit shown in Fig. 24, and Fig. 26 is a schematic waveform for explaining the operation in the section 1 of the LED lighting driving circuit shown in Fig. .

In section 1, the first node voltage Vin is greater than the second node voltage Vsw. That is, in the interval 1, as shown in FIG. 26, the voltage Vin of the first node is larger than the voltage Vsw of the second node.

In section 1, the switchable filter control circuit 440 turns off the transistor 423 of the switchable filter circuit 440.

For example, the switchable filter control circuit 440 compares the first node voltage Vin with the second node voltage Vsw, and if the first node voltage Vin is greater than the second node voltage Vsw, (423) is turned off.

Accordingly, in the interval 1, two current paths I _LED1 and I _C are formed as shown in Fig. One is the first path from the AC power source, i.e. the output of the filter / rectifier 110a, to the LED array 19 and the other is from the output of the filter / rectifier 110a through the resistor 421 to the capacitor 422 That is, the charging path for charging the capacitor 422. Thus, in interval 1, the switchable fill circuit 420 provides the first input current I _LED1 to the LED array 19 and causes the charge current I _C to flow to the capacitor 422 ).

In interval 1, the second diode D2 prevents the current from flowing from the fourth node N4 toward the capacitor 422. [

Fig. 27 is a circuit diagram for explaining the operation in the interval 2 of the LED lighting driving circuit shown in Fig. 24, and Fig. 28 is a schematic waveform for explaining the operation in the interval 2 of the LED lighting driving circuit shown in Fig. .

In the interval 2, the first node voltage Vin is equal to or smaller than the second node voltage Vsw. That is, in the interval 2, as shown in FIG. 28, the voltage Vin of the first node is equal to or smaller than the voltage Vsw of the second node.

In section 2, the switchable filter control circuit 440 turns on the transistor 423 of the switchable fill circuit 440.

For example, the switchable filter control circuit 440 compares the first node voltage Vin with the second node voltage Vsw, and if the first node voltage Vin is equal to or smaller than the second node voltage Vsw , The transistor 423 is turned on.

Accordingly, it is in interval 2, to form the Figure 27 the two current paths (I _{LED2 -1, -2} I _LED2) as shown in Fig. One from the second node N2 to the LED array 19 through the first diode D1 and the other from the second node N2 to the fourth node N2 via the second diode D2, (N4) to the GR2 LED group.

Accordingly, in interval 2, switchable filter circuit 420 provides a second input current (I _{LED2 -1)} as an input to the one input, i.e., the LED group 1 (191-1) of the LED array (19) and provides a first one of the remaining LED groups except for the LED group (191-1) (e. g., 191-3) the input to the third input current (I _{LED2 -2)} of.

Backflow preventing diode 2 in the interval 192 to the second node (N2) from a second diode (D2) and the fourth node (N4), a third input current (I _{LED2 -2)} that is input to the LED group GR2 through the GR1 Prevent them from flowing into the LED group.

29 is a waveform diagram schematically showing the LED input voltage and current in the conventional AC direct type LED driving circuit. Referring to this, the LED input voltage applied to the input terminal of the LED array in the conventional AC direct type LED driving circuit may be a semicircular periodic signal as shown in Figure 29 (a), and the LED As shown in FIG. 29 (b), the input current increases stepwise in accordance with the increase of the LED input voltage, and may decrease in a stepwise manner as the LED input voltage rises. On the other hand, as shown in Fig. 29 (b), there is a section in which the LED input current does not flow.

30 is a waveform diagram schematically showing the LED input voltage and current in the LED lighting driving circuit according to the embodiment of the present invention shown in Figs. 25 and 27. Fig. (A) of Figure 29 is the first node voltage (Vin) and the second represents the node voltage (Vsw), (b) denotes the input current (I _{LED1, LED2,} and I _-1) through the first path, ( c) shows the input current through the second path (I _{LED2 -2).}

29 and 30, there is an interval in which no input current is supplied to the LED array according to the conventional AC direct type LED driving circuit. On the other hand, according to the LED lighting driving circuit according to the embodiment of the present invention, The input current can be supplied to the LED array through different paths, and there is no period in which the input current is not supplied to the LED array. As a result, the flicker of the LED illumination can be reduced.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

LED drive circuits 10, 20A, 20B, 30A, 30B, 40
Filter / rectifier: 110, 110a, 110b
Valley fill circuits 120, 120a, 120b, 220,
The control units 130, 130a, 130b, 230, 230a, 230b, 430
LED arrays 190, 190a, 190b, 190c, 190e, 190g
Multi-channel switch circuits 140, 140a, 140b, 140c, 140e, 140g, 240
Multi-channel switch control circuit: 150, 250
Analog dimming section: 160, 260
Reference generation circuits 170 and 270
Power Circuits: 180, 280
Breeder Circuit: 265
Phase detection unit: 275
Phase dimming control section: 285
Switchable Fill Circuit: 420
Switchable filter control circuit: 440

Claims (11)

In the AC direct type LED driving circuit,
An LED array including first through k-th (two or more integer) LED groups connected in series;
A control unit including a plurality (two or more) of switches connected to the LED array and a switch control circuit for selectively opening and closing the switches; And
And a valley fill circuit receiving the rectified voltage of the AC voltage and supplying the first and second strained rectified voltages to the LED array,
The valley fill circuit
Supplying the first modified rectified voltage to an input of a first LED group of the LED array and supplying the second modified rectified voltage to an input of any of the LED groups except for the first LED group,
Wherein each of the first through k-th LED groups includes at least one LED, and two or more LEDs are connected in series, parallel, or a combination of a series and a parallel when the LEDs in one LED group are two or more. 2. The circuit of claim 1, wherein the valley-
A first capacitor coupled between the first node and the second node;
A first diode coupled between the second node and the third node;
A second capacitor connected between the third node and ground;
A second diode coupled between the ground and the second node; And
And a third diode coupled between the third node and the fourth node,
The first node being coupled to an input of the first LED group,
The fourth node is connected to an input of the j-th LED group among the first to k-th (two or more integer) LED groups,
And j is an integer of 2 or more and k or less. 3. The method of claim 2,
Wherein the first modified rectified voltage is a voltage of the first node,
And the second modified rectified voltage is a voltage of the fourth node. The LED array of claim 2, wherein the LED array
And a diode coupled between an input of the j-th LED group and an output of the (j-1) -th LED group. 4. The method of claim 3, wherein the number of LEDs connected in series from the jth LED group to the kth LED group is
(J-1) LED group is equal to or greater than the number of serial connections of the LEDs from the first LED group to the (j-1) LED group. 4. The method of claim 3, wherein the number of LEDs connected in series from the jth LED group to the kth LED group is
(J-1) th LED group to the first LED group to the (j-1) th LED group. The circuit according to claim 2, wherein the valley-fill circuit
Further comprising a resistor coupled between the first capacitor and the second capacitor, The apparatus of claim 2, wherein the plurality of switches include first through m-th (2 or more integer) switches,
And the switch control circuit selectively opens and closes each of the first through the m-th switches. 9. The apparatus of claim 8, wherein the control unit
And an analog dimming section for adjusting the brightness of the LED array by adjusting a current flowing through each of the first through the m-th switches. The method according to claim 8, wherein m is
The LED drive circuit being equal to or smaller than k. 9. The switching control circuit according to claim 8, wherein the switch control circuit
(J-1) -th LED group from the first node in the valley interval, and a current flows from the fourth node through the j-th LED group to the k-th LED group while the current flows from the first node through the first through The LED driving circuit generating the LED driving circuit.

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