KR20150069805A - Array substrate for In-Plane switching mode liquid crystal display device - Google Patents

Abstract

The present invention provides an array substrate for an in-plane switching mode liquid crystal display device which includes a gate wire and a data wire which are formed to define a pixel region by intersecting on a substrate by interposing an insulation layer, a thin film transistor which is connected to the gate wire and the data wire and is formed on each pixel region, a first protection layer which is formed on the thin film transistor and includes a drain contact holt to expose the drain electrode of the thin film transistor, a pixel electrode which is formed on the first protection layer in contact with the drain electrode of the thin film transistor through the drain contact hole, an insulation layer which is formed on the pixel electrode and includes a pixel contact hole to expose the pixel electrode, a common electrode which is formed on the insulation layer and includes a first opening part which exposes the pixel electrode with regard to the pixel region, and an auxiliary pixel electrode which is formed on the insulation layer to be separated from the common electrode in the first opening part, overlaps the pixel electrode, and is in contact with the pixel electrode through the pixel contact hole.

Description

[0001] The present invention relates to an array substrate for an in-plane switching liquid crystal display device,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a transverse electric field type liquid crystal display device capable of reducing power consumption by reducing a peak voltage.

Generally, the driving principle of a liquid crystal display device utilizes the optical anisotropy and polarization properties of a liquid crystal. Since the liquid crystal has a long structure, it has a directionality in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, when the molecular alignment direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular alignment direction of the liquid crystal due to optical anisotropy, so that image information can be expressed.

At present, an active matrix liquid crystal display (AM-LCD: hereinafter referred to as liquid crystal display) in which a thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner has excellent resolution and video realization capability, It is attracting attention.

The liquid crystal display device includes a color filter substrate on which a common electrode is formed, an array substrate on which pixel electrodes are formed, and a liquid crystal interposed between the two substrates. In such a liquid crystal display device, The liquid crystal is driven to have excellent properties such as transmittance and aperture ratio.

However, liquid crystal driving by an electric field which is applied to the upper and lower sides has a disadvantage that the viewing angle characteristic is not excellent.

Therefore, a transverse electric field type liquid crystal display device having excellent viewing angle characteristics has been proposed to overcome the above disadvantages.

Hereinafter, a general transverse electric field type liquid crystal display device will be described in detail with reference to FIG.

1 is a cross-sectional view of a general transverse electric field type liquid crystal display device.

As shown in the figure, the upper substrate 9, which is a color filter substrate, and the lower substrate 10, which is an array substrate, are spaced apart from each other and face each other. A liquid crystal layer 11 is interposed between the upper and lower substrates 9, .

A bar-shaped common electrode 17 made of a transparent conductive material and a bar-shaped pixel electrode 30 are formed on the same substrate on the lower substrate 10. The liquid crystal layer 11 is formed on the common electrode 17, (L) by the pixel electrode (17) and the pixel electrode (30).

2A and 2B are cross-sectional views respectively showing the on and off states of a general transverse electric field type liquid crystal display device.

2A showing the alignment state of the liquid crystal in the ON state to which the voltage is applied, the phase of the liquid crystal 11a at the position corresponding to the common electrode 17 and the pixel electrode 30 is The liquid crystal 11b located between the common electrode 17 and the pixel electrode 30 is formed by a horizontal electric field L formed by applying a voltage between the common electrode 17 and the pixel electrode 30, And arranged in the same direction as the horizontal electric field (L). That is, in the transverse electric field type liquid crystal display device, since the liquid crystals 11a and 11b operate by the horizontal electric field, the viewing angle becomes wide.

Therefore, when viewed from the front, the transverse electric-field-type liquid-crystal display device can be seen in the direction of 85 to 89 degrees in the up / down / left / right directions without reversal.

2B, a horizontal electric field is not formed between the common electrode 17 and the pixel electrode 30 because the liquid crystal display device is in an off state in which no voltage is applied to the liquid crystal display device. Therefore, The array status does not change.

3 is a plan view showing one pixel region including a switching element in a conventional array substrate for a conventional lateral electric field type liquid crystal display device.

As shown in the figure, a plurality of gate wirings 43, which are arranged in parallel in the horizontal direction and spaced apart from each other by a predetermined distance, are formed on a conventional array substrate 40 for a lateral liquid crystal display device, A common wiring 47 which is formed in parallel with the gate wiring 43 and a data wiring 60 which intersects the two wirings 43 and 47 and which crosses the gate wiring 12 and defines the pixel region P ).

A thin film transistor Tr composed of a gate electrode 45, a semiconductor layer (not shown), and source and drain electrodes 53 and 55 is formed at the intersection of the gate wiring 43 and the data wiring 60 .

A storage capacitor is provided so as to overlap the common wiring (47) and the common wiring (47) itself serves as a first storage electrode.

In the pixel region P, a pixel electrode 70 electrically connected to the drain electrode 55 through the drain contact hole 67, and a pixel electrode 70 formed in parallel with the pixel electrode 70, And a common electrode 49 branched from the common wiring 47 is formed.

A common electrode 49 and a pixel electrode 70 in the form of a bar are alternately formed in the array substrate 40 for a conventional transverse electric field type liquid crystal display device having such a configuration, And is driven by a transverse electric field which is expressed between the electrodes.

In order to generate a transverse electric field which is strong enough when the liquid crystal molecules provided in the liquid crystal layer (not shown) are driven by these two electrodes 49 and 70, a pixel electrode 70 and a common electrode 49 Or a stronger driving voltage may be applied to the two electrodes 70 and 49 so as to have a large voltage difference.

However, if the distance between the pixel electrode 70 and the common electrode 49 alternating with each other is narrowed, the size of the pixel region P must be changed, or the number of the pixel electrodes 70 and the common electrodes 49 However, it is difficult to change the area because the change of the area of the pixel region P is related to the resolution of the transverse electric field type liquid crystal display device, so that it is difficult to change the design. Further, Increasing the number of the pixel electrodes 70 and the common electrodes 49 in each pixel region P increases the area occupied by these two electrodes 70 and 49 themselves, thereby reducing the transmittance and the aperture ratio.

Further, when a large driving voltage is applied between the common electrode 49 and the pixel electrode 70, there is a problem that power consumption is increased.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the problems of the conventional transverse electric field type liquid crystal display device and to provide a liquid crystal display device capable of reducing the number of pixel electrodes and common electrodes in each pixel area, And an object of the present invention is to provide an array substrate for a transverse electric field type liquid crystal display device in which a strong transverse electric field is exhibited by applying the same voltage without narrowing the interval between the common electrodes.

According to an aspect of the present invention, there is provided an array substrate for a liquid crystal display (LCD) device, comprising: a substrate; and; A thin film transistor connected to the gate wiring and the data wiring and formed in each pixel region; A first passivation layer formed on the thin film transistor and having a drain contact hole exposing a drain electrode of the thin film transistor; A pixel electrode formed on the first passivation layer in contact with the drain electrode of the thin film transistor through the drain contact hole; An insulating layer formed on the pixel electrode and having a pixel contact hole exposing the pixel electrode; A common electrode formed on the insulating layer and having a first opening exposing the pixel electrode with respect to each pixel region; And an auxiliary pixel electrode which is formed on the insulating layer so as to be spaced apart from the common electrode in the first opening and which overlaps the pixel electrode and is in contact with the pixel electrode through the pixel contact hole.

At this time, the pixel electrode and the auxiliary pixel electrode are formed one by one in each pixel region.

A plurality of pixel electrodes and a plurality of auxiliary pixel electrodes are formed in each pixel region. The plurality of pixel electrodes are connected to one ends of the pixel electrodes and are spaced apart from each other by a predetermined distance. And a bar-shaped auxiliary common electrode branched from the wiring is provided.

The pixel electrode is formed so that one end of the pixel electrode overlaps with the gate wiring, so that a portion overlapping the gate wiring forms a first storage electrode, and a portion of the common electrode overlapping the first storage electrode is connected to the second storage And the first storage electrode, the insulating layer, and the second storage electrode form a storage capacitor.

The first protective layer is made of an organic insulating material and has a flat surface. Further, the common electrode is further provided with a second opening corresponding to the thin film transistor.

The thin film transistor includes a gate electrode, a gate insulating film, a semiconductor layer made of an amorphous silicon active layer and an impurity amorphous silicon and having a two-layer structure of an ohmic contact layer spaced from each other, A gate electrode, a gate insulating film, a semiconductor layer of a single-layer structure made of an oxide semiconductor material, an etch stopper, a gate electrode, a gate insulating film, and an etch stopper, An interlayer insulating film having a lamination structure of a source electrode and a drain electrode spaced from each other at an upper portion thereof, or a semiconductor layer contact hole exposing a semiconductor layer of polysilicon, a gate insulating film, a gate electrode, And contact with the semiconductor layer of the polysilicon through the semiconductor layer contact hole It is characterized by having the laminated structure of the source electrode and the drain electrode spaced.

The pixel electrode, the common electrode, and the auxiliary pixel electrode are made of a transparent conductive material.

The array substrate for a transverse electric field type liquid crystal display according to the present invention includes a pixel electrode and a plurality of auxiliary pixel electrodes electrically connected to each other with an insulating layer therebetween and electrically connected to each other to form a pixel electrode and a common electrode, The transverse electric field intensity is increased compared with the conventional transverse electric field array substrate in which only one transverse electric field is generated by the pixel electrode and the common electrode which are formed at the predetermined intervals in the different layers, .

In addition, in the case of the array substrate for a transverse electric field type liquid crystal display according to an embodiment of the present invention, a pixel electrode formed of a transparent conductive material and formed on different layers and a part of a common electrode The opening ratio can be reduced without deteriorating the aperture ratio. Thus, the aperture ratio can be improved by the storage capacitor forming characteristics.

According to another aspect of the present invention, there is provided an array substrate for a transverse electric field type liquid crystal display, wherein the common electrode is formed on the entire surface of the display region with first and second openings for each pixel region, Since the common voltage can be applied to the common electrode, the common wiring for applying the common voltage for each pixel region can be omitted, so that the aperture ratio is further increased compared to the conventional array substrate for the transverse electric field type liquid crystal display, .

1 is a cross-sectional view schematically showing a part of a general transverse electric field type liquid crystal display device.
FIGS. 2A and 2B are cross-sectional views respectively showing the on and off states of a general transverse electric field liquid crystal display device;
3 is a plan view showing one pixel region including a switching element in a conventional array substrate for a lateral liquid crystal display device.
4 is a plan view showing one pixel region including a switching element in a substrate for a transverse electric field type liquid crystal display according to an embodiment of the present invention.
5 is a plan view of one pixel region in an array substrate for a transverse electric field type liquid crystal display according to a modification of the embodiment of the present invention.
6 is a graph showing the relationship between the driving voltage having the maximum luminance value of the liquid crystal display device having the array substrate for the liquid crystal display device of the present invention and the liquid crystal display device having the array substrate for the conventional liquid crystal display device A graph showing the measured results.
Fig. 7 is a cross-sectional view of a portion cut along line VII-VII of Fig. 4; Fig.
8 is a cross-sectional view of a portion cut along line VIII-VIII of FIG. 4;

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

4 is a plan view showing one pixel region including a switching element in a substrate for a transverse electric field type liquid crystal display according to an embodiment of the present invention.

As shown in the drawing, a plurality of gate wirings 103 extending in a first direction and spaced apart by a predetermined distance are provided on a transparent substrate 101, and a plurality of gate wirings 103 extending in a second direction crossing the gate wirings 103 The data lines 130 are provided.

At this time, the pixel region P is defined by being captured by the gate wiring 103 and the data wiring 130 intersecting with each other.

Although not shown in the drawings, a common wiring (not shown) may be further formed so as to be spaced apart from the gate wiring 103 by a predetermined distance.

However, it is more preferable that such a common wiring (not shown) is omitted for improving the aperture ratio in the array substrate 101 for a transverse electric field type liquid crystal display according to the embodiment of the present invention.

A thin film transistor Tr which is a switching element connected to the gate and data lines 103 and 130 is formed near each of the gate lines 103 and the data lines 130 in each pixel region P .

At this time, the thin film transistor Tr has a 'U' shape in which the gate electrode 106 branches off from the gate wiring 103, the source electrode 133 branches off to the data wiring 130 and rotates, And a drain electrode 136 of a bar shape is inserted and spaced apart from the opening of the rotated 'U' -shaped source electrode 133. However, the thin film transistor Tr ) Can be variously modified in shape.

In each pixel region P, a pixel electrode 150 made of a transparent conductive material and in contact with the drain electrode 136 of the thin film transistor Tr through a drain contact hole dch is provided.

At this time, the pixel electrode 150 is extended to a portion where the gate wiring 103 positioned adjacent to the drain contact hole dch is formed, thereby forming the first storage electrode 152.

One of the most distinctive features of the array substrate 101 for a transverse electric field type liquid crystal display according to an embodiment of the present invention is that the pixel electrode 150 is in contact with the pixel electrode 150 through the pixel contact hole pch, 150 are overlapped with the auxiliary pixel electrode 172.

At this time, the auxiliary pixel electrode 172 is formed of a transparent conductive material, and is formed in a layer other than the layer in which the pixel electrode 150 is formed.

That is, an insulating layer (not shown) is interposed between the pixel electrode 150 and the auxiliary pixel electrode 172. In the insulating layer (not shown), a pixel contact hole pch ) Is provided.

In addition, in the array substrate 101 for a transverse electric field type liquid crystal display device according to an embodiment of the present invention, the same layer in which the auxiliary pixel electrode 172 is formed, that is, the insulating layer (not shown) And a first opening op1 that exposes the pixel electrode 150 and the auxiliary pixel electrode 172 with respect to the pixel region P is formed in the pixel region 150. The thin film transistor Tr is formed of a transparent conductive material, The common electrode 170 having the second opening op2 removed in correspondence to the second opening op2 is formed.

At this time, the auxiliary pixel electrode 172 and the common electrode 170 are formed in the same layer, but the auxiliary pixel electrode 172 is provided inside the first opening op1 of the common electrode 170, .

The common electrode 170 having the first and second openings op1 and op2 is connected to the pixel region P over the entire display region for displaying an image.

A portion of the common electrode 170 overlapping with the first storage electrode 152 constitutes a second storage electrode 171. The first storage electrode 152 and the insulating layer and the second storage electrode 171 Is a storage capacitor (StgC).

In the array substrate 101 for a transverse electric field type liquid crystal display according to an embodiment of the present invention having such a structure, a first transverse electric field is generated between the pixel electrode 150 and the common electrode 170 adjacent thereto, A secondary transverse electric field is generated between the auxiliary pixel electrode 172 formed in contact with the pixel electrode 150 and the common electrode 170 adjacent thereto.

Accordingly, the array substrate 101 for a transverse electric field type liquid crystal display according to an embodiment of the present invention includes a pixel electrode 150 having a dual finger type electrically connected to each other with an insulating layer (not shown) (70 in FIG. 3), which are formed at different intervals on the different layers by the double electric field between the common electrode 170 and the common electrode 170, the auxiliary pixel electrode 172 and the common electrode 170, 3) of the conventional transverse electric field type array substrate (40 in Fig. 3) in which only one transverse electric field is generated by the electrode (49 in Fig. 3), thereby reducing power consumption.

3) of the common electrode (49 in FIG. 3) and the pixel electrode (70 in FIG. 3) formed in different layers are formed on the storage capacitor (StgC in FIG. 3) of the array substrate for a conventional lateral electric field type liquid crystal display However, in the case of the array substrate 101 for a transverse electric field type liquid crystal display according to the embodiment of the present invention, the portion where the gate wiring 103 is formed In other words, the pixel electrode 150 and the common electrode 170, which are made of a transparent conductive material and formed on different layers, can be formed with respect to the boundary of the pixel region P, (StgC) formation characteristics, it is another characteristic.

Furthermore, the array substrate 101 for a transverse electric field type liquid crystal display according to an embodiment of the present invention includes a common electrode 170 having the first and second openings op1 and op2, The common electrode 170 may be applied through an auxiliary wiring (not shown) provided outside the display region.

Therefore, unlike the conventional array substrate for a transverse electric field type liquid crystal display device (40 in Fig. 3), it is not necessarily required to form a common wiring, so that the aperture ratio can be further improved by omitting the common wiring.

In the drawing, one pixel electrode 150 and a corresponding auxiliary pixel electrode 172 are formed in each pixel region P, as an example. This configuration can be applied to a high-resolution model in which the width of the pixel region P is relatively small. In a low-resolution model in which the width of the pixel region P is relatively large, the pixel electrode 150 and the auxiliary pixel Two or more sets of the electrodes 172 may be formed at predetermined intervals.

That is, as shown in Fig. 5 (a plan view for one pixel region in the array substrate for a transverse electric field type liquid crystal display according to a modified example of the embodiment of the present invention), one pixel region And has a plurality of pixel electrodes 150 spaced apart from each other by a predetermined distance.

The auxiliary pixel electrode 172 overlaps with the pixel electrode 150 and is provided with a bar shape. The auxiliary pixel electrode 172 overlaps the pixel electrode 150 and the pixel contact 150, Through the hole.

The auxiliary pixel electrodes 172 are formed on the same layer, that is, on the insulating layer (not shown), between the respective pixel regions P to expose all the auxiliary pixel electrodes 172 provided in the pixel regions P And a common electrode 170 having a first opening op1 having a first opening op1 is formed on the entire surface of the display region. A plurality of auxiliary common electrodes 174 in the form of a bar branched from the common electrode 170 are formed.

Accordingly, a plurality of the auxiliary pixel electrodes 172 and the auxiliary common electrodes 174 alternate with each other in the first openings op1 in each pixel region P.

The array substrate 201 for a transverse electric field type liquid crystal display according to a modification of the embodiment of the present invention including the plurality of alternate auxiliary pixel electrodes 172 and the auxiliary common electrode 174 is also provided with a plurality of auxiliary pixels The electrode 172 is electrically connected to the pixel electrode 150 at the lower portion thereof and is electrically connected to the common electrode 170 adjacent to the pixel electrode 150 and the auxiliary pixel electrode 172, Or the auxiliary common electrode 174 can be realized in a double manner.

Therefore, the array substrate 201 for a transverse electric field type liquid crystal display according to a modification of the embodiment of the present invention is also provided with a conventional pixel electrode (70 in Fig. 3) and a common electrode (49 in Fig. 3) (40 in FIG. 3) relative to the transverse electric field type liquid crystal display device array substrate (40 in FIG. 3), the power consumption is reduced.

6 is a graph showing the relationship between the driving voltage having the maximum luminance value of the liquid crystal display device having the array substrate for the liquid crystal display device of the present invention and the liquid crystal display device having the array substrate for the conventional liquid crystal display device A graph showing the results of measurement shows the driving voltage of an array substrate having the same resolution (700 PPI) and having a spacing between the common electrode and the pixel electrode. In this graph, the horizontal axis represents the driving voltage and the vertical axis represents the luminance value. The array substrate for a transverse electric field type liquid crystal display according to an embodiment of the present invention is a 700 ppi proposed structure, The array substrate is referred to as '700 ppi conventional structure'.

The liquid crystal display device having the array substrate for a transverse electric field type liquid crystal display according to the embodiment of the present invention has a maximum luminance value of about 0.192 at a driving voltage of about 3 V, In the case of a liquid crystal display device having an array substrate, it can be seen that the maximum luminance value is about 0.172 at a driving voltage of about 5.2V.

Accordingly, it can be seen that the driving voltage for realizing the maximum luminance value is low in the array substrate for a transverse electric field type liquid crystal display according to the embodiment of the present invention, and the maximum luminance value is improved by about 0.2.

When the driving voltage is low, the power consumption consumed by the liquid crystal display device is finally reduced. When the maximum luminance value is increased, the transmittance is increased. This means that the non-display area of the storage capacitor or the like overlaps the gate electrode Or the aperture ratio of the pixel region P is improved by omitting the common wiring.

Hereinafter, a sectional configuration of an array substrate for a transverse electric field type liquid crystal display device according to an embodiment of the present invention will be described.

FIG. 7 is a cross-sectional view taken along line VII-VII of FIG. 4, and FIG. 8 is a cross-sectional view taken along line VII-VII of FIG. Here, for convenience of description, a region where the thin film transistor Tr as a switching element is formed is defined as a switching region TrA, and a region where the storage capacitor StgC is formed is defined as a storage region StgA.

As shown in the figure, a gate wiring 103 extending in a first direction is formed on a substrate 101, and is branched in the gate wiring 103 in the switching region TrA, 103 itself form a gate electrode 106 as a partial region thereof.

Next, a gate insulating film 110 made of an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is formed on the entire surface of the gate wiring 103 and the gate electrode 106.

An active layer 120a made of pure amorphous silicon and an ohmic contact layer 120b made of impurity amorphous silicon and separated from the active layer 120a are formed in the switching region TrA on the gate insulating layer 110 The semiconductor layer 120 is formed.

A data line 130 which intersects the gate line 103 and defines the pixel region P is formed on the gate insulating layer 110 so as to extend in the second direction.

A source electrode 133 is formed in the switching region TrA so that the semiconductor layer 120 is formed on the gate insulating layer 110 and more precisely on the ohmic contact layer 120b in the data line 130 And a drain electrode 136 is formed on the ohmic contact layer 120b to be spaced apart from the source electrode 133. [

The gate electrode 106, the gate insulating layer 110, the semiconductor layer 120, and the source and drain electrodes 133 and 136, which are sequentially stacked in the switching region TrA, Tr).

Meanwhile, in one embodiment of the present invention, the semiconductor layer 120 of the thin film transistor Tr is formed of amorphous silicon and has a stacked structure of the bottom gate structure as described above. However, The laminated structure of the thin film transistor Tr may be variously modified.

That is, the thin film transistor (Tr) is a bottom gate structure having a gate electrode, a gate insulating film, an oxide semiconductor layer of a single layer structure made of an oxide semiconductor material, an etch stopper, A stacked structure of source and drain electrodes in contact with the oxide semiconductor layer may be formed.

Further, the thin film transistor (Tr) has a top gate structure in which the semiconductor layer is made of polysilicon. The thin film transistor Tr has a semiconductor layer of polysilicon, a gate insulating film, a gate electrode, a semiconductor layer An interlayer insulating film having a contact hole and a stacked structure of source and drain electrodes which are in contact with the semiconductor layer of the polysilicon through the semiconductor layer contact hole and are spaced apart from each other.

In the array substrate 101 for a transverse electric field type liquid crystal display according to an embodiment of the present invention, the semiconductor layer 120 is made of amorphous silicon, and the active layer 120a and the ohmic contact layer 120b have a double layer structure The semiconductor layer 120 and the source and drain electrodes 133 and 136 are patterned by a single mask process. The semiconductor layer 120 is formed under the data line 130 with the same material as the active layer 120a. A dummy semiconductor pattern 121 having a bilayer structure of a first dummy pattern 121a and a second dummy pattern 121b made of the same material forming the ohmic contact layer 120b is provided. The pattern 121 may be omitted when the semiconductor layer 120 and the source and drain electrodes 133 and 136 are patterned through different mask processes, When made with water or a semiconductor material or made of polysilicon modification also the dummy semiconductor pattern (121) provided under the data line 130 is omitted.

On the other hand, the first passivation layer 140 having a flat surface covering the thin film transistor Tr having various lamination structures as described above is provided. The first passivation layer 140 having such a smooth surface may be formed of an organic insulating material, for example, a photo acryl.

The reason why the first passivation layer 140 is formed to have a flat surface with the organic insulating material is that the storage capacitor StgC has a lowered opening ratio due to the characteristic of the array substrate 101 for a transverse electric field type liquid crystal display according to the embodiment of the present invention, To minimize the influence of the storage capacitor StgC on the gate wiring 103. In this case,

A second protective layer (not shown) made of an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiN x) may be further provided under the first passivation layer 140 have. The second passivation layer (not shown) prevents the channel portion from being contaminated due to the first passivation layer 140 of organic insulating material being in direct contact with the active layer 120b.

Meanwhile, the drain electrode 136 of the thin film transistor Tr is connected to the first passivation layer 140 (including the second passivation layer (not shown) when the second passivation layer (not shown) is provided) A drain contact hole (dch) is formed.

Next, a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO) is formed in each pixel region P above the first passivation layer 140, A pixel electrode 150 having a bar shape is formed in contact with the drain electrode 136 through the through hole.

Although it is shown that one pixel electrode 150 is formed at the central portion of each pixel region P in the drawing, in the case of the transverse electric field array substrate 201 according to the modification of the embodiment of the present invention And may have a shape in which one ends are connected to each other in the region P, and may be formed in a plurality of spaced apart shapes.

 The portion of the pixel electrode 150 located at the lower end of the drain contact hole dch is extended to the portion where the gate line 103 is formed, that is, to the storage region StgA. Thus, (152).

Next, an insulating layer 160 made of an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is formed on the entire surface of the substrate 101 over the pixel electrode 150 and the first storage electrode 152 Respectively.

At this time, the insulating layer 160 is provided with pixel contact holes (pch) for exposing the pixel electrodes 150.

The common electrode 170 is formed on the insulating layer 160 and is formed of a transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).

The common electrode 170 includes a portion corresponding to the bar-shaped pixel electrode 150 in each pixel region P, a first opening op1 corresponding to a predetermined width on both sides of the pixel electrode 150, And a second opening op2 for the switching region TrA.

One of the most distinctive features of the array substrate 101 according to an embodiment of the present invention is that the common electrode 170 is made of the same material and each pixel region P is formed on the insulating layer 160, A pixel electrode 172 overlapped with the pixel electrode 150 and contacting the pixel electrode 150 through the pixel contact hole pch is provided in the first opening op1 have.

The auxiliary pixel electrode 172 is spaced apart from the common electrode 170.

In the array substrate 101 for a transverse electric field type liquid crystal display according to an embodiment of the present invention, the auxiliary pixel electrode 172 is formed as one example in each pixel region P, A bar-shaped pixel electrode (not shown) is formed in each pixel region P in which a plurality of pixel electrodes 150 are formed in each pixel region P, as in the transverse electric field type array substrate 201 (150) are formed.

On the other hand, in the storage region StgA, the second storage electrode 171 overlaps the common electrode 170 with the first storage electrode 152 and the insulating layer 160 interposed therebetween, The first storage electrode 152, the insulating layer 160, and the second storage electrode 171 form a storage capacitor StgC.

The array substrate 101 for a transverse electric field type liquid crystal display according to an embodiment of the present invention having the above-described structure includes a pixel electrode 150 formed on the first passivation layer 140 and a pixel electrode 150 formed on the insulating layer 160 Since the transverse electric field is generated between the common electrode 170 (or the auxiliary common electrode) adjacent to the auxiliary pixel electrode 172 with the same potential, the pixel electrode (70 in FIG. 3) (40 in Fig. 3) which is provided with only the common electrode (49 in Fig. 3) and the common electrode (49 in Fig. 3).

The present invention is not limited to the above-described embodiments and modifications, and various modifications may be made without departing from the gist of the present invention.

101: substrate
110: gate insulating film
121: dummy semiconductor pattern
121a and 121b: first and second dummy patterns
130: Data wiring
140: first protective layer
150: pixel electrode
160: insulating layer
170: common electrode
172: auxiliary pixel electrode
P: pixel area
pch: Pixel contact hole

Claims (8)

A gate line and a data line formed on the substrate, the gate line and the data line intersecting each other with the insulating film therebetween to define the pixel region;
A thin film transistor connected to the gate wiring and the data wiring and formed in each pixel region;
A first passivation layer formed on the thin film transistor and having a drain contact hole exposing a drain electrode of the thin film transistor;
A pixel electrode formed on the first passivation layer in contact with the drain electrode of the thin film transistor through the drain contact hole;
An insulating layer formed on the pixel electrode and having a pixel contact hole exposing the pixel electrode;
A common electrode formed on the insulating layer and having a first opening exposing the pixel electrode with respect to each pixel region;
A pixel electrode formed on the insulating layer so as to be spaced apart from the common electrode in the first opening and in contact with the pixel electrode through the pixel contact hole,
And a plurality of pixel electrodes formed on the substrate.
The method according to claim 1,
And the pixel electrode and the auxiliary pixel electrode are formed one by one in each pixel region.
The method according to claim 1,
A plurality of pixel electrodes and a plurality of auxiliary pixel electrodes are formed in each pixel region, and the plurality of pixel electrodes are connected to one ends of the plurality of pixel electrodes,
And an auxiliary common electrode in the form of a bar branched from the common wiring is provided in each of the spaced apart regions between the adjacent pixel electrodes.
The method according to claim 1,
The pixel electrode is formed so that one end of the pixel electrode overlaps with the gate wiring, and a portion overlapping the gate wiring forms a first storage electrode,
Wherein a portion of the common electrode that overlaps with the first storage electrode is a second storage electrode,
Wherein the first storage electrode, the insulating layer, and the second storage electrode constitute storage capacitors.
The method according to claim 1,
Wherein the first passivation layer is made of an organic insulating material and has a flat surface. ≪ RTI ID = 0.0 > 11. < / RTI >
The method according to claim 1,
Wherein the common electrode further comprises a second opening removed corresponding to the thin film transistor.
The method according to claim 1,
The thin-
A gate electrode, a gate insulating film, a semiconductor layer having a bilayer structure of an amorphous silicon active layer and an impurity amorphous silicon and an ohmic contact layer spaced from each other, and a source electrode and a drain contacted with the ohmic contact layer, Electrode,
A gate electrode, a gate insulating film, a semiconductor layer of a single-layer structure made of an oxide semiconductor material, an etch stopper, a source electrode and a drain electrode which are in contact with the semiconductor layer and are spaced apart from each other above the etch stopper Or,
An interlayer insulating film having a polysilicon semiconductor layer, a gate insulating film, a gate electrode, and a semiconductor layer contact hole exposing the semiconductor layer of the polysilicon, and a semiconductor layer of the polysilicon via the semiconductor layer contact hole, And a source electrode and a drain electrode which are in contact with each other and are spaced apart from each other.
The method according to claim 1,
Wherein the pixel electrode, the common electrode, and the auxiliary pixel electrode are made of a transparent conductive material.

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