KR20140118042A - Light emitting diode and lighting device employing the same - Google Patents

Abstract

A light emitting diode and a light emitting element employing the same are disclosed. The light emitting diode includes: a transparent substrate having a hexagonal crystal structure having a first surface, a second surface, and a side surface; A first conductive semiconductor layer positioned on a first surface of the transparent substrate; A second conductivity type semiconductor layer located on the first conductivity type semiconductor layer; An active layer located between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer; A first electrode electrically connected to the first conductivity type semiconductor layer; A second electrode electrically connected to the second conductivity type semiconductor layer; A first bump positioned on the first electrode; And a second bump on the second electrode, wherein the transparent substrate has a parallelogram shape including two acute angles and two obtuse angles. By adopting a substrate having a parallelogram shape, it is possible to prevent the reduction of the yield of the light emitting diode due to the cracking of the growth substrate during the manufacturing process.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a light emitting diode (LED)

The present invention relates to a light emitting diode and a light emitting device, and more particularly to a flip chip type light emitting diode and a light emitting device employing the same.

BACKGROUND ART GaN-based LEDs have been used in a variety of applications such as color LED display devices, LED traffic signals, backlight units, and lighting devices since gallium nitride (GaN) -based LEDs have been developed.

The gallium nitride series light emitting diode is generally formed by growing epitaxial layers on a substrate such as sapphire, and includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer interposed therebetween. On the other hand, an n-electrode is formed on the n-type semiconductor layer, and a p-electrode is formed on the p-type semiconductor layer. The light emitting diode is electrically connected to the external power source through the electrodes and driven. At this time, a current flows from the p-electrode to the n-electrode through the semiconductor layers.

On the other hand, a flip-chip type light emitting diode is used in order to prevent light loss by the p-electrode and increase the heat radiation efficiency. Since the light emitting diode having a horizontal structure has to transmit heat through a growth substrate such as a sapphire substrate, the heat dissipation efficiency is low. On the other hand, the flip chip type light emitting diodes transmit heat through the electrode pads, and thus heat radiation efficiency is high. In addition, since the flip chip type light emitting diode emits light to the outside through the growth substrate, light loss due to the p-electrode can be reduced as compared with a light emitting diode having a horizontal structure that emits light to the outside through the epi layer. Particularly, a light emitting diode that emits light of a high energy such as a deep ultraviolet light emitting diode generates a light loss due to a p-type semiconductor layer, and thus adopts a flip chip type structure.

A light emitting diode having a current crowding effect reduced in a light emitting diode and having a shape suitable for flip chip packaging has been disclosed by Bilenko et al. In US Pat. No. 7,928,451 entitled "SHAPED CONTACT LAYER FOR LIGHT EMITTING HETEROSTRUCTURE" .

1 is a schematic plan view for explaining a conventional flip chip type light emitting diode.

1, the light emitting diode includes a substrate 11, an n-type semiconductor layer 13, a p-type semiconductor layer 17, an active layer, an n-electrode 19, a p- Bump 30a and p-bump 30b.

The substrate 11 has a substantially rectangular shape. The substrate 11 may be, for example, a sapphire substrate as a growth substrate for growing a gallium nitride-based semiconductor layer. On the other hand, the p-type semiconductor layer 17 is located on a part of the n-type semiconductor layer 13 as a contact layer and has an H-shape. The p-type semiconductor layer 17 has a shape recessed inward from both sides of the central region.

The n-electrode 19 is in ohmic contact with the n-type semiconductor layer 13 and the p-electrode 20 is in ohmic contact with the p-type semiconductor layer 17 along the shape of the p-type semiconductor layer 17. On the other hand, the n-bump 30a is located on the n-electrode 19 along one side edge of the substrate 11 in parallel with the p-type semiconductor layer 17. In addition, the p-bump 30b is located on the p-electrode 20. The p-bump 30b has a shape similar to that of the p-electrode 20.

 The prior art can exhibit excellent light output characteristics under a high current density condition by making the p-type semiconductor layer 17 H-shaped. However, since the conventional technique employs a rectangular shape, the growth substrate is broken into a rectangular shape. At this time, a growth substrate having a hexagonal crystal structure like a sapphire substrate easily cracks along the inclined direction with respect to the breaking direction, as shown in Fig. 2, and thus the yield of the light emitting diode is lowered. Particularly, as the sapphire substrate is thickened to about 150 mu m or more, cracks are more conspicuous.

A problem to be solved by the present invention is to provide a light emitting diode which can easily disperse a current and is suitable for flip chip packaging and a light emitting element having the same.

Another object of the present invention is to provide a light emitting diode and a light emitting device having the same that can prevent a yield from being reduced due to cracks in a growth substrate.

Another object of the present invention is to provide a light emitting diode and a light emitting device exhibiting improved light output characteristics.

A light emitting diode according to one aspect of the present invention includes: a transparent substrate of a hexagonal crystal structure having a first side, a second side, and a side connecting the first side and the second side; A first conductive semiconductor layer located on a first surface of the transparent substrate; A second conductive semiconductor layer disposed on the first conductive semiconductor layer; An active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer; A first electrode electrically connected to the first conductive semiconductor layer; A second electrode electrically connected to the second conductivity type semiconductor layer; A first bump positioned on the first electrode; And a second bump disposed on the second electrode, wherein the transparent substrate has a parallelogram shape including two acute angles and two obtuse angles.

The transparent substrate having the hexagonal crystal structure tends to be cracked along a specific crystal plane. When a light emitting diode is manufactured by braking a wafer so that the transparent substrate has a rectangular shape, a crack is generated in an oblique direction on the breaking surface on the wafer, thereby causing a failure of the light emitting diode. On the other hand, since the transparent substrate of the hexagonal crystal structure has a parallelogram shape, it is possible to break along the surface on which cracks tend to occur on the wafer, thereby preventing occurrence of defective light emitting diodes due to cracks.

Furthermore, since the light emitted near the acute angle increases, the light extraction efficiency of the light emitting diode is improved.

The transparent substrate is a sapphire substrate and may have a thickness in the range of 150 mu m to 400 mu m.

The transparent substrate may have a rhombic shape. In addition, the side surfaces of the transparent substrate may be formed of an m-plane group. Since the transparent substrate having the hexagonal crystal structure is likely to generate cracks along the m plane group, it is possible to prevent the occurrence of product defects due to cracks by braking the wafer along the m plane group.

In addition, the second electrode may include a reflective layer for reflecting light generated in the active layer.

Meanwhile, the first electrode may surround the second conductivity type semiconductor layer, and further, the first electrode may be uniformly spaced from the second conductivity type semiconductor layer.

In some embodiments, the first bump is located near one acute angle, and the second conductivity type semiconductor layer can be located near two acute angles and another acute angle. In addition, the second bump may be located in the upper region of the second conductivity type semiconductor layer near the two obtuse angles and the other acute angle.

As a result, the second bumps can be formed in a relatively large area, which is suitable for flip chip packaging and can improve the current dispersion performance.

The second electrode covers most of the region of the second conductive type semiconductor layer and the second bump is located inwardly of the second electrode along the shape of the second electrode, being spaced substantially the same distance from the edge of the second electrode. Thus, current concentration can be prevented.

Furthermore, the second conductive type semiconductor layer may have a diagonal indentation connecting the two acute angles, and the first electrode may penetrate into the indentation.

In some embodiments, the first bump is located near one obtuse angle, and the second conductivity type semiconductor layer is located over two acute angles and another obtuse angle, and the second bump is located near the second conductivity -Type semiconductor layer over the two acute angles and the other one of the obtuse angles.

On the other hand, irregularities may be formed on the surface of the first conductivity type semiconductor layer between the second conductivity type semiconductor layer and the first electrode. The current can be dispersed by preventing the current from flowing along the surface of the first conductivity type semiconductor layer by the unevenness.

A light emitting device according to another aspect of the present invention includes: a transparent substrate having a hexagonal crystal structure having a first surface, a second surface, and a side surface connecting the first surface and the second surface; A first conductive semiconductor layer located on a first surface of the transparent substrate; A second conductive semiconductor layer disposed on the first conductive semiconductor layer; An active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer; A first electrode electrically connected to the first conductive semiconductor layer; A second electrode electrically connected to the second conductivity type semiconductor layer; A first bump positioned on the first electrode; A second bump positioned on the second electrode; And a mount substrate having a circuit pattern on its upper surface. Further, the transparent substrate has a parallelogram shape including two acute angles and two obtuse angles, and the first bumps and the second bumps are bonded to the circuit pattern.

Further, the transparent substrate may be in a rhombic shape. In addition, the side surfaces of the transparent substrate may be formed of an m-plane group.

The first electrode may surround the second conductive type semiconductor layer, and the first electrode may be uniformly spaced from the second conductive type semiconductor layer.

In some embodiments, the first bump is located near one acute angle, and the second conductive semiconductor layer is located near two acute angles and another acute angle, -Type semiconductor layer may be located within the upper region of the first semiconductor layer and near the two obtuse angles and the other acute angle.

Furthermore, the second conductive type semiconductor layer may have a diagonal indentation connecting the two acute angles, and the first electrode may penetrate into the indentation.

In some embodiments, the first bump is located near one obtuse angle, and the second conductivity type semiconductor layer is located over two acute angles and another obtuse angle, and the second bump is located near the second conductivity -Type semiconductor layer over the two acute angles and the other one of the obtuse angles.

Meanwhile, the mount substrate may be an AlN substrate.

According to embodiments of the present invention, adoption of a substrate having a parallelogram shape can prevent a decrease in light emitting diode yield due to cracking of the growth substrate during the manufacturing process. Furthermore, by providing a semiconductor layer structure, an electrode structure and a bump structure suitable for a parallelogram and a rhombus shape, it is possible to provide a light emitting diode and a light emitting device which can easily disperse current and are suitable for flip chip packaging. Further, by adopting a transparent substrate having two acute angles, a light emitting diode and a light emitting device exhibiting improved light output characteristics can be provided.

1 is a schematic plan view for explaining a conventional flip chip type light emitting diode.
Fig. 2 is an optical photograph showing a crack occurring during the manufacture of a conventional flip chip type light emitting diode.
3 is a schematic plan view illustrating a flip chip type light emitting diode according to an embodiment of the present invention.
4 is a schematic cross-sectional view taken along the cutting line AA of FIG. 3 for explaining a flip-chip type light emitting diode according to an embodiment of the present invention.
5 is a cross-sectional view illustrating a light emitting device according to an embodiment of the present invention.
6 is a schematic plan view illustrating a light emitting diode according to another embodiment of the present invention.
7 is a plan view of a wafer for explaining a breaking surface of a light emitting diode according to embodiments of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the width, length, thickness, etc. of components may be exaggerated for convenience. Like reference numerals designate like elements throughout the specification.

3 is a schematic plan view illustrating a flip chip type light emitting diode according to an embodiment of the present invention, and FIG. 4 is a cross-sectional view taken along the cut line A-A of FIG.

3 and 4, the light emitting diode includes a substrate 51, a first conductive semiconductor layer 53, an active layer 55, a second conductive semiconductor layer 57, a first electrode 59, The second electrode 60, the first bump 70a, the second bump 70b, and the insulating layer 71. [

The substrate 51 is a substrate having a hexagonal crystal structure, and may be a growth substrate for growing gallium nitride epitaxial layers, such as sapphire, silicon carbide, or gallium nitride. In particular, the substrate 51 may be a sapphire substrate to provide a deep ultraviolet light emitting diode. The substrate 51 includes a first surface, a second surface, and a side surface. The first surface is a surface on which the semiconductor layers are grown, and the second surface is a surface on which light generated in the active layer 25 is emitted to the outside. The side surface connects the first surface and the second surface. The side surface of the substrate 51 may be a surface perpendicular to the first surface and the second surface, but is not limited thereto and may include an inclined surface.

Further, the substrate 51 may have a parallelogram shape, in particular a diamond shape, having two acute angles and two obtuse angles. Since the substrate 51 has an acute angle, extraction efficiency of light through the acute angle portion is improved.

On the other hand, in the present embodiment, the thickness of the substrate 51 may exceed 100 탆, and in particular may have a value within a range of 150 탆 to 400 탆. As the substrate 51 is thicker, the light extraction efficiency is improved.

On the other hand, the side surface of the substrate 51 includes a breaking surface, and the breaking surface may be formed of an m-side group.

The first conductive type semiconductor layer 53 is located on the first side of the substrate 51. The first conductive semiconductor layer 53 may cover the entire first surface of the substrate 51 but is not limited thereto. The first conductive semiconductor layer 53 may be formed to expose the first surface along the edge of the substrate 51, (53) may be located within the upper region of the substrate (51).

The second conductivity type semiconductor layer 57 is located on one region of the first conductivity type semiconductor layer 53 and between the first conductivity type semiconductor layer 53 and the second conductivity type semiconductor layer 57, 55).

The second conductivity type semiconductor layer 57 may be located at an angle of two acute angles away from one acute angle. The second conductivity type semiconductor layer 57 may have a shape that extends at two obtuse angles in the vicinity of the other acute angle, for example, a C-shape having a narrow entrance. 3, the second conductivity type semiconductor layer 57 may have a recessed portion in the central region of the substrate 51. [ The indentation is angled in a diagonal direction connecting the two acute angles. The width of the second conductivity type semiconductor layer in the diagonal direction can be reduced by the depressed portion, and the current dispersion performance of the light emitting diode is improved.

On the other hand, the first electrode 59 may surround the second conductivity type semiconductor layer 57. In FIG. 3, the first electrode 59 surrounds the entire periphery of the second conductivity type semiconductor layer 57, but the present invention is not limited thereto. The first electrode 59 may extend to both sides of the second conductive type semiconductor layer 57 from the position where the first bump 70a is located and surround about 50% or more of the second conductive type semiconductor layer 57 . In addition, the first electrode 59 is formed to penetrate into the indented portion of the second conductive type semiconductor layer 57.

The first electrode 59 may also be uniformly spaced from the second conductive semiconductor layer 57. Thus, concentration of current can be prevented. Further, concaves and convexes (not shown) may be formed on the surface of the first conductivity type semiconductor layer 53 between the first electrode 59 and the second conductivity type semiconductor layer 57. The current can be prevented from flowing along the surface of the second conductivity type semiconductor layer 53 by the unevenness, and the current can be further dispersed.

The second electrode 60 is located on the second conductive semiconductor layer 57 and is electrically connected to the second conductive semiconductor layer 57. The second electrode 60 may include a reflective layer 61 and a barrier layer 63. The reflective layer 61 may include Al or an Al alloy, and may include, for example, Ni / Au / Al. The barrier layer 63 may also include Ni and may be formed of a metal layer of a multi-layer structure.

The first bump 70a is located on the first electrode 59. The first bump 70a is disposed close to one acute angle and is located away from the second conductivity type semiconductor layer 57. [ That is, the first bump 70a is biased toward the one acute angle.

And the second bump 70b is located on the second electrode 60. [ The second bump 70b may be located near the other acute angle and two obtuse angles and may be located inside the second electrode 60 by the same distance from the edge of the second electrode 60 .

The first bump 70a and the second bump 70b may be formed of the same metal material. Also, the first and second bumps 70a and 70b may be formed in a multi-layer structure, and may include, for example, an adhesive layer, a diffusion prevention layer, and a bonding layer. The adhesion layer may include, for example, Ti, Cr, or Ni, and the diffusion barrier layer may be formed of Cr, Ni, Ti, W, TiW, Mo, Pt, or a composite layer thereof. AuSn. ≪ / RTI >

On the other hand, the distances from the first bump 70a to the second conductive type semiconductor layer 57 or the second bump 70b located at two obtuse angles may be substantially equal to each other. Further, the second conductive semiconductor layer 57, the first electrode 59, the second electrode 60, the first bump 70a, and the second bump 70b are connected to each other by a line connecting two acute angles Line). ≪ / RTI >

The insulating layer 71 is formed on the first conductive semiconductor layer 53, the active layer 55 and the second conductive semiconductor layer 57 except for the first bump 70a and the second bump 70b. The first electrode 59 and the second electrode 60 are covered and protected. The insulating layer 71 may be formed of a single layer of a silicon oxide film or a silicon nitride film, but is not limited thereto and may be formed of multiple layers. Furthermore, the insulating layer 71 may be formed of a distributed Bragg reflector in which oxide layers having different refractive indexes are stacked. Therefore, light can be reflected in the region between the first electrode 59 and the second conductive type semiconductor layer 57, and the light extraction efficiency of the light emitting diode can be further improved.

5 is a cross-sectional view illustrating a light emitting device according to an embodiment of the present invention.

Referring to FIG. 5, the light emitting device includes the light emitting diode and the mount substrate 81 described above with reference to FIGS. 3 and 4. The mount substrate 81 has a circuit pattern including pads 80a and 80b on its upper surface.

Since the light emitting diode is as described above, a detailed description thereof will be omitted. The mount substrate 81 may be, for example, a ceramic substrate such as AlN, but it is not limited thereto and may be various types of printed circuit boards.

The pads 80a and 80b are formed to correspond to the shapes of the first bump 70a and the second bump 70b and the first bumps 70a and 70b are formed on the pads 80a and 80b, And two bumps 70b are bonded.

6 is a schematic plan view illustrating a light emitting diode according to another embodiment of the present invention.

Referring to FIG. 6, the first bump 70a is substantially similar to the light emitting diode described with reference to FIGS. 3 and 4, but differs from the first bump 70a in that the first bump 70a is disposed near one obtuse angle, The semiconductor layer 57 is located at another obtuse angle and two acute angles, and the entrance may have a large C shape.

The second conductive semiconductor layer 57, the first electrode 59, the second electrode 60, the first bump 70a, and the second bump 70b are formed on the diagonal line connecting the two obtuse angles It can have a symmetrical structure.

7 is a plan view of a wafer for explaining a breaking surface of a light emitting diode according to embodiments of the present invention. A sapphire substrate having a hexagonal crystal structure in which the flat zone is a plane will be described as an example. Here, the vertical direction of the substrate is the c-axis, and a [11-20] and m [1-100] axes are indicated by arrows.

7 (a) and 7 (b), the dotted line on the wafer shows the planar shape of the light emitting diode formed by the four braking surfaces. As shown in Fig. 7 (a), such a planar shape is obtained by forming scribing lines parallel to the a-axis direction and scribing lines at angles inclined by 60 degrees in the clockwise direction with respect to the a-axis direction , And braking it. As shown in Fig. 7 (b), the scribing lines at an angle inclined by 60 degrees clockwise with respect to the a axis direction and the scribe lines inclined by 60 degrees counterclockwise with respect to the a axis direction May be formed by forming ice lines and then braking them. At this time, each of the breaking surfaces in Figs. 7 (a) and 7 (b) is made up of an m-plane group. The shape of the light emitting diode may also be a rhombic shape having the same length on four sides.

It is possible to prevent the light emitting diode from being broken by the cracks by forming the breaking surface along the specific crystal direction as shown in Fig. 7 (a) or (b).

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the invention.

Claims (20)

A transparent substrate of a hexagonal crystal structure having a first surface, a second surface, and a side surface connecting the first surface and the second surface;
A first conductive semiconductor layer located on a first surface of the transparent substrate;
A second conductive semiconductor layer disposed on the first conductive semiconductor layer;
An active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer;
A first electrode electrically connected to the first conductive semiconductor layer;
A second electrode electrically connected to the second conductivity type semiconductor layer;
A first bump positioned on the first electrode; And
And a second bump located on the second electrode,
Wherein the transparent substrate has a parallelogram shape including two acute angles and two obtuse angles. The method according to claim 1,
Wherein the transparent substrate is a sapphire substrate and has a thickness within a range of 150 mu m to 400 mu m. The method according to claim 1,
Wherein the transparent substrate is a rhombic shape. The method according to claim 1,
And the side surfaces of the transparent substrate are m-plane groups. The light emitting diode of claim 1, wherein the second electrode comprises a reflective layer reflecting light generated in the active layer. The method according to claim 1,
And the first electrode surrounds the second conductive type semiconductor layer. The method of claim 6,
Wherein the first electrode is uniformly spaced from the second conductive type semiconductor layer. The method of claim 6,
The first bump being located near one acute angle,
Wherein the second conductivity type semiconductor layer is located near two obtuse angles and another acute angle,
Wherein the second bump is located near the two obtuse angles and the other acute angle in the upper region of the second conductivity type semiconductor layer. The method of claim 6,
Wherein the second conductivity type semiconductor layer has a diagonal recessed indentation connecting the two acute angles,
Wherein the first electrode penetrates into the depressed portion. The method of claim 6,
The first bump being located near one obtuse angle,
The second conductivity type semiconductor layer is positioned over two acute angles and another obtuse angle,
Wherein the second bump is located in the upper region of the second conductive semiconductor layer over the two acute angles and the other one of the obtuse angles. The method according to claim 1,
And a surface of the first conductivity type semiconductor layer between the second conductivity type semiconductor layer and the first electrode. A transparent substrate of a hexagonal crystal structure having a first surface, a second surface, and a side surface connecting the first surface and the second surface;
A first conductive semiconductor layer located on a first surface of the transparent substrate;
A second conductive semiconductor layer disposed on the first conductive semiconductor layer;
An active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer;
A first electrode electrically connected to the first conductive semiconductor layer;
A second electrode electrically connected to the second conductivity type semiconductor layer;
A first bump positioned on the first electrode;
A second bump positioned on the second electrode; And
And a mount substrate having a circuit pattern on its upper surface,
Wherein the transparent substrate has a parallelogram shape including two acute angles and two obtuse angles,
Wherein the first bump and the second bump are bonded to the circuit pattern. The method of claim 12,
Wherein the transparent substrate has a rhombic shape. The method of claim 12,
And the side surfaces of the transparent substrate are m-plane groups. The method of claim 12,
Wherein the first electrode surrounds the second conductive type semiconductor layer. 16. The method of claim 15,
Wherein the first electrode is uniformly spaced from the second conductive type semiconductor layer. 16. The method of claim 15,
The first bump being located near one acute angle,
Wherein the second conductivity type semiconductor layer is located near two obtuse angles and another acute angle,
Wherein the second bump is located near the two obtuse angles and the other acute angle in the upper region of the second conductivity type semiconductor layer. 18. The method of claim 17,
Wherein the second conductivity type semiconductor layer has a diagonal recessed indentation connecting the two acute angles,
Wherein the first electrode penetrates into the indentation. 16. The method of claim 15,
The first bump being located near one obtuse angle,
The second conductivity type semiconductor layer is positioned over two acute angles and another obtuse angle,
Wherein the second bump is located in the upper region of the second conductivity type semiconductor layer over the two acute angles and the other one of the obtuse angle. The method of claim 12,
Wherein the mount substrate is an AlN substrate.

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