KR20140054598A - Timing controller, driving method thereof, and display device using the same - Google Patents

Abstract

The present invention relates to a display device and, in particular, to a timing controller, a method for driving the timing controller, and a display device using the timing controller, capable of sequentially storing blocks of frames outputted during a predetermined period, without being overlapped, comparing a previously stored block of a previous frame with a current comparison block of a current frame, which are located at the same position, determining a position of a logo, and adjusting luminance of pixels through which the logo is outputted. For this purpose, the timing controller according to the present invention comprises a block memory, a comparison, and a conversion unit. The block memory sequentially stores image data forming blocks of respective frames, which are outputted through a panel for a predetermined period, among image data. The comparison unit compares previously-stored-block image data forming a previously stored block of a previous frame, which is stored in the block memory, with current-comparison-block image data forming a current comparison block, which corresponds to the previously stored block among blocks constituting a current frame, and determines whether a logo is included in the previously stored block. When information indicating that the logo is included is received from the comparison unit, the conversion unit lowers luminance of the previously-stored-block image data and outputs output image data, the luminance of which is lowered. When information indicating that the logo is not included is received from the comparison unit, the conversion unit arranges the previously-stored-block image data and outputs the arranged output image data.

Description

TECHNICAL FIELD [0001] The present invention relates to a timing controller, a driving method thereof, and a display device using the timing controller,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly, to a timing controller capable of improving a residual image problem, a driving method thereof, and a display device using the same.

Flat panel displays (FPDs) are used in various types of electronic products including mobile phones, tablet PCs, and notebook computers. The flat panel display includes a liquid crystal display (LCD), a plasma display panel (PDP), and an organic electroluminescence display (OLED). Recently, an electrophoretic display device EPD: ELECTROPHORETIC DISPLAY) is also widely used.

The organic light emitting diode (OLED) has advantages of high response speed, light emitting efficiency, luminance and viewing angle by using a self-luminous element which emits light by itself.

FIG. 1 is a circuit diagram showing one pixel structure of a general organic light emitting display device, showing a pixel structure composed of two N-type transistors. 2 is a diagram illustrating an example of an image output through a panel of a general organic light emitting display device in which logos 10 and 20 are output to a specific portion of an image.

A pixel 50 of a general organic light emitting display is connected to an organic light emitting diode OLED and a data line DL and a gate line Gn to control the organic light emitting diode OLED, And at least two transistors (T1, T2).

The anode electrode of the organic light emitting diode (OLED) is connected to the first power supply (VDD), and the cathode electrode is connected to the second power supply (VSS). The organic light emitting diode OLED generates light having a predetermined luminance corresponding to the current supplied from the second transistor T2.

The various circuits formed in the pixel 50 control an amount of current supplied to the organic light emitting diode corresponding to a video signal supplied to the data line DL when a scan signal is supplied to the gate line GL. To this end, the pixel 50 includes a second transistor T2 (driving transistor), a second transistor T2, a data line DL, and a gate line Gn (second transistor) connected between the first power supply VDD and the organic light emitting diode And a storage capacitor Cst connected between the gate electrode of the second transistor T2 and the organic light emitting diode OLED.

On the other hand, since the above-described organic light emitting display device uses the self-light emitting organic device (OLED), deterioration can proceed due to various causes. When the deterioration progresses and a deterioration difference occurs between the pixels, a difference in brightness and color is recognized, and a permanent afterimage remains.

For example, as shown in FIG. 2, when a logo or various captions 10 and 20 or the like (hereinafter simply referred to as 'logo') is continuously output in a predetermined area for a long time, The organic element OLED may be deteriorated. In this case, a residual image of the logo may remain in the region even if the logo disappears.

Conventionally, in order to prevent the afterimage due to the logo as described above, a method of comparing the pixel data for every frame to find the position of the logo and then lowering the brightness of the image data corresponding to the position of the logo .

That is, in the conventional method, the pixel data of the current frame and the pixel data of the previous frame are compared, and an area having pixel data equal to or more than a certain frame is determined as a logo area, Thereby preventing the logo area from being deteriorated.

However, since the conventional method as described above requires storing all the pixel data included in one frame, a high-capacity frame memory is required in the timing controller, and accordingly, the unit price of the organic light emitting display device is also increased.

For example, in the case of full-HD (1920x1080 resolution) using WRGB, since the timing controller must compare (1920x1080 x 4 (sub-pixel) x 10bit) pieces of data every frame, A high-capacity and high-cost frame memory capable of storing data must be provided inside the timing controller.

On the other hand, the deterioration due to the logo as described above is seriously generated in the organic light emitting display device, but it can also occur in a display device such as a liquid crystal display device.

SUMMARY OF THE INVENTION The present invention has been proposed in order to solve the above-mentioned problems, and it is an object of the present invention to provide a method and apparatus for sequentially storing blocks of frames output during a predetermined period in a block memory, The present invention provides a timing controller, a driving method thereof, and a display device using the same, which can compare current comparison blocks of a frame to determine the position of the logo, and adjust the brightness of pixels to which the logo is output.

According to an aspect of the present invention, there is provided a timing controller comprising: a block memory for sequentially storing image data forming a block of each of frames output through a panel during a predetermined period of time; The previous storage block image data forming the previous storage block of the previous frame, which is stored in the block memory, is divided into the current comparison block image forming the current comparison block, corresponding to the previous storage block, A comparison unit comparing the previous storage block with a data to compare whether or not the logo is included in the previous storage block; And outputting lower brightness image data when the information indicating that the logo is included is received from the comparison unit, and that the information indicating that the logo is not included is output from the comparison unit And a conversion unit for sorting the previous storage block image data and outputting the sorted output image data.

According to an aspect of the present invention, there is provided a method of driving a timing controller, the method comprising: sequentially storing image data forming a block of frames output through a panel during a predetermined period of time; The previous storage block image data forming the previous storage block of the previous frame, which is stored in the block memory, is divided into the current comparison block image forming the current comparison block, corresponding to the previous storage block, Compared to the data, Comparing whether the previous storage block includes a logo; And if the logo is included as a result of the comparison, the brightness of the previous storage block image data is lowered to output lower brightness output image data, and if the logo is not included in the comparison result, Aligning the image data, and outputting the sorted output image data.

According to an aspect of the present invention, there is provided a display device including: a panel having pixels formed in regions where gate lines and data lines intersect; The timing controller according to any one of claims 1 to 4, A data driver for converting the output video data transmitted from the timing controller into an analog video signal and outputting the analog video signal to the data line; And a gate driver for outputting a scan signal to the gate line in every one horizontal period in which the video signal is output according to a control signal transmitted from the timing controller.

The present invention stores blocks of frames output in a predetermined period in a non-overlapping manner in a block memory, and compares the previous stored blocks of the previous frame and the current comparison block of the current frame, which are located at the same position, By adjusting the brightness of the pixels on which the logo is output, the size of the memory and the cost of manufacturing the memory can be reduced.

Further, the present invention can simplify and reduce the logo detection and comparison process by reducing the capacity of the compared image data for logo detection.

1 is a circuit diagram showing one pixel structure of a general organic light emitting display device.
BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light emitting display.
3 is an exemplary view showing a configuration of a display device using a timing controller according to the present invention.
4 is an exemplary view showing an internal configuration of a timing controller according to the present invention;
5 is an exemplary view showing in detail a configuration of a data arrangement unit of a timing controller according to the present invention;
FIG. 6 is an exemplary diagram illustrating a size of image data stored in a block memory applied to the timing controller according to the present invention; FIG.
7 to 9 are various illustrations for explaining a state in which image data is stored in a block memory applied to the timing controller according to the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a diagram showing an example of a configuration of a display device using a timing controller according to the present invention.

The timing controller 400 according to the present invention may be applied to a liquid crystal display (LCD), but may be applied to an OLED display driven by WRGB data using a color filter. In other words, deterioration due to static images such as logos may occur in a liquid crystal display device, but can be especially generated in an organic light emitting display device. Therefore, the present invention is described below as an example of an organic light emitting display device driven by WRGB data using a color filter.

3, the display device according to the present invention includes a panel 100, a gate driver 200 configured by at least one gate drive IC for driving gate lines of the panel, A data driver 300 including at least one source driver IC for driving lines, and a timing controller 400 for controlling the gate driver IC and the source driver IC.

First, the panel 100 includes subpixels 110 formed in regions where the gate lines and the data lines cross each other. The subpixels 110 may be composed of W subpixels, R subpixels, G subpixels, and B subpixels. The arrangement form of the subpixels may be variously changed. The subpixels 110 may output light of a unique color, but may output white light. In the latter case, the panel 100 may be provided with a color filter for outputting white (W) color, red (R) color, green (G) color and blue (B) color.

Each of the subpixels is connected to the organic light emitting diode OLED, the data line DL and the gate line GL to form the organic light emitting diode OLED, as shown in an enlarged circle 1 in FIG. And at least two transistors (T1, T2) for control.

The anode electrode of the organic light emitting diode OLED is connected to the first power source VDD and the cathode electrode is connected to the second power source VSS. The organic light emitting diode OLED generates light having a predetermined luminance corresponding to the current supplied from the second transistor T2.

The various circuits formed in the sub-pixel 110 control an amount of current supplied to the organic light emitting diode corresponding to a video signal supplied to the data line DL when a scan signal is supplied to the gate line GL. To this end, the sub-pixel 110 includes a second transistor T2 (a driving transistor), a second transistor T2, a data line DL, and a gate line (not shown) connected between the first power source VDD and the organic light- GL and a storage capacitor Cst connected between the gate electrode of the second transistor T2 and the organic light emitting diode OLED.

Next, the timing controller 400 uses the timing signals input from the external system, that is, the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the data enable signal DE, Generates a gate control signal GCS for controlling timing and a data control signal DCS for controlling the operation timings of the source drive ICs and generates output image data to be transmitted to the source drive ICs of the data driver 300 do.

The timing controller 400 according to the present invention compares each frame composed of the image data before converting the image data into the output image data, and outputs the still image such as a logo (Hereinafter simply referred to as " logo "). As a result of the comparison, if there is a still image, the timing controller 400 lowers the luminance of the image data to be output to the pixel from which the logo is output, rearranges the image data according to the characteristics of the panel, And outputs the output image data to the data driver 300.

The detailed configuration and function of the timing controller 400 according to the present invention performing the functions as described above will be described in detail with reference to Figs. 4 to 9. Fig.

Next, each of the gate drive ICs constituting the gate driver 200 supplies a scan signal to the gate lines using gate control signals (GCS) generated in the timing controller 400.

The gate drive IC applied to the present invention can be applied as it is to a conventional flat panel display. Meanwhile, the gate drive IC applied to the present invention may be configured to be independent from the panel 100 and to be electrically connected to the panel in various ways. However, Panel (Gate In Panel: GIP) method.

Lastly, the source driver IC of the data driver 300 converts the output video data transmitted from the timing controller 400 into an analog video signal, and supplies the analog video signal to the gate line every one horizontal period And supplies the video signals of one horizontal line to the data lines.

That is, the source driver IC converts the output image data into the image signal using gamma voltages supplied from a gamma voltage generator (not shown), and outputs the image signal to the data line. To this end, the source driver IC includes a shift register, a latch, a digital-analog converter, and an output buffer.

4 is an exemplary diagram showing the internal configuration of the timing controller according to the present invention.

4, the timing controller 400 according to the present invention includes a receiving unit 410 for receiving a timing signal and the input image data from an external system, And comparing the previous stored block of the previous frame with the current comparison block of the current frame at the same position to determine the position of the logo and adjusting the brightness of the pixels to which the logo is output A control signal generator 420 for generating a gate control signal GCS and a data control signal DCS using the timing signal transmitted from the receiver, And the data control signal output from the control signal generator 420 to the data driver 300 And a transmitter 440 for transmitting the gate control signal output from the control signal generator 420 to the gate driver 200.

The receiving unit 410 receives the input image data and the timing signal from the external system and transmits the input image data to the data sorting unit 420. The timing signal received through the receiving unit 410 may be directly transmitted from the receiving unit 410 to the control signal generating unit 420 but may be transmitted to the control signal generating unit 420 through the data arranging unit 420 ). ≪ / RTI >

The control signal generator 420 controls the timing of the gate driver 200 and the timing of the data driver 300 using the timing signals received from the receiver 410. [ Thereby generating a gate control signal.

The data sorting unit 430 sequentially stores the image data forming the blocks of the frames output through the panel for a preset period of time among the image data, Comparing the previous storage block image data forming the previous storage block of the previous frame with the current comparison block image data forming the current comparison block corresponding to the previous storage block among the blocks constituting the current frame, Comparing the brightness of the previous storage block image data with the brightness of the previous storage block image data and outputting the reduced brightness image data if the logo is included in the storage block; Aligns the previous storage block image data, and outputs the sorted output image data. The specific configuration and function of the data sorting unit 430 will be described in detail with reference to FIG.

5 is an exemplary view showing in detail the configuration of the data sorting unit of the timing controller according to the present invention, and is an example of an internal configuration of the data sorting unit 430 shown in FIG.

The data sorting unit 430 includes a block memory 431 for sequentially storing image data forming blocks of frames output for a predetermined period of time through the panel of the image data, Comparing the previous storage block image data forming the previous storage block of the previous frame with the current comparison block image data forming the current comparison block corresponding to the previous storage block among the blocks constituting the current frame A comparator 432 for determining whether or not the logo is included in the previous storage block, and a controller 432 for lowering the brightness of the previous storage block image data when the information that the logo is included is received, And outputs the reduced output image data. When information indicating that the logo is not included is received from the comparison unit, Chapter block by aligning the image data, a conversion unit 433 for outputting the sorted output image data.

First, the block memory 431 sequentially stores image data forming a block of each of the frames output from the image data through the panel for a preset period of time.

Here, the image data may be input image data input from an external system, or may be data primarily converted in the timing controller.

The positions of the blocks stored in the block memory 431 are not overlapped among the frames output during the predetermined period.

Here, the predetermined period may be one second or more.

That is, although the memory applied to the conventional timing controller stores image data in units of frames, the present invention can store image data in units of one second or more.

The block refers to any one of the blocks obtained by dividing the one frame by the number of frames output during the preset period.

For example, in a display device driven at 120 Hz, assuming that the preset period is 1 second, each of the 120 frames output during the 1 second is divided into 120 blocks. That is, one frame is divided into 120 blocks, and only the video data constituting one of the blocks is stored in the block memory 431.

If the display device is driven at 240 Hz, each of the 240 frames output during the 1 second is divided into 240 blocks, and only one of the 240 blocks is divided into the block memory 431, / RTI >

The comparator 432 compares the previous storage block image data stored in the block memory with the previous storage block image data forming the previous storage block of the previous frame to the previous storage block corresponding to the previous storage block, Compares the current comparison block image data forming the current comparison block with the current comparison block image data to compare whether or not the logo is included in the previous storage block. That is, the comparison unit 432 compares the previous storage block image data with the current storage block image data while the current storage block that does not correspond to the previous storage block among the blocks constituting the current frame is stored in the block memory. And compares the block image data.

The previous frame refers to a frame including image data stored in the block memory.

The previous storage block refers to a block stored in the block memory 431 among the blocks constituting the previous frame.

The previous storage block image data refers to image data forming the previous storage block. The previous storage block image data is substantially stored in the block memory.

The current frame is a frame that is input to the data sorting unit 430 after the previous frame.

The current storage block is a block that is input to the block memory 431 by replacing the previous storage block among the blocks constituting the current frame. The current storage block is formed at a position which does not overlap with the position of the blocks input to the block memory 431 before the previous storage block and the previous storage block during the predetermined period.

The current storage block image data refers to image data forming the current storage block. When the current storage block image data is sequentially output from the block memory 431 and output to the converting unit 433, the current storage block image data is sequentially input to the block memory 431 do.

The current comparison block is a block formed at a position corresponding to a position of the previous storage block among the blocks constituting the current frame. That is, since the current comparison block and the previous storage block are at the same position, if the current comparison block is compared with the previous storage block and the same comparison value is output, it is determined that the logo is displayed on the current comparison block .

The current comparison block image data refers to image data forming the current comparison block. The current comparison block image data and the previous storage block image data are substantially compared.

Finally, when the information that the logo is included is received from the comparator 432, the converting unit 433 lowers the luminance of the previous storage block image data, and outputs the output image data whose luminance is decreased And if the information indicating that the logo is not included is received from the comparison unit, the previous storage block image data is aligned and the aligned output image data is output. The output image data output from the conversion unit 433 may be directly transmitted to the data driver 300. However, after the other components in the timing controller undergo another conversion process, the data driver 300).

FIG. 6 is a view for explaining the size of image data stored in a block memory applied to the timing controller according to the present invention, and FIGS. 7 to 9 are diagrams for explaining image data stored in a block memory applied to the timing controller according to the present invention. Various examples for illustrating the stored state are shown. Hereinafter, the present invention will be described by taking a panel composed of Full-HD (1920 x 1080 (resolution)) driven at 120 Hz and using WRGB as an example. In the following, the present invention will be described by way of example only when the predetermined period is one second.

6 is an exemplary diagram for comparing the size of image data stored in a block memory applied to a timing controller according to the present invention and the size of image data stored in a conventional block memory.

As described above, in the case of a panel configured with Full-HD using WRGB, the number of pixels in the horizontal direction is 1,920, the number of horizontal pixels is 1,080, and the pixels are divided into four subpixels (W subpixel, G subpixel, and B subpixel), and each of the image data constituting the subpixels is composed of 10 bits.

Thus, a conventional block memory that stores an entire frame can store a total of 82,944,000 bits by 1920 (number of horizontal pixels) x 1080 (number of vertical pixels) x 4 (number of subpixels) x 10 (number of bits) It should contain a space.

However, in the present invention, one frame is divided into 120 blocks. That is, when the panel configured by the Full HD as described above is divided into 120 blocks, each of the 120 blocks is composed of 17280 (1920 x 1080/120) pixels as shown in Fig. 6 . Since each of the pixels is composed of 4 subpixels and 10 bits of image data, the one block includes a total of 691,200 (82944000/120) number of bits by 17280 (number of pixels) x 4 x 10.

Accordingly, the block memory 431 according to the present invention may include a space for storing 691,200 bits which is reduced by 1/120 from the conventional memory.

On the other hand, when the image of the quadrangle shown in Fig. 6 represents a panel having a matrix structure of 1920 x 1080, each block memories can be composed of 240 pixels in the horizontal direction and 72 pixels in the vertical direction.

The blocks may be represented as 15H8V starting from 1H1V, as shown in Fig. That is, if one frame is divided into 120 blocks, it is divided into 8 blocks in the horizontal direction and 15 blocks in the vertical direction.

Here, 1H means the first line formed in the horizontal direction, 2H means the second line formed in the horizontal direction, and 15H means the 15th line formed in the horizontal direction. That is, since one frame is divided into 15 blocks in the vertical direction as described above, a total of 15 lines formed in the horizontal direction are formed.

Similarly, 1V means the first line formed in the vertical direction, and 8V means the eighth line formed in the vertical direction. That is, since one frame is divided into eight blocks in the horizontal direction as described above, a total of eight lines are formed in the vertical direction.

Therefore, one frame is composed of 120 blocks in total from the 1H1V block formed in the upper left direction to the 15H8V formed in the diagonal direction of the 1H1V block.

Next, FIG. 7A shows a case where the 1H1V block is stored in the block memory 431 in 1/120 seconds, 1/120 second (which is expressed simply as 2/120 seconds) continuous after the 1/120 second And a 1H2V block is stored in the block memory 431. FIG.

Here, the 1H1V block is a block included in a first frame (1 frame), and the 1H2V block is a block included in a second frame (2 frame).

The first frame is referred to as a previous frame, and the second frame is referred to as a current frame.

The 1H1V block is referred to as a previous storage block, and the image data stored in the previous storage block is referred to as previous storage block image data. The 1H2V block is referred to as a current storage block, and the image data stored in the current storage block is referred to as current storage block image data.

That is, while the previous storage block image data stored in the block memory 431 is sequentially output in 2/120 seconds, the current storage block image data is sequentially input to the block memory and stored.

Next, FIG. 7 (b) shows blocks compared in the comparison unit at 2/120 second.

As described above, while the previous storage block image data stored in the block memory 431 is sequentially output in 2/120 seconds, the current storage block image data are sequentially input to the block memory and stored At the same time, the 1H1V block of the first frame is compared with the 1H1V block of the second frame to determine whether or not a logo is being output to the 1H1V block.

That is, the block stored in the block memory at 2/120 second of the blocks constituting the second frame is a 1H2V block (current storage block), as shown in FIG. 7A. However, the block compared with the 1H1V block (the previous storage block) of the first block at 2/120 second of the blocks constituting the second frame is the same as that shown in FIG. 7 (b) Is a 1H1V block (current comparison block) formed at the same position as the 1H1V block (previous storage block).

Next, FIG. 8A corresponds to the view shown in FIG. 7A. After the previous storage block 1H1V of the first frame is stored in the block memory, 16/120 seconds and And blocks stored in the block memory after 17/120 seconds have elapsed.

That is, after 16/120 seconds, 2H1V blocks (previous storage blocks) of the blocks constituting the 16th frame are stored in the block memory, and after 17/120 seconds, 2H2V blocks Current storage block) is stored in the block memory.

Next, FIG. 8B is a diagram corresponding to the diagram shown in FIG. 7B, showing blocks compared at the comparator 432 at 17/120 second.

That is, the 2H2V block (current storage block) of the 17th frame is stored in the block memory at 12/120 seconds. At this time, the comparator 432 compares the 2H1V block (previous storage block) A 2H1V block (current comparison block) of 17 frames is compared.

Next, next, Fig. 9A corresponds to the figure shown in Fig. 7A, in which the previous storage block 1H1V of the first frame is stored in the block memory and then 120/120 Sec and 121/120 seconds, respectively.

That is, after 120/120 seconds, a 15H8V block (previous storage block) of the blocks constituting the 120th frame is stored in the block memory, and after 121/120 seconds, the 1H1V block Current storage block) is stored in the block memory.

Finally, FIG. 9B is a diagram corresponding to the diagram shown in FIG. 7B, in which blocks compared at the comparator 432 at 121/120 second are shown.

That is, at 121/120 seconds, the 1H1V block (current storage block) of the 121st frame is stored in the block memory. At this time, the comparator 432 compares the 15H8V block (previous storage block) A 15H8V block (current comparison block) of 121 frames is compared.

In other words, conventionally, one image outputted by one frame is compared for 1/120 second, so that a total of 120 images are compared with each other for one second.

However, in the present invention, substantially all the blocks constituting one image are compared after one second has elapsed. In this case, each of the compared blocks is not a block belonging to one frame but a block extracted one by one from the 120 frames.

The reason why the present invention compares one image for one second as described above is that the characteristic of the logo lasts for a long time.

That is, since the logo is output through the panel for a minimum of several minutes to several tens of minutes, it is not necessary to compare such a logo every 1/120 seconds as in the conventional method. Even if the occurrence of the logo is examined over a period of one second as in the present invention, the detection efficiency of the logo and the deterioration prevention function therefor are not greatly different from the conventional ones.

It will be understood by those skilled in the art that the present invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

100: panel 200: gate driver
300: Data driver 400: Timing controller

Claims (10)

A block memory for sequentially storing image data forming a block of each of the frames output from the image data through the panel for a preset period of time;
The previous storage block image data forming the previous storage block of the previous frame, which is stored in the block memory, is divided into the current comparison block image forming the current comparison block, corresponding to the previous storage block, A comparison unit comparing the previous storage block with a data to compare whether or not the logo is included in the previous storage block; And
When the information indicating that the logo is included is received from the comparison unit, the luminance of the previous storage block image data is lowered to output the lowered output image data, and information indicating that the logo is not included And a conversion unit arranged to align the previous storage block image data and to output the aligned output image data when received. The method according to claim 1,
Wherein the positions of the blocks stored in the block memory do not overlap between the frames output during the predetermined period. The method according to claim 1,
Wherein the block memory comprises:
And stores the image data forming one of the blocks obtained by dividing the one frame by the number of frames output during the predetermined period. The method according to claim 1,
Wherein,
And comparing the previous storage block image data with the current comparison block image data while the current storage block not corresponding to the previous storage block among the blocks constituting the current frame is stored in the block memory Timing controller. Sequentially storing image data forming a block of each of the frames output from the image data through the panel for a preset period of time;
The previous storage block image data forming the previous storage block of the previous frame, which is stored in the block memory, is divided into the current comparison block image forming the current comparison block, corresponding to the previous storage block, Compared to the data, Comparing whether the previous storage block includes a logo; And
As a result of the comparison, if the logo is included, the brightness of the previous storage block image data is lowered to output the output image data of reduced brightness. If the logo is not included in the comparison result, And arranging the data, and outputting the sorted output image data. 6. The method of claim 5,
Wherein the sequentially storing comprises:
Selecting one of the blocks for each of the frames so that the positions of the blocks stored in the block memory are not overlapped with each other among the frames output during the preset period of time and storing the image data forming the selected block And a timing controller for driving the timing controller. 6. The method of claim 5,
Wherein the sequentially storing comprises:
And stores image data forming one of the blocks obtained by dividing the one frame by the number of frames output for the predetermined period of one second. 6. The method of claim 5,
Wherein the sequentially storing comprises:
Storing the previous storage block image data forming the previous storage block among the blocks divided by the number of frames outputted during the predetermined period through the panel in the previous frame; And
Wherein the current block is a block that is not overlapped with the blocks stored before the previous storage block and the previous storage block among the blocks divided by the number of frames output during the predetermined period through the panel, Storing the current storage block image data to form a storage block. 9. The method of claim 8,
Wherein the comparing comprises:
Wherein the comparison unit compares the previous storage block image data with the current comparison block image data while the current storage block image data is replaced with the previous storage block image data. A panel in which pixels are formed in an area where the gate line and the data line cross each other;
The timing controller according to any one of claims 1 to 4,
A data driver for converting the output video data transmitted from the timing controller into an analog video signal and outputting the analog video signal to the data line; And
And a gate driver for outputting a scan signal to the gate line in every one horizontal period in which the video signal is output according to a control signal transmitted from the timing controller.

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