KR20130009517A - Liquid crystal display device - Google Patents

Abstract

PURPOSE: A liquid crystal display is provided to remove the influence of a fringe field on the liquid crystal of a second bending region. CONSTITUTION: A pixel electrode includes multiple pixel electrode bars(36a,36b) on a common plate(9). A common electrode(39) is adjacent to the pixel electrode. The width of an outermost pixel electrode bar adjacent to the common electrode is larger than that of the other pixel electrode bar. The second bending angle of a second bending region is larger than that of the first bending angle of the first bending region.

Description

[0001] Liquid crystal display device [0002]

An embodiment relates to a liquid crystal display device.

Display devices for displaying information have been actively developed.

The display device includes a liquid crystal display, an organic light emitting display, a plasma display panel, and a field emission display.

Among them, liquid crystal displays have high resolution, high image quality, high contrast, low power consumption, and full color video.

The liquid crystal display device has a disadvantage of having a narrow viewing angle.

Recently, various methods for improving the viewing angle have been proposed.

However, there is no suggestion for a drastic improvement in the viewing angle.

The embodiment provides a liquid crystal display device having an improved viewing angle.

The embodiment provides a liquid crystal display device capable of preventing a touch trace defect due to a decrease in the restoring force of the liquid crystal.

According to an embodiment, the liquid crystal display device comprises: a common plate; A pixel electrode including a plurality of pixel electrode bars on the common plate; And a common electrode adjacent to the pixel electrode, wherein the outermost pixel electrode bar adjacent to the common electrode has a width at least greater than each width of the remaining pixel electrode bars except for the outermost pixel electrode bar.

According to an embodiment, a liquid crystal display includes: a gate line and a data line defining a plurality of pixel regions; A common plate formed on the same layer as the gate line in the pixel area; A plurality of pixel electrode bars on the common plate; And a common electrode disposed at a boundary of the pixel region, wherein the pixel electrode bar and the common electrode are bent in a first bent region adjacent to a reference line in the middle of the pixel region and a second bent region of the reference line, A first pixel electrode bar of the pixel electrode bars has a width that is at least larger than that of the second pixel electrode bar, and the first pixel electrode bar is a pixel electrode bar adjacent to the common electrode.

According to the embodiment, the second bending angle θ ₂ of the pixel electrode bar and the common electrode bar is larger than the first bending angle θ ₁ so that the liquid crystal positioned in the second bending area is hardly affected by the fringe field. Liquid crystal distortion does not occur. Accordingly, even more improved viewing angles can be secured.

The embodiment may optimize the first bending angle θ ₁ of the pixel electrode bar and the common electrode bar to prevent touch trace defects.

As in the embodiment, the width of the first pixel electrode bar is greater than the width of the second pixel electrode bar, so that the liquid crystal driven by the common electrode and the first pixel electrode bar is between the first pixel electrode bar and the common plate. Since it is hardly affected by the electric field of, the touch trace defect can be prevented.

1 is a plan view illustrating a liquid crystal display according to an embodiment.
FIG. 2 is a cross-sectional view taken along the HH ′, II ′, and JJ ′ lines of FIG. 1.
3 is a diagram illustrating a driving state of a liquid crystal in an edge region of a pixel region.
4 is a diagram illustrating an arrangement of pixel electrodes in first and second bent regions.

In describing an embodiment according to the invention, in the case of being described as being formed "above" or "below" each element, the upper (upper) or lower (lower) Directly contacted or formed such that one or more other components are disposed between the two components. In addition, when expressed as "up (up) or down (down)" may include the meaning of the down direction as well as the up direction based on one component.

1 is a plan view illustrating a liquid crystal display according to an embodiment.

Referring to FIG. 1, a liquid crystal display according to an exemplary embodiment includes a thin film transistor 30, a common plate 9, a pixel electrode 36, pixel electrode bars 36a, 36b, 36c, 36d, and 36e and a common electrode ( 39).

A plurality of gate lines 3 may be disposed along the first direction, and a plurality of data lines 23 may be disposed along the second direction. The first direction may be a horizontal direction, and the second direction may be positioned between 0 ° and 90 ° with respect to the first direction.

The gate line 3 and the data line 23 may be arranged to intersect.

A plurality of pixel areas may be defined by the intersection of the gate line 3 and the data line 23.

The pixel area may be defined along a first direction and defined along a second direction.

The pixel areas may be arranged in a matrix.

The thin film transistor 30, the common plate 9, the pixel electrode 36, the pixel electrode bars 36a, 36b, 36c, 36d, and 36e and the common electrode 39 may be formed in the pixel region. Can be.

The common electrode 39 may be commonly connected between pixel regions. That is, the common electrode 39 may be formed in each pixel area, and the common electrode 39 may be connected by the connection electrode 38. Each common electrode 39 and the connection electrode 38 may be integrally formed. Connection electrodes 38 may be formed to extend from each of the adjacent common electrodes 39.

The common electrode 39 may be electrically connected to the common line 12 through the common contact hole 33.

The thin film transistor 30 may include a gate electrode 6, a semiconductor layer 17, a source electrode 25, and a drain electrode 27.

The gate electrode 6 may extend from the gate line 3. When the semiconductor layer 17 and the source and drain electrodes 27 are formed on the gate line 3, the gate electrode 6 need not be formed.

The gate line 3 and the gate electrode 6 may include a double layer of a conductive pattern 4a and a metal pattern 5a.

The metal pattern 5a may be formed in surface contact with the conductive pattern 4a.

The common plate 9 may be formed on the same layer as the conductive pattern 4a of the gate electrode 6. The common plate 9 may be formed in a plate shape in the pixel area.

In the embodiment, the common plate 9 is formed in a rectangular shape, but is not limited thereto.

The conductive pattern 4a and the common plate 9 may be formed of a transparent conductive material on the same layer.

At least one selected from the group consisting of ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO and GZO may be used as the conductive material.

The common line 12 may be formed in the edge region of the common plate 9.

The common line 12 may be formed in the edge region of the common plate 9 adjacent to the gate line 3 of the adjacent pixel region.

The common line 12 may be formed in parallel with the gate line 3.

The common line 12 may be formed of a metal material on the same layer as the metal pattern 5a of the gate electrode 6.

As the metal material, at least one selected from the group consisting of Cr, Ti, Ni, Al, Pt, Au, W, Cu, and Mo, or an alloy thereof may be used.

The semiconductor layer 17 may be formed on the gate electrode 6.

A source electrode 25 and a drain electrode 27 may be formed on the semiconductor layer 17. The data line 23 may be formed on the same layer as the source electrode 25 and the drain electrode 27.

The source electrode 25 may extend from the data line 23. The drain electrode 27 may be formed to be spaced apart from the source electrode 25.

The thin film transistor 30 may be formed by the gate electrode 6, the semiconductor layer 17, the source electrode 25, and the drain electrode 27.

The pixel electrode 36 may be formed in the pixel region. A plurality of pixel electrode bars 36a, 36b, 36c, 36d, and 36e may extend from the pixel electrode 36. The pixel electrode bars 36a, 36b, 36c, 36d, and 36e may be formed parallel to the data line 23.

The pixel electrode 36 may include first and second horizontal pixel electrodes 37a and 37b. The first and second horizontal pixel electrodes 37a and 37b may be formed parallel to the gate line 3.

The first horizontal pixel electrode 37a may be electrically connected to the drain electrode 27 of the thin film transistor 30 through the drain contact hole 32.

The second horizontal pixel electrode 37b may be disposed to be spaced apart from the first horizontal pixel electrode 37a. The second horizontal pixel electrode 37b may be formed in parallel with the gate line 3 of the adjacent pixel region.

The second horizontal pixel electrode 37b may be formed to overlap the common line 12.

The common line 12 and the horizontal pixel electrode may form a storage capacitor together with, for example, a protective layer and an insulating layer therebetween. The storage capacitor may serve to maintain a data voltage applied to the pixel region for one frame.

The pixel electrode bars 36a, 36b, 36c, 36d, and 36e may be formed between the first and second horizontal pixel electrodes 37a and 37b. That is, the pixel electrode bars 36a, 36b, 36c, 36d, and 36e may be connected to the first and second horizontal pixel electrodes 37a and 37b. A plurality of pixel electrode bars 36a, 36b, 36c, 36d, and 36e may be formed to extend from each of the first and second horizontal pixel electrodes 37a and 37b.

The common electrode 39 may be formed along the edge area of the pixel area. The common electrode 39 may be formed to overlap the data line 23. The common electrode 39 may be formed along the data line 23.

The common electrode 39 may have a phone that is at least larger than the data line 23. Thus, when viewed from above, the data line 23 is not visible by the common electrode 39.

The connection electrode 38 may be formed between the common electrodes 39. The common electrode 39 may be connected by the connection electrode 38. The common electrode 39 may extend to form the connection electrode 38.

The common electrode 39 and the connection electrode 38 may be formed of the same material on the same layer.

The common electrode 39, the connection electrode 38, the pixel electrode 36, and the pixel electrode bars 36a, 36b, 36c, 36d, and 36e may be formed of the same transparent conductive material on the same layer.

At least one selected from the group consisting of ITO, IZO, IZTO, IAZO, IGZO, IGTO, AZO, ATO and GZO may be used as the conductive material.

The pixel electrode bars 36a, 36b, 36c, 36d, and 36e, the lower region is a lower domain region (first domain region), and the upper region is the upper domain centered on a reference line from the middle of the pixel region in the first direction. It may be called a region (second domain region).

Pixel electrode bars 36a, 36b, 36c, 36d and 36e of the first domain region, the common electrode 39 and the data line 23, and pixel electrode bars 36a, 36b, 36c and 36d of the second domain region. 36e, the common electrode 39 and the data line 23 may be symmetrically disposed about the reference line.

In the upper and lower regions adjacent to the reference line, the pixel electrode bars 36a, 36b, 36c, 36d, and 36e, the common electrode 39, and the data line 23 are firstly bent. This is called 1 bending area 41.

The pixel electrode bars 36a, 36b, 36c, 36d, and 36e, the common electrode 39, and the data line 23 may be secondarily bent at the reference line, which is referred to as the second bent region 44. Name it.

When the liquid crystal is oriented in the upper direction, the pixel electrode bars 36a, 36b, 36c, 36d, and 36e of the first domain region, the common electrode 39, and the data line 23 are 90 ° to the alignment direction of the liquid crystal. The pixel electrode bars 36a, 36b, 36c, 36d, and 36e, the common electrode 39, and the data line 23 of the second domain region are disposed to be inclined between 180 ° and 0 ° to 90 ° with respect to the alignment direction of the liquid crystal. It may be arranged to tilt between °.

As shown in FIG. 4, between the alignment direction of the liquid crystal and the pixel electrode bars 36a, 36b, 36c, 36d, and 36e, the common electrode 39, and the data line 23 in the first bent region 41. The angle is referred to as a first bending angle θ ₁ , and the alignment direction of the liquid crystal and the pixel electrode bars 36a, 36b, 36c, 36d, and 36e, the common electrode 39, and the data line in the second bent region 44. The angle between (23) is called 2nd bending angle (theta) ₂ .

The second bending angle θ ₂ may be at least greater than the first bending angle θ ₁ . By forming the second bend angle θ ₂ to be larger, the liquid crystal located in the second bent region 44 is hardly influenced by the fringe field so that liquid crystal distortion does not occur. Accordingly, even more improved viewing angles can be secured.

The first bending angle θ ₁ may have a range of 10 ° to 15 °. Touch trace defects may be prevented by the first bending angle θ _{1 in} this range. The experimental results will be described later.

As shown in FIG. 3, the outermost pixel electrode bars 36a and 36e adjacent to the common electrode 39 among the plurality of pixel electrode bars 36a, 36b, 36c, 36d, and 36e have a width different from that of other pixel electrode bars. This is different.

The outermost pixel electrode bars 36a and 36e may be named as the first pixel electrode, and the other pixel electrode bars 36b, 36c and 36d may be named as the second pixel electrode.

In this case, the first pixel electrode bars 36a and 36e may have a width of 1.7 to 2.3 times the width of each of the second pixel electrode bars 36b, 36c and 36d.

The first pixel electrode bars 36a and 36e may have a width 1.8 times the width of each of the second pixel electrode bars 36b, 36c and 36d.

The first pixel electrode bars 36a and 36e may have a width greater than at least the width of each of the second pixel electrode bars 36b, 36c and 36d.

According to the electric field between the common electrode 39 and the first pixel electrode bars 36a and 36e, on the common electrode 39, on the first pixel electrode bars 36a and 36e, and the common electrode 39. The liquid crystal between the first pixel electrode bars 36a and 36e may be displaced.

Accordingly, the liquid crystal may be driven in the in-plane switching mode in the common electrode 39 and the first pixel electrode bars 36a and 36e.

The first pixel electrode according to an electric field between the first pixel electrode bars 36a and 36e and the common plate 9 and the second pixel electrode bars 36b, 36c and 36d and the common plate 9. On the bars 36a and 36e and on each of the second pixel electrode bars 36b, 36c and 36d, between the first pixel electrode bars 36a and 36e and the common plate 9 and on each of the second pixel electrodes The liquid crystal between the bars 36b, 36c, 36d and the common plate 9 may be displaced.

Thus, an FFS mode (fringe field) is formed between the first pixel electrode bars 36a and 36e and the common plate 9 and between each of the second pixel electrode bars 36b, 36c and 36d and the common plate 9. can be driven in a switching mode.

As in the embodiment, the width of the first pixel electrode bars 36a and 36e, which are the outermost pixel electrode bars, is made larger than the width of the second pixel electrode bars 36b, 36c, and 36d, which are other pixel electrode bars. 39, the liquid crystal between the first pixel electrode bars 36a and 36e and between the common electrode 39 and the first pixel electrode bars 36a and 36e is the first pixel electrode bars 36a and 36e. And are hardly affected by the electric field between the common plate 9. That is, the liquid crystals on the common electrode 39, on the first pixel electrode bars 36a and 36e, and between the common electrode 39 and the first pixel electrode bars 36a and 36e are the common electrodes 39. ) And only the electric field between the first pixel electrode bars 36a and 36e.

Thus, in the embodiment, the liquid crystal driven by the electric field between the common electrode 39 and the outermost pixel electrode bars 36a and 36e affects the electric field between the outermost pixel electrode bars 36a and 36e and the common plate 9. By not receiving the touch trace defect, which has occurred conventionally, can be prevented.

Meanwhile, the first pixel electrode bars 36a and 36e may have a width of 4 μm to 6 μm, and the second pixel electrode bars 36b, 36c and 36d may have a width of 2.2 μm to 2.6 μm. have.

The common electrode 39 may be formed to be larger than the width of the first pixel electrode bars 36a and 36e or the width of each of the second pixel electrode bars 36b, 36c and 36d.

Table 1 shows the first bent angle θ ₁ and the width of the first pixel electrode bar which were variously tested in order to prevent touch trace defects.

Sample Ref. First bending angle θ ₁ Width (μm) of the first pixel electrode bar Bad touch trace Sample 1 7 2.5 o Sample 2 7 4.0 o Sample 3 7 5.5 o Sample 4 10 2.5 o Sample 5 10 4.0 x Sample 6 10 5.5 x Sample 7 15 2.5 x Sample 8 15 4.0 x Sample 9 15 5.5 x

As shown in Table 1, the optimal first bending angle θ ₁ for preventing touch trace defects has a range of 10 ° to 15 °, and the optimal width of the first pixel electrode bars 36a and 36e is It may have a range of 4㎛ 6㎛. In this range of conditions, not only the touch trace failure is prevented, but also the viewing angle can be further enlarged.

FIG. 2 is a cross-sectional view taken along the line H-H ', I-I', and J-J 'of FIG. 1.

Referring to FIG. 2, a gate line 3, a gate electrode 6, a common plate 9, and a common line 12 may be formed on the substrate 1.

The gate line 3 may be formed in a first direction, for example, in a horizontal direction.

The gate electrode 6 may extend from the gate line 3.

The gate line 3 and the gate electrode 6 may include a transparent conductive pattern 4a and a metal pattern 5a.

The metal pattern 5a may be formed in surface contact with the conductive pattern 4a. The conductive pattern 4a may be formed of a transparent conductive material, and the metal pattern 5a may be formed of a metal material.

The common plate 9 may be formed of a transparent conductive material. The common line 12 may be formed of a metal material.

The conductive pattern 4a and the common plate 9 may be formed of the same material on the same layer. The metal pattern 5a and the metal pattern 5a may be formed of the same material on the same layer.

The gate electrode 6, the common plate 9, and the common line 12 may be formed in the pixel area.

The common line 12 may be formed in common in adjacent pixel areas. The common line 12 may be formed in common in pixel areas defined along a first direction.

The common line 12 may be formed in parallel with another gate line 3 adjacent to another gate line 3 of an adjacent pixel region.

The common plate 9 may be formed in all regions in the pixel region.

The gate line 3, the gate electrode 6, the common plate 9, and the common line 12 may be formed using a halftone mask, but are not limited thereto.

After a conductive film made of a conductive material and a metal film made of a metal material are formed on the substrate 1, the gate line 3, the gate electrode 6, the common plate 9, and the Common line 12 may be formed.

For example, a first photosensitive pattern having first and second heights is formed using a halftone mask, and the conductive pattern 4a of the gate line 3 and the gate electrode 6 using the first photosensitive pattern as a mask. And the metal pattern 5a, the common plate 9, and the metal pattern 5a thereon. Thereafter, the first photosensitive pattern having the lower height among the first and second heights is removed by the ashing process, and the first photosensitive pattern having the higher height is reduced to form the second photosensitive pattern having the third play. The metal line 5a on the common plate 9 may be partially removed using the photosensitive pattern as a mask to form a common line 12 in an edge region of the common plate 9.

Alternatively, the gate electrode 6, the common plate 9 and the common line 12 may be formed separately. That is, a conductive film made of a conductive material may be formed on the substrate 1, and the conductive film may be patterned to form the conductive pattern 4a for the gate line 3, the gate electrode 6, and the common plate 9. . Subsequently, a metal film made of a metal material is formed on the conductive pattern 4a and the common plate 9, and the metal film is patterned to be common with the metal pattern 5a for the gate line 3 and the gate electrode 6. Line 12 may be formed.

An insulating layer may be formed on the gate line 3, the gate electrode 6, the common plate 9, the common line 12, and the substrate 1. The insulating layer may be formed of a transparent inorganic insulating material or an organic insulating material. For example, the inorganic insulating material may be SiN _x or SiO _x . For example, the organic insulating material may be BCB (benzocyclobutene).

The semiconductor layer 17 may be formed on the insulating layer corresponding to the gate electrode 6. The semiconductor layer 17 may include an active layer made of silicon and an ohmic contact layer made of silicon including a dopant.

A source electrode 25, a drain electrode 27, and a data line 23 may be formed on the semiconductor layer 17 and the insulating layer.

The source electrode 25 may extend from the data line 23. The data line 23 may be formed along a second direction. The second direction may be a direction located between 0 ° and 90 ° with respect to the first direction.

The data line 23 may cross the gate line 3 to define a pixel area.

The data line 23 may be symmetrically formed in the first domain region and the second domain region divided based on the reference line in the first direction from the middle of the pixel region. The first domain area may be a pixel area below the reference line, and the second domain area may be a pixel area above the reference property.

The data line 23 of the first domain region and the data line of the second domain region may be formed to be inclined symmetrically with each other.

The thin film transistor 30 may be formed by the gate electrode 6, the semiconductor layer 17, the source electrode 25, and the drain electrode 27.

A passivation layer may be formed on the source electrode 25, the drain electrode 27, the data line 23, and the insulating layer.

The passivation layer may be formed of an organic insulating material such as BCB.

The passivation layer may include a drain contact hole 32 formed through the passivation layer so that the drain electrode 27 is exposed.

The pixel electrode 36 and the common electrode 39 may be formed on the passivation layer.

The pixel electrode 36 and the common electrode 39 may be formed of a transparent conductive material.

The common electrode 39 may be formed on the passivation layer to overlap the data line 23. That is, the common electrode 39 may be formed along the data line 23.

The common electrode 39 may be electrically connected to the common line 12 through the common contact hole 33.

The common electrode 39 may be connected by the connection electrode 38. The connection electrode 38 may extend from an adjacent common electrode 39.

The pixel electrode 36 may include first and second horizontal pixel electrodes 37a and 37b and a plurality of pixel electrode bars 36a, 36b, 36c, 36d, and 36e. The pixel electrode 36 may be formed in the pixel area.

The pixel electrode 36 may be disposed between adjacent common electrodes 39.

That is, the pixel electrode 36 of the first pixel region may be disposed between the first common electrode 39 of the first pixel region and the second common electrode 39 of the second pixel region.

The first horizontal pixel electrode 37a may be electrically connected to the drain electrode 27 through the drain contact hole 32.

The second horizontal pixel electrode 37b may be formed to be spaced apart from the first horizontal pixel electrode 37a.

The second horizontal pixel electrode 37b may be formed adjacent to another gate line 3 of an adjacent pixel area.

The second horizontal pixel electrode 37b may be formed to overlap the common line 12. The second horizontal pixel electrode 37b may be formed along the common line 12.

Each of the pixel electrode bars 36a, 36b, 36c, 36d, and 36e may extend from the first and second horizontal pixel electrodes 37a and 37b.

Each of the pixel electrode bars 36a, 36b, 36c, 36d, and 36e may be formed between the first and second horizontal pixel electrodes 37a and 37b.

The first and second horizontal pixel electrodes 37a and 37b are formed in parallel with the gate line 3, and the pixel electrode bars 36a, 36b, 36c, 36d and 36e are connected to the data line 23. It can be formed in parallel.

The common electrode 39 and the pixel electrode bars 36a, 36b, 36c, 36d, and 36e may have the same shape as the gate line 3.

That is, the common electrode 39 and the pixel electrode bars 36a, 36b, 36c, 36d, and 36e are first bent in the first bent region 41 adjacent to the reference line defined in the middle of the pixel region. It may be second bent in the second bent region 44 of the reference line.

The common electrode 39 and the pixel electrode bars 36a, 36b, 36c, 36d, and 36e may be formed to be symmetrically inclined to each other in the first domain region and the second domain region defined in the pixel region.

As shown in FIG. 4, the pixel electrode bars 36a, 36b, 36c, at the first bending angle θ ₁ in the first bending region 41 of the pixel electrode bars 36a, 36b, 36c, 36d, and 36e. 36d and 36e are formed to be inclined, and the pixel electrode bars 36a and 36b are formed at the second bending angle θ ₂ in the second bent region 44 of the pixel electrode bars 36a, 36b, 36c, 36d and 36e. 36c, 36d, and 36e may be inclined.

The second bending angle θ ₂ may be greater than the first bending angle θ ₁ . By forming the second bend angle θ ₂ to be larger, the liquid crystal located in the second bent region 44 is hardly influenced by the fringe field so that liquid crystal distortion does not occur. Accordingly, even more improved viewing angles can be secured.

In addition, the first bending angle θ ₁ may have a range of 10 ° to 15 °. Touch trace defects may be prevented by the first bending angle θ _{1 in} this range.

Although the pixel electrode bars 36a, 36b, 36c, 36d, and 36e are illustrated in FIG. 4, the common electrode 39 may also be formed in the same shape as the pixel electrode bars 36a, 36b, 36c, 36d, and 36e. .

The first bending angle θ _{1 means an} angle between the alignment direction of the liquid crystal in the first bending region 41 and the pixel electrode bars 36a, 36b, 36c, 36d, and 36e and the common electrode 39. The second bending angle θ _{2 means an} angle between the alignment direction of the liquid crystal in the second bending region 44 and the pixel electrode bars 36a, 36b, 36c, 36d, and 36e and the common electrode 39. can do.

The widths of the plurality of pixel electrode bars 36a, 36b, 36c, 36d, and 36e may be different. That is, among the plurality of pixel electrode bars 36a, 36b, 36c, 36d, and 36e, the outermost pixel electrode bars 36a and 36e may be outermost pixel electrode bars.

The outermost pixel electrode bars 36a and 36e may be formed larger than the widths of the remaining pixel electrode bars 36b, 36c and 36d.

The outermost pixel electrode bars 36a and 36e are referred to as first pixel electrodes, and the remaining pixel electrode bars 36b, 36c and 36d are referred to as second pixel electrode bars.

As shown in FIG. 3, the width of the first pixel electrode bars 36a and 36e as the outermost pixel electrode bars is d1, and the width of the second pixel electrode bars 36b, 36c and 36d as the remaining pixel electrode bars is d2. It is called.

In this case, the width d1 of the first pixel electrode bars 36a and 36e may have a range of 1.7 times to 2.3 times the width d2 of each of the second pixel electrode bars 36b, 36c, and 36d. have.

The width d1 of the first pixel electrode bars 36a and 36e may have 1.8 times the width d2 of the second pixel electrode bars 36b, 36c and 36d.

The width d1 of the first pixel electrode bars 36a and 36e may be at least greater than the width d2 of the second pixel electrode bars 36b, 36c and 36d.

As in the embodiment, the width of the first pixel electrode bars 36a and 36e is larger than the width of the second pixel electrode bars 36b, 36c and 36d, thereby forming the common electrode 39 and the first pixel electrode bar. The liquid crystal driven by (36a, 36e) is hardly affected by the electric field between the first pixel electrode bars (36a, 36e) and the common plate (9), thereby preventing touch trace defects that have occurred conventionally. Can be.

1: substrate 3: gate line
4a: conductive pattern 5a: metal pattern
6: gate electrode 9: common plate
12: common line 17: semiconductor layer
23: data line 25: source electrode
27 drain electrode 30 thin film transistor
32: drain contact hole 33: common contact hole
36: pixel electrode 36a, 36b, 36c, 36d, 36e: pixel electrode bar
37a, 37b: horizontal pixel electrode 38: connection electrode
39: common electrode 41, 44: bending area

Claims (17)

Common plate;
A pixel electrode including a plurality of pixel electrode bars on the common plate; And
A common electrode adjacent to the pixel electrode;
The outermost pixel electrode bar adjacent to the common electrode has a width that is at least greater than each width of the remaining pixel electrode bars except for the outermost pixel electrode bar. The method of claim 1,
Further comprising a gate line and a data line defining a plurality of pixel regions,
And the common electrode overlapping the data line. The method of claim 2,
The outermost pixel electrode bar has a width of 1.7 to 2.3 times the width of each of the remaining pixel electrode bars. The method of claim 2,
And wherein the outermost pixel electrode bars have 1.8 times the width of each of the remaining pixel electrode bars. The method of claim 3,
The outermost pixel electrode bar has a width of 4 μm to 6 μm. The method of claim 2,
And a common line in surface contact with the common plate and connected to the common electrode. The method according to claim 6,
The gate line includes a conductive pattern and a metal pattern. The method of claim 7, wherein
And the common plate is formed on the same layer as the conductive pattern. The method according to claim 1 or 3,
And the pixel electrode bar and the common electrode are bent in a first bent region adjacent to a reference line in the middle of the pixel region and in a second bent region of the reference line. 10. The method of claim 9,
And the pixel electrode bar and the common electrode are symmetrically inclined with respect to each other in the first domain area and the second domain area of the pixel area separated by the reference line. The method of claim 10,
An angle between the liquid crystal alignment direction and each of the pixel electrode bar and the common electrode in the first bending region is defined as a first bending angle θ ₁ ,
An angle between the liquid crystal alignment direction and each of the pixel electrode bar and the common electrode in the second bending region is defined as a second bending angle θ ₂ ,
The second bending angle θ ₂ is greater than the first bending angle θ ₁ . The method of claim 11,
The first bending angle θ ₁ has a range of 10 ° to 15 °. A gate line and a data line defining a plurality of pixel regions;
A common plate formed on the same layer as the gate line in the pixel area;
A plurality of pixel electrode bars on the common plate; And
A common electrode disposed at a boundary of the pixel region,
The pixel electrode bar and the common electrode are bent in a first bent region adjacent to a reference line in the middle of the pixel region and in a second bent region of the reference line;
The first pixel electrode bar of the pixel electrode bar has a width at least greater than that of the second pixel electrode bar,
The first pixel electrode bar is a pixel electrode bar adjacent to the common electrode. The method of claim 13,
The first pixel electrode bar has a width of 1.7 to 2.3 times the width of each of the first pixel electrode bars. The method of claim 13,
The first pixel electrode bar has a width of 4 μm to 6 μm. The method according to claim 13 or 14,
The second bending angle θ ₂ in the second bending area is greater than the first bending angle θ ₁ in the first bending area,
And the first bending angle θ ₁ and the second bending angle θ ₂ are angles between the alignment direction of the liquid crystal and each of the pixel electrode bar and the common electrode. 17. The method of claim 16,
The first bending angle θ ₁ has a range of 10 ° to 15 °.

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