KR20120139128A

KR20120139128A - Light emitting device, method for fabricating the same, and light emitting device package

Info

Publication number: KR20120139128A
Application number: KR1020110058734A
Authority: KR
Inventors: 임우식; 송준오; 김명수; 주현승
Original assignee: 엘지이노텍 주식회사
Priority date: 2011-06-16
Filing date: 2011-06-16
Publication date: 2012-12-27

Abstract

The light emitting device according to the embodiment includes a first conductive semiconductor layer; A second conductive semiconductor layer; An active layer between the first conductive semiconductor layer and the second conductive semiconductor layer; An electrode layer on the second conductive semiconductor layer; A first electrode pad on the first region of the first conductive semiconductor layer; A second electrode pad on the electrode layer; And an auxiliary electrode formed on an upper edge of the first conductive semiconductor layer, a portion of which is spaced apart from the first electrode pad on the first region of the first conductive semiconductor layer.

Description

LIGHT EMITTING DEVICE, METHOD FOR FABRICATING THE SAME, AND LIGHT EMITTING DEVICE PACKAGE}

Embodiments relate to a light emitting device, a light emitting device manufacturing method, and a light emitting device package.

A light emitting diode (LED) is a light emitting element that converts current into light. Recently, light emitting diodes have been increasingly used as a light source for displays, a light source for automobiles, and a light source for illumination because the luminance gradually increases.

In recent years, high output light emitting chips capable of realizing full color by generating short wavelength light such as blue or green have been developed. By applying a phosphor that absorbs a part of the light output from the light emitting chip and outputs a wavelength different from the wavelength of the light, the light emitting diodes of various colors can be combined and a light emitting diode emitting white light can be realized Do.

The embodiment provides a light emitting device having an auxiliary electrode on a first conductive semiconductor layer and a light emitting device package having the same.

Embodiments provide a light emitting device capable of effectively inducing a current flowing through a first conductive semiconductor layer by forming an auxiliary electrode adjacent to the first electrode pad and having a predetermined length on the first conductive semiconductor layer, and emitting light having the same. Provide a device package.

The light emitting device package according to the embodiment includes the above light emitting device; A body having a cavity; A plurality of lead electrodes disposed in the cavity and connected to the light emitting elements; And a molding member in the cavity.

In one embodiment, a method of manufacturing a light emitting device includes: forming a first conductive semiconductor layer on a substrate; Forming an active layer on the first conductive semiconductor layer; Forming a second conductive semiconductor layer on the active layer; Forming an electrode layer on the second conductive semiconductor layer; Exposing a first region and an edge region of the first conductive semiconductor layer; Forming a first electrode pad and a second electrode pad on the electrode layer in a first region of the first conductive semiconductor layer; And forming an auxiliary electrode spaced apart from the first electrode pad, along the first region and the edge region of the first conductive semiconductor layer.

The embodiment can reduce the forward voltage of the light emitting device.

The embodiment forms a loop shape around the upper surface of the first conductive semiconductor layer, thereby spreading current to all regions of the first conductive semiconductor layer, thereby improving internal quantum efficiency.

Embodiments can improve the reliability of the light emitting device and the light emitting device package having the same.

1 is a perspective view of a light emitting device according to a first embodiment.
2 is a plan view of the light emitting device of FIG.
3 is a cross-sectional view taken along the AA side of the light emitting device of FIG. 1.
4 to 8 are views illustrating a manufacturing process of the light emitting device of FIG. 1.
9 is a side sectional view showing a light emitting device according to the second embodiment.
10 is a side sectional view showing a light emitting device according to the third embodiment.
11 is a diagram illustrating another example of the auxiliary electrode of the light emitting device of FIG. 1.
12 is a diagram illustrating still another example of the auxiliary electrode of the light emitting device of FIG. 1.
FIG. 13 is a diagram illustrating still another example of the auxiliary electrode of the light emitting device of FIG. 1.
14 is a diagram illustrating still another example of the auxiliary electrode of the light emitting device of FIG. 1.
15 is a diagram illustrating forward voltage characteristics of an embodiment and a comparative example.
16 is a view showing a light emitting device package having a light emitting device of the embodiment.
17 is a diagram illustrating a display device according to an exemplary embodiment.
18 is a diagram illustrating another example of a display device according to an exemplary embodiment.
19 is a view showing a lighting apparatus according to an embodiment.

Hereinafter, a light emitting device according to an embodiment and a method of manufacturing the same will be described in detail with reference to the accompanying drawings. In the description of the embodiments, it is to be understood that each layer (film), region, pattern or structure may be formed "on" or "under" a substrate, each layer The terms " on "and " under " include both being formed" directly "or" indirectly " Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings. The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. In addition, the size of each component does not necessarily reflect the actual size.

1 is a cross-sectional view of a light emitting device according to the first embodiment.

Referring to FIG. 1, the light emitting device 100 may include a substrate 111, a buffer layer 113, a first conductive semiconductor layer 115, an active layer 117, a second conductive semiconductor layer 119, and an electrode layer 131. ), A first electrode pad 141, an auxiliary electrode 145, and a second electrode pad 151.

The substrate 111 may be a light transmissive, insulating or conductive substrate, for example, sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, Ga ₂ O ₃ , At least one of LiGaO ₃ may be used. A plurality of protrusions may be formed on an upper surface of the substrate 111, and the plurality of protrusions may be formed by etching the substrate 111 or may be formed of a light extraction structure such as a separate roughness. The protrusion may include a stripe shape, a hemispherical shape, or a dome shape. The thickness of the substrate 111 may be formed in the range of 30㎛ ~ 300㎛, but is not limited thereto.

A buffer layer 113 is formed on the substrate 111, and the buffer layer 113 may be formed of at least one layer using group 2 to group 6 compound semiconductors. The buffer layer 113 comprises a semiconductor layer using a group III -V compound semiconductor, for _{example, In x Al y Ga 1 -x-} y N (0≤x≤1, 0≤y≤1, 0≤x A semiconductor having a compositional formula of + y ≦ 1) includes at least one of compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, and the like. The buffer layer 113 may be formed in a super lattice structure by alternately arranging different semiconductor layers.

The buffer layer 113 may be formed to alleviate the difference in lattice constant between the substrate 111 and the nitride-based semiconductor layer, and may be defined as a defect control layer. The buffer layer 113 may have a value between lattice constants between the substrate 111 and the nitride-based semiconductor layer. The buffer layer 113 may be formed of an oxide such as a ZnO layer, but is not limited thereto. The buffer layer 113 may be formed in the range of 30 to 500 nm, but is not limited thereto.

A low conductive layer is formed on the buffer layer 113, and the low conductive layer is an undoped semiconductor layer, and has a lower conductivity than that of the first conductive semiconductor layer. The low conductive layer may be implemented as a GaN-based semiconductor using a group III-V compound semiconductor, and the undoped semiconductor layer may have a first conductivity type even without intentionally doping a conductive dopant. The undoped semiconductor layer may not be formed, but is not limited thereto.

The first conductive semiconductor layer 115 may be formed on the buffer layer 113. The first conductive semiconductor layer 115 is implemented as a Group III-V compound semiconductor doped with a first conductive dopant, for example, In _x Al _y Ga _1- _x- _y N (0 _≦ _x _≦ 1, 0 Y? 1, 0? X + y? 1). When the first conductive semiconductor layer 115 is an N-type semiconductor layer, the first conductive dopant is an N-type dopant and includes Si, Ge, Sn, Se, and Te.

A semiconductor layer may be formed between the buffer layer and the first conductive semiconductor layer 115, and the semiconductor layer may have a superlattice structure in which different first and second layers are alternately arranged. The thickness of the first layer and the second layer may be formed to a number A or more.

A first conductive clad layer (not shown) may be formed between the first conductive semiconductor layer 115 and the active layer 117. The first conductive clad layer may be formed of a GaN-based semiconductor, and the band gap may be formed to be greater than or equal to the band gap of the barrier layer of the active layer 117. The first conductive clad layer serves to constrain the carrier.

An active layer 117 is formed on the first conductive semiconductor layer 115. The active layer 117 may be formed of at least one of a single quantum well, a multiple quantum well (MQW), a quantum line, and a quantum dot structure. In the active layer 117, a well layer / barrier layer is alternately arranged, and the period of the well layer / barrier layer is 2 using a stacked structure of InGaN / GaN, AlGaN / GaN, InGaN / AlGaN, InGaN / InGaN. It may be formed in ~ 30 cycles.

A second conductive cladding layer is formed on the active layer 117, and the second conductive cladding layer has a higher band gap than the band gap of the barrier layer of the active layer 117, and is a group III-V compound semiconductor. For example, it may be formed of a GaN-based semiconductor.

A second conductive semiconductor layer 119 is formed on the second conductive cladding layer, and the second conductive semiconductor layer 119 includes a second conductive dopant. The second conductive semiconductor layer 119 may be formed of any one of compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, and the like. When the second conductive semiconductor layer 119 is a P-type semiconductor layer, the second conductive dopant may include Mg, Zn, Ca, Sr, and Ba as a P-type dopant.

In the light emitting structure 120, the conductive type of the first conductive type and the second conductive type may be formed to be opposite to the above structure. For example, the second conductive type semiconductor layer 119 may be an N type semiconductor layer, The first conductive semiconductor layer 115 may be implemented as a P-type semiconductor layer. In addition, an N-type semiconductor layer, which is a third conductive semiconductor layer having a polarity opposite to that of the second conductive type, may be further formed on the second conductive semiconductor layer 119. The light emitting device 100 may define the first conductive semiconductor layer 115, the active layer 117, and the second conductive semiconductor layer 119 as a light emitting structure 120. May be implemented as any one of an NP junction structure, a PN junction structure, an NPN junction structure, and a PNP junction structure. The N-P and P-N junctions have an active layer disposed between the two layers, and the N-P-N junction or P-N-P junction includes at least one active layer between the three layers.

A first electrode pad 141 is formed on the first conductive semiconductor layer 115, and an electrode layer 131 and a second electrode pad 151 are formed on the second conductive semiconductor layer 119.

The electrode layer 131 is a current spreading layer and may be formed of a material having transparency and electrical conductivity. The electrode layer 131 may be formed at a refractive index lower than that of the compound semiconductor layer.

The electrode layer 131 is formed on an upper surface of the second conductive semiconductor layer 119, and the material may be indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), or indium aluminum zinc oxide (IGZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), ZnO, IrOx, RuOx, NiO, etc. It may be selected from, and may be formed of at least one layer. As another example, the electrode layer 131 may be formed of a reflective electrode layer, and the material may be selectively formed from a metal material such as, for example, Al, Ag, Pd, Rh, Pt, and Ir.

The first electrode pad 141 and the second electrode pad 151 may be formed of Ti, Ru, Rh, Ir, Mg, Zn, Al, In, Ta, Pd, Co, Ni, Si, Ge, Ag, and Au. May be selected from among these optional alloys.

An insulating layer may be further formed on the surface of the light emitting device 100, and the insulating layer may prevent an interlayer short of the light emitting structure 120 and prevent moisture penetration.

The second electrode pad 151 may be formed on the second conductive semiconductor layer 119 and / or the electrode layer 131, and may include a second electrode pattern 153.

The second electrode pattern 153 may have an arm structure or a finger structure branched from the second electrode pad 151. The second electrode pad 151 may include metal layers having characteristics of ohmic contact, an adhesive layer, and a bonding layer, and may be made of non-transmissive material, but is not limited thereto.

When viewed from the top of the light emitting chip, the second electrode pad 151 is spaced apart from the width of one side of the first electrode pad 141 by one side of the light emitting chip, and the second electrode pattern 153 is the electrode layer. The light emitting chip may have a length greater than or equal to 1/2 of the width of one side of the light emitting chip.

A portion of at least one of the second electrode pad 151 and the second electrode pattern 153 may be in ohmic contact with an upper surface of the second conductive semiconductor layer 119, but is not limited thereto.

The first electrode pad 141 is formed in a first region A1 of an upper surface of the first conductive semiconductor layer 115, and the first region A1 is formed in the first conductive semiconductor layer 115. A portion of the second conductive semiconductor layer 119 and a portion of the active layer 117 is etched and a portion of the upper surface of the first conductive semiconductor layer 115 is exposed. Here, an upper surface of the first conductive semiconductor layer 115 is a stepped area from the side surface of the active layer 117, and is formed at a position lower than the lower surface of the active layer 117.

Grooves 125 are formed in the light emitting structure 120, and the grooves 125 are formed to have a depth at which the first conductive semiconductor layer 115 is exposed from an upper surface of the light emitting structure 120. Depths of the first region A1 and the groove 125 of the first conductive semiconductor layer 115 may be the same depth or different depths from the top surface of the light emitting structure 120. The groove 125 may not be formed.

As illustrated in FIG. 2, a first electrode pattern 143 may be connected to the first electrode pad 141, and at least one of the first electrode patterns 143 is connected to the first electrode pad 141. When viewed from above the light emitting chip, the light emitting chip may be disposed on one side of the second electrode pattern 153 or an area between the second electrode pattern 153.

The first electrode pattern 143 is disposed in the groove 125 of the light emitting structure 120 and is in contact with the top surface of the first conductive semiconductor layer 115.

The first electrode pattern 143 extends closer to the second electrode pad 151 from the first electrode pad 141, and the second electrode pattern 153 extends from the second electrode pad 151. It may extend closer to the first electrode pad 141.

An auxiliary electrode 145 is disposed on one side of the first electrode pad 141, and the auxiliary electrode 145 is formed along an edge area A2 on an upper surface of the first conductive semiconductor layer 115. Can be. The auxiliary electrode 145 may be formed in a closed loop shape along an outer circumference of an upper surface of the first conductive semiconductor layer 115. Here, the surface on which the first electrode pad 141, the first electrode pattern 143, and the auxiliary electrode 145 are formed is a Ga-face surface of the first conductive semiconductor layer 115, that is, the substrate 111. When the first region A1 of the light emitting structure 120 is etched toward (), it may be a surface facing in the direction of the substrate 111, and may be disposed on the same horizontal surface. As another example, the surface on which the auxiliary electrode 145 is formed may be disposed on a surface different from the first electrode pad 141 or on a conductive layer of a first conductive type, which is not limited thereto.

The auxiliary electrode 145 is physically spaced apart from a side surface of the first electrode pad 141 and is in ohmic contact with an upper surface of the first conductive semiconductor layer 115.

The auxiliary electrode 145 may be formed closer to the side surface of the first conductive semiconductor layer 115 than the first electrode pad 141. For example, the auxiliary electrode 145 may have a side surface of the first conductive semiconductor layer 115. May be disposed on the same plane.

The second region A2 may be formed to have the same depth from the upper surface of the light emitting structure 120 as compared with the first region A1, or may have a different depth, that is, a deeper or lower depth.

The auxiliary electrode 145 may be formed to have a length of 1/2 or more of the length of at least one side surface of the first conductive semiconductor layer 115. The length of the auxiliary electrode 145 disposed along one side of the light emitting device may be formed to be 1/2 or more of the width of one side of the light emitting device. The width of one side of the light emitting device may be the width of one side of each chip size T1.

A part of the auxiliary electrode 145 may be disposed adjacent to the first electrode pad 141 in the first region A1 of the first conductive semiconductor layer 115. The width W1 of the auxiliary electrode 145 may be formed to be smaller than the width W2 of the first electrode pad 141. For example, the width W1 of the auxiliary electrode 145 may be 30 to 50 μm.

The auxiliary electrode 145 may include an electrically conductive material, for example, a metal material, and may be formed of the same material as the first electrode pad 141. The auxiliary electrode 145 may be a metal including at least one of Cr, Al, Ti, In, Zn, Sn, Ru, Hf, V, and an optional alloy thereof, or may be oxynitrides of the metals. The auxiliary electrode 145 may be formed as a single layer or a multilayer, but is not limited thereto. The electrical conductivity of the auxiliary electrode 145 has a higher conductivity than that of the first conductive semiconductor layer 115.

As shown in FIG. 3, the distance D1 between the auxiliary electrode 145 and the first electrode pad 141 may be spaced within 5 μm.

The auxiliary electrode 145 may be formed to have the same thickness as that of the first electrode pad 141, or may be formed to a lower thickness, and may protrude up to an upper surface or more of the active layer 117.

The auxiliary electrode 145 may be formed along the upper circumference of the first conductive semiconductor layer 115 to enhance adhesion to the semiconductor layer. Accordingly, cracks may be prevented from advancing into the active layer during the chip scribing process.

Power is supplied to the first electrode pad 141 and the second electrode pad 151, and the auxiliary electrode 145 is supplied to the first electrode pad 141 and the second electrode pad 151. The power may be induced to diffuse along the circumference of the first conductive semiconductor layer 115. Accordingly, the auxiliary electrode 145 may induce and diffuse the current flowing through the first conductive semiconductor layer 115, thereby preventing the forward voltage from increasing.

4 to 8 are views illustrating a manufacturing process of the light emitting device of FIG. 1.

Referring to FIG. 4, a substrate 111 is loaded onto growth equipment, and compound semiconductor layers 113 to 119 are grown on the substrate 111.

The plurality of compound semiconductor layers 113 to 119 may be formed by a conventional method such as an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporator sputtering sputtering, metal organic chemical vapor deposition (MOCVD), and the like.

A light extraction structure such as a protrusion may be formed on the upper surface of the substrate 111, but is not limited thereto.

The plurality of compound semiconductor layers 113 to 119 include a buffer layer 113 and a light emitting structure 120, and the light emitting structure 120 includes a first conductive semiconductor layer 115, an active layer 117, and a second layer. And a conductive semiconductor layer 119.

The buffer layer 113, the first conductivity type semiconductor layer 115, the active layer 117, and the second conductivity type semiconductor layer 119 may be sequentially stacked on the substrate 111. It is not limited to the layers.

The light emitting structure 120 may be formed of a group 3 to 5 compound semiconductor, for example, AlInGaN, GaAs, GaAsP, or GaP-based compound semiconductor material, and may be formed from the first and second conductive semiconductor layers 115 and 119. The provided electrons and holes may be recombined in the active layer 117 to generate light.

The buffer layer 113 is a layer formed to mitigate the lattice constant difference and thermal expansion coefficient difference between the substrate 111 and the light emitting structure 120, and the lattice constant or / and thermal expansion of the buffer layer 113. The coefficient may have a value between the lattice constant and / or the coefficient of thermal expansion of the substrate 111 and the light emitting structure 120. The buffer layer 113 may be formed from a compound semiconductor material, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, or the like, and may be formed as a single layer or a multilayer. have.

The first conductive semiconductor layer 115 is a compound semiconductor of a Group III-V element doped with a first conductive dopant, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP , GaAs, GaAsP, AlGaInP and the like. When the first conductive semiconductor layer 115 is an N-type semiconductor layer, the first conductive dopant may include n-type dopants such as Si, Ge, Sn, Se, and Te. In addition, the first conductivity type semiconductor layer 115 may be formed as a single layer or a multilayer.

The active layer 117 may be formed on the first conductive semiconductor layer 115. At this time, the active layer 117 may be formed on the first conductive type semiconductor layer 115 such that the upper surface of the first conductive type semiconductor layer 115 is partially exposed. For example, the structure may be formed by forming the light emitting structure 120 and then performing mesa etching on the light emitting structure 120, but the present invention is not limited thereto.

Electrons injected through the first conductive type semiconductor layer 115 and holes injected through the second conductive type semiconductor layer 119 meet with each other to form an active band 117, Which emits light having a wavelength range of < RTI ID = 0.0 > The wavelength band can selectively emit light from ultraviolet to visible light.

The active layer 117 may include any one of a single quantum well structure, a multiple quantum well structure (MQW), a quantum dot structure, or a quantum wire structure. The active layer 117 may be formed by alternately laminating a well layer and a barrier layer using a compound semiconductor material of Group III-V elements. For example, the active layer 117 may be formed by alternately laminating an InGaN well layer and a GaN barrier layer, or alternately stacking an InGaN well layer and an AlGaN barrier layer. In addition, a conductive clad layer may be formed on or under the active layer 117, and the conductive clad layer may be formed of an AlGaN-based semiconductor, and may have a higher band gap than that of the barrier layer. It may be formed of a material having a band gap.

The second conductive semiconductor layer 119 may be formed on the active layer 117. The second conductive semiconductor layer 119 may be formed of a compound semiconductor of a group III-V element doped with a second conductive dopant such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and the like. When the second conductive semiconductor layer 119 is a p-type semiconductor layer, the second conductive dopant may include a p-type dopant such as Mg, Zn, or the like. In addition, the second conductive semiconductor layer 119 may be formed as a single layer or a multilayer.

Referring to FIG. 5, an electrode layer 131 is formed on the second conductive semiconductor layer 119, and the electrode layer 131 is a material having transparency and electrical conductivity, and the second conductive semiconductor layer 119. It may be in ohmic contact with the top surface. The electrode layer 131 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide ), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IrOx, RuOx, RuOx / ITO, Ni, Ag, Ni / IrOx / Au or Ni / IrOx / And may have a single layer or a multi-layer structure.

The electrode layer 131 may have a smaller area than the top surface of the second conductive semiconductor layer 119, but the present invention is not limited thereto.

The electrode layers 131 may be respectively disposed within the regions of the individual chip sizes T1 and may be formed before or after the mesa etching, but the present invention is not limited thereto.

Referring to FIG. 6, etching is performed to a depth at which the first conductive semiconductor layer 115 is exposed from an upper surface of the light emitting structure 120. The etching method includes dry etching and / or wet etching, and may be defined as mesa etching.

6 and 7, the upper surface of the first conductive semiconductor layer 115 exposes a first region A1 and an upper circumferential region A2 of the first conductive semiconductor layer 115. The first region A1 is a region for the first electrode pad, and the second region A2 is a channel region separated by individual chip units and spaces the light emitting structures from each other.

The groove 125 is formed in the light emitting structure 120. The groove 125 is formed to be connected to the first region A1 to a depth at which the first conductive semiconductor layer 115 is exposed and may be formed in a center region or a plurality of regions of the light emitting structure 120. But it is not limited thereto.

As shown in FIG. 8, a first electrode pad 141 and a first electrode pattern (143 of FIG. 2) are formed on the first conductive semiconductor layer 115, and a second electrode pad 151 is formed on the electrode layer 131. ) And a second electrode pattern 153 may be formed. Positions of the first electrode pattern 143 and the second electrode pattern 153 may be changed to improve current injection efficiency, but are not limited thereto.

An auxiliary electrode 145 is formed around the upper surface of the first conductive semiconductor layer 115, and the auxiliary electrode 145 is formed around the upper surface of the first conductive semiconductor layer 115, that is, an individual chip and a chip. It is formed along the area between. A part of the auxiliary electrode 145 is disposed close to the first electrode pad 141 to induce a current flowing through the first conductive semiconductor layer 115. The auxiliary electrode 145 may be formed by a sputtering method or an E-Beam deposition method, but is not limited thereto.

The auxiliary electrode 145 may be formed after masking a region other than the auxiliary electrode forming region with a mask material, and may be formed before or after the formation of the first electrode pad 141. In addition, when the auxiliary electrode 145 and the first electrode pad 141 are made of the same material, they may be formed at the same time.

The auxiliary electrode 145 may include an electrically conductive material, for example, a metal material, and may be formed of the same material as the first electrode pad 141. The auxiliary electrode 145 may be a metal including at least one of Cr, Al, Ti, In, Zn, Sn, Ru, Hf, V, and an optional alloy thereof, or may be an oxynitride of a metal. The auxiliary electrode 145 may be formed as a single layer or a multilayer, but is not limited thereto. The electrical conductivity of the auxiliary electrode 145 has a higher conductivity than that of the first conductive semiconductor layer 115.

In addition, by separating the individual chip size (T1), to provide a light emitting device as shown in FIG. The dividing into individual chip sizes T1 may be performed using a scribing method. In this case, the chip is irradiated along a center line of the chip and chip, that is, the auxiliary electrode 145, and then broken. do. The auxiliary electrode 145 is separated when divided into individual chip sizes T1, so that the side surface of the auxiliary electrode 145 and the side surface of the substrate 111 and the light emitting structure 120 may be disposed on the same plane. have.

In addition, when the auxiliary electrode 145 is divided into individual chip sizes T1, cracks may be prevented from occurring due to adhesion to the first conductive semiconductor layer 115, thereby protecting the active layer 117. have.

An insulating layer may be formed on a surface of the light emitting structure, and the insulating layer may also be formed in a region of the auxiliary electrode 145.

9 is a side sectional view showing a light emitting device according to the second embodiment.

Referring to FIG. 9, the light emitting device 101 includes a transparent electrode layer 135 formed in a first region A1 on an upper surface of the first conductive semiconductor layer 115, and on the transparent electrode layer 135. A portion of the first electrode pad 141 and the auxiliary electrode 145 are disposed. The first electrode pad 141 and the auxiliary electrode 145 may be electrically connected through the transparent electrode layer 135. The auxiliary electrode 145 is formed along the upper circumference of the first conductive semiconductor layer 115 to induce a current flowing through the first conductive semiconductor layer 115 to the outward direction, thereby expanding the current Double, it can improve the internal quantum efficiency.

10 is a side sectional view showing a light emitting device according to the third embodiment.

Referring to FIG. 10, the light emitting device 102 forms a roughness 115A on an upper surface of the first conductive semiconductor layer 115, and the first electrode pad 141 and the auxiliary layer on the roughness 115A. An electrode 145 may be formed. The roughness 115A may be formed on the first region A1 and the second region A2 of the upper surface of the first conductive semiconductor layer 115 and may be formed of a rough Ga-face surface. Here, the Ga-face is a surface facing toward the substrate 111 when etching the first region A1 of the light emitting structure 120 toward the substrate 111.

FIG. 11 is a diagram illustrating a modified example of an auxiliary electrode in the light emitting device of FIG. 1.

Referring to FIG. 11, the auxiliary electrode 145 includes a plurality of protrusions 145A and 145B, and the plurality of protrusions 145A and 145B are disposed to correspond to each other on both sides of the first electrode pad 141. Can be. The plurality of protrusions 145A and 145B may be spaced apart from each other at intervals of the first electrode pad 141, and may effectively transfer current applied from the first electrode pad 141.

12 is a view illustrating another example of an auxiliary electrode in the light emitting device of FIG. 1.

Referring to FIG. 12, the auxiliary electrode 146 includes an open loop shape, and both ends thereof are physically spaced apart from each other, and a predetermined distance T2 is formed from two side surfaces S2 opposite to the first side surface S1 of the light emitting device. ) Can be spaced apart.

The length of the auxiliary electrode 145 disposed along one side of the light emitting device may be formed to be 1/2 or more of the width of one side of the light emitting device. Here, the width of one side of the light emitting device may be the same width as the width of one side of the individual light emitting chip size (T1).

Referring to FIG. 13, in the light emitting device, a plurality of auxiliary electrodes 147 and 148 are formed on one side of the first electrode pad 141, and the plurality of auxiliary electrodes 147 and 148 emit light from the first electrode pad 141. Extends to the second side opposite the device. Some of the auxiliary electrodes 147 and 148 correspond to one side surface of the first electrode pad 141 and are spaced apart from each other.

Referring to FIG. 14, the light emitting device 103 is an example in which the positions of the first electrode pad 141 and the auxiliary electrode 145 are changed. The auxiliary electrode 145 is spaced apart from a side surface of the first conductive semiconductor layer 115 by a predetermined distance T3 and disposed inward of the first electrode pad 141.

15 is a view comparing forward voltages of light emitting devices of Comparative Examples and Examples.

Referring to FIG. 15, the light emitting device M1 of the comparative example has a structure without an auxiliary electrode, and the light emitting device M2 of the embodiment has a structure in which an auxiliary electrode is arranged as shown in FIG. 1. By arranging the auxiliary electrode in the light emitting device, the forward voltage can be lowered compared to the comparative example.

16 is a view showing a light emitting device package according to the embodiment.

Referring to FIG. 16, the light emitting device package 30 according to the embodiment includes a body 31, a first lead electrode 32 and a second lead electrode 33 installed on the body 31, and the body ( The light emitting device 100 according to the exemplary embodiment installed in the 31 and electrically connected to the first lead electrode 32 and the second lead electrode 33, and the molding member 37 surrounding the light emitting device 100. ).

The body 31 may include a silicon material, a synthetic resin material, or a metal material, and a cavity having an inclined surface may be formed around the light emitting device 100.

The first lead electrode 32 and the second lead electrode layer 33 are electrically separated from each other, and provide power to the light emitting device 100. In addition, the first lead electrode 32 and the second lead electrode 33 may increase light efficiency by reflecting light generated from the light emitting device 100, and heat generated from the light emitting device 100. It may also play a role in discharging it to the outside.

The light emitting device 100 may be installed on the body 31 or on the first lead electrode 32 or the second lead electrode 33.

The light emitting device 100 may be electrically connected to the first lead electrode 32 and the second lead electrode 33 by any one of a wire method, a flip chip method, and a die bonding method.

The molding member 37 may surround and protect the light emitting device 100. In addition, the molding member 37 may include a phosphor to change the wavelength of the light emitted from the light emitting device 100.

The light emitting device or the light emitting device package according to the embodiment may be applied to the light unit. The light unit includes a structure in which a plurality of light emitting devices or light emitting device packages are arranged, and includes a display device shown in FIGS. 17 and 18 and a lighting device shown in FIG. 19. And the like.

17 is an exploded perspective view of a display device according to an exemplary embodiment.

Referring to FIG. 17, the display device 1000 includes a light guide plate 1041, a light emitting module 1031 that provides light to the light guide plate 1041, a reflective member 1022 under the light guide plate 1041, and the light guide plate 1041. A bottom cover 1011 that houses an optical sheet 1051 on the light guide plate 1041, a display panel 1061 on the optical sheet 1051, the light guide plate 1041, a light emitting module 1031, and a reflective member 1022. ), But is not limited thereto.

The bottom cover 1011, the reflective sheet 1022, the light guide plate 1041, and the optical sheet 1051 can be defined as a light unit 1050.

The light guide plate 1041 serves to diffuse the light provided from the light emitting module 1031 to make a surface light source. The light guide plate 1041 is made of a transparent material, for example, acrylic resin-based such as polymethyl metaacrylate (PMMA), polyethylene terephthlate (PET), polycarbonate (PC), cycloolefin copolymer (COC), and polyethylene naphthalate (PEN). It may include one of the resins.

The light emitting module 1031 is disposed on at least one side of the light guide plate 1041 to provide light to at least one side of the light guide plate 1041, and ultimately serves as a light source of the display device.

The light emitting module 1031 may include at least one, and may provide light directly or indirectly at one side of the light guide plate 1041. The light emitting module 1031 may include a substrate 1033 and a light emitting device package 30 according to the above-described embodiment, and the light emitting device package 30 may be arranged on the substrate 1033 at predetermined intervals. have. The substrate may be a printed circuit board, but is not limited thereto. In addition, the substrate 1033 may include a metal core PCB (MCPCB, Metal Core PCB), flexible PCB (FPCB, Flexible PCB) and the like, but is not limited thereto. When the light emitting device package 30 is mounted on the side surface of the bottom cover 1011 or the heat dissipation plate, the substrate 1033 may be removed. A part of the heat radiation plate may be in contact with the upper surface of the bottom cover 1011. Therefore, heat generated in the light emitting device package 30 may be discharged to the bottom cover 1011 via the heat dissipation plate.

The plurality of light emitting device packages 30 may be mounted on the substrate 1033 such that an emission surface on which light is emitted is spaced apart from the light guide plate 1041 by a predetermined distance, but is not limited thereto. The light emitting device package 30 may directly or indirectly provide light to a light incident portion that is one side of the light guide plate 1041, but is not limited thereto.

The reflective member 1022 may be disposed under the light guide plate 1041. The reflective member 1022 reflects the light incident on the lower surface of the light guide plate 1041 and supplies the reflected light to the display panel 1061 to improve the brightness of the display panel 1061. The reflective member 1022 may be formed of, for example, PET, PC, or PVC resin, but is not limited thereto. The reflective member 1022 may be an upper surface of the bottom cover 1011, but is not limited thereto.

The bottom cover 1011 may house the light guide plate 1041, the light emitting module 1031, the reflective member 1022, and the like. To this end, the bottom cover 1011 may be provided with a housing portion 1012 having a box-like shape with an opened upper surface, but the present invention is not limited thereto. The bottom cover 1011 may be coupled to a top cover (not shown), but is not limited thereto.

The bottom cover 1011 may be formed of a metal material or a resin material, and may be manufactured using a process such as press molding or extrusion molding. In addition, the bottom cover 1011 may include a metal or a non-metal material having good thermal conductivity, but the present invention is not limited thereto.

The display panel 1061 is, for example, an LCD panel, and includes a first and second substrates of transparent materials facing each other, and a liquid crystal layer interposed between the first and second substrates. A polarizing plate may be attached to at least one surface of the display panel 1061, but the present invention is not limited thereto. The display panel 1061 displays information by transmitting or blocking light provided from the light emitting module 1031. The display device 1000 can be applied to video display devices such as portable terminals, monitors of notebook computers, monitors of laptop computers, and televisions.

The optical sheet 1051 is disposed between the display panel 1061 and the light guide plate 1041 and includes at least one light-transmitting sheet. The optical sheet 1051 may include at least one of a sheet such as a diffusion sheet, a horizontal / vertical prism sheet, a brightness enhanced sheet, and the like. The diffusion sheet diffuses incident light, and the horizontal and / or vertical prism sheet concentrates incident light on the display panel 1061. The brightness enhancing sheet reuses the lost light to improve the brightness I will. A protective sheet may be disposed on the display panel 1061, but the present invention is not limited thereto.

The light guide plate 1041 and the optical sheet 1051 may be included as an optical member on the optical path of the light emitting module 1031, but are not limited thereto.

18 is a diagram illustrating a display device having a light emitting device package according to an exemplary embodiment.

Referring to FIG. 18, the display device 1100 includes a bottom cover 1152, a substrate 1120 on which the light emitting device package 30 disclosed above is arranged, an optical member 1154, and a display panel 1155. .

The substrate 1120 and the light emitting device package 30 may be defined as a light emitting module 1060. The bottom cover 1152, at least one light emitting module 1060, and the optical member 1154 may be defined as a light unit (not shown).

The bottom cover 1152 may include an accommodating part 1153, but is not limited thereto.

The optical member 1154 may include at least one of a lens, a light guide plate, a diffusion sheet, a horizontal and vertical prism sheet, and a brightness enhancement sheet. The light guide plate may be made of a PC material or a poly methy methacrylate (PMMA) material, and the light guide plate may be removed. The diffusion sheet diffuses the incident light, and the horizontal and vertical prism sheets condense the incident light onto the display panel 1155. The brightness enhancing sheet reuses the lost light to improve the brightness .

The optical member 1154 is disposed on the light emitting module 1060, and performs surface light source, diffusion, condensing, etc. of the light emitted from the light emitting module 1060.

19 is a perspective view of a lighting apparatus according to an embodiment.

Referring to FIG. 19, the lighting device 1500 includes a case 1510, a light emitting module 1530 installed in the case 1510, and a connection terminal installed in the case 1510 and receiving power from an external power source. 1520).

The case 1510 may be formed of a material having good heat dissipation, for example, may be formed of a metal material or a resin material.

The light emitting module 1530 may include a substrate 1532 and a light emitting device package 30 according to an embodiment mounted on the substrate 1532. The plurality of light emitting device packages 30 may be arranged in a matrix form or spaced apart at predetermined intervals.

The substrate 1532 may be a circuit pattern printed on an insulator. For example, a general printed circuit board (PCB), a metal core PCB, a flexible PCB, a ceramic PCB, FR-4 substrates and the like.

In addition, the substrate 1532 may be formed of a material that reflects light efficiently, or a surface may be coated with a color, for example, white or silver, in which the light is efficiently reflected.

At least one light emitting device package 30 may be mounted on the substrate 1532. Each of the light emitting device packages 30 may include at least one light emitting diode (LED) chip. The LED chip may include a light emitting diode in a visible light band such as red, green, blue, or white, or a UV light emitting diode emitting ultraviolet (UV) light.

The light emitting module 1530 may be arranged to have a combination of various light emitting device packages 30 to obtain color and brightness. For example, a white light emitting diode, a red light emitting diode, and a green light emitting diode may be combined to secure high color rendering (CRI).

The connection terminal 1520 may be electrically connected to the light emitting module 1530 to supply power. The connection terminal 1520 is inserted into and coupled to an external power source in a socket manner, but is not limited thereto. For example, the connection terminal 1520 may be formed in a pin shape and inserted into an external power source, or may be connected to the external power source by a wire.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in each embodiment may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be taken by way of illustration, It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

100, 101, 102, 103: light emitting element, 111: substrate, 113: buffer layer, 115: first conductive semiconductor layer, 117: active layer, 119: second conductive semiconductor layer, 131: electrode layer, 141: first electrode pad, 143: first Electrode pattern, 145,146,147,148: auxiliary electrode, 151: second electrode pad, 153: second electrode pattern

Claims

A first conductive semiconductor layer;
A second conductive semiconductor layer;
An active layer between the first conductive semiconductor layer and the second conductive semiconductor layer;
An electrode layer on the second conductive semiconductor layer;
A first electrode pad on the first region of the first conductive semiconductor layer;
A second electrode pad on the electrode layer; And
The light emitting device of claim 1, wherein the light emitting device includes an auxiliary electrode formed at an upper edge of the first conductive semiconductor layer and partially spaced apart from the first electrode pad on the first region of the first conductive semiconductor layer.

The light emitting device of claim 1, wherein the auxiliary electrode is formed to have a length equal to or greater than 1/2 of a length of at least one side of the first conductive semiconductor layer.

The light emitting device of claim 1, wherein a part of the auxiliary electrode is disposed closer to a side surface of the first conductive semiconductor layer than the first electrode pad.

The light emitting device of claim 1, wherein a side surface of the auxiliary electrode is disposed on the same plane as a side surface of the first conductive semiconductor layer.

The light emitting device of claim 1, wherein a part of the auxiliary electrode is physically spaced apart from the first electrode pad.

The light emitting device of claim 1, wherein the auxiliary electrode is formed in a closed loop or an open loop shape along an upper edge of the first conductive semiconductor layer.

The light emitting device of claim 1, wherein the auxiliary electrode comprises a metal material.

The light emitting device of claim 1, further comprising a transparent electrode layer between the first electrode pad and the auxiliary electrode and the first conductive semiconductor layer.

The light emitting device of claim 1, wherein a part of the auxiliary electrode is smaller than a width of the first electrode pad.

The light emitting device of claim 1, wherein the first region of the first conductive semiconductor layer has a rough surface.

The light emitting device of claim 1, wherein the first electrode pad and the auxiliary electrode are formed of different materials.

The light emitting device of claim 1, wherein the auxiliary electrode is in ohmic contact with an upper surface of the first conductive semiconductor layer.

The light emitting device of claim 1, wherein the auxiliary electrode comprises oxynitrides of metals.

The light emitting device of claim 7, wherein the auxiliary electrode comprises at least one of Cr, Al, Ti, In, Zn, Sn, Ru, Hf, V, and an optional alloy thereof.

The light emitting device of claim 1, wherein the auxiliary electrode and the first electrode pad are spaced within 5 μm.

The light emitting device of claim 1, wherein the auxiliary electrode is disposed at a plurality of upper edges of the first conductive semiconductor layer.

The display apparatus of claim 1, further comprising: a first electrode pattern extending closer to the second electrode pad from the first electrode pad; And a second electrode pattern extending closer to the first electrode pad from the second electrode pad.

The light emitting device of claim 17, wherein an end portion of the auxiliary electrode is disposed closer to the second electrode pad than to the first electrode pad.

The light emitting device of claim 1;
A body having a cavity;
A plurality of lead electrodes disposed in the cavity and connected to the light emitting elements; And
The light emitting device package including a molding member in the cavity.

Forming a first conductive semiconductor layer on the substrate;
Forming an active layer on the first conductive semiconductor layer;
Forming a second conductive semiconductor layer on the active layer;
Forming an electrode layer on the second conductive semiconductor layer;
Exposing a first region and an edge region of the first conductive semiconductor layer;
Forming a first electrode pad and a second electrode pad on the electrode layer in a first region of the first conductive semiconductor layer;
Forming an auxiliary electrode spaced apart from the first electrode pad and along the first region and the edge region of the first conductive semiconductor layer.

The method of claim 19, wherein the auxiliary electrode includes a loop shape or an open loop shape along a circumference of the electrode layer.