KR20100132855A - Light emitting device and driving method thereof - Google Patents

Abstract

PURPOSE: A light emitting device and a driving method thereof are provided to prevent the motion blur and the flicker by controlling the pulse ratio of a light emitting data voltage supplied to a corresponding light emitting pixel during the first field and the second field according to the motion flag signal. CONSTITUTION: A video processor(150) is received with an image source and converts it into an input image signal(R, G, B) and an image input control signal(CP). A local brightness controller(200) is inputted with an input image signal and an input image control signal to output the brightness information signal and the motion detection signal.

Description

LIGHT EMITTING DEVICE AND DRIVING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device, and more particularly, to a light emitting device that emits light using an electron emission characteristic by an electric field, and a technology of a driving method thereof.

A liquid crystal display device, which is a type of flat panel display device, is a display device that realizes a predetermined image by varying light transmittance for each pixel by using dielectric anisotropy of a liquid crystal whose twist angle changes according to an applied voltage. Such a liquid crystal display device has advantages such as light weight, thickness, and low power consumption compared to a cathode ray tube, which is a typical image display device. The liquid crystal display basically includes a liquid crystal panel assembly and a light emitting device positioned behind the liquid crystal panel assembly to provide light to the liquid crystal panel assembly.

When the liquid crystal panel assembly is composed of an active liquid crystal panel assembly, the liquid crystal panel assembly includes a pair of transparent substrates, a liquid crystal layer positioned between the transparent substrates, a polarizing plate disposed on the outer surfaces of the transparent substrates, and either transparent Color fills that give red, green and blue colors to the common electrode provided on the inner surface of the substrate, the pixel electrodes and switching elements provided on the inner surface of the other transparent substrate, and the three sub-pixels constituting one pixel. And the like. The liquid crystal panel assembly receives light emitted from the light emitting device and transmits or blocks the light by the action of the liquid crystal layer to realize a predetermined image.

On the other hand, since the response speed of the liquid crystal display is longer than one frame, a liquid crystal display device may cause a motion blur phenomenon in which a faint afterimage is displayed on a screen when a moving image is rapidly changed every frame. In order to solve this problem, the light sources of the light emitting device are turned on only at the time point at which the image is displayed for one frame, and are driven in an impulsive manner in which the light sources are turned off for the remaining period. Therefore, the afterimage of the previous frame can be removed, thereby improving the motion blur phenomenon. However, this method has a problem in that a flicker phenomenon in which an image flickers when a still image without sudden change of a screen is implemented.

An object of the present invention is to provide a light emitting device and a driving method thereof capable of improving the motion blur phenomenon and the flicker phenomenon of the display device.

A light emitting device for providing a light source to a display device for displaying an image according to an input image signal and an input image control signal according to the present invention, comprising: a plurality of scan lines, a plurality of column lines, and at least one pixel of the display device; A plurality of light emitting pixels providing a light source, each of the plurality of scan lines comprising: a display unit to which first and second scan signals are applied during one frame period; Reading the input image signal and the input image control signal to generate a dimming signal having brightness information of each of the plurality of light emitting pixels, and having motion information of each region of the display device corresponding to each of the plurality of light emitting pixels A local brightness controller configured to generate a plurality of motion flag signals and to generate a plurality of ratio control signals having split ratio information of the dimming signal according to each of the plurality of motion flag signals; And a controller configured to divide the dimming signal into a plurality of first divided dimming data corresponding to the first scan signal and a plurality of second divided dimming data corresponding to the second scan signal according to the plurality of ratio control signals. do. The local brightness controller increases or decreases a ratio of the plurality of first divided dimming data to the dimming signal according to the plurality of motion flag signals. The local brightness controller generates a synchronization signal for classifying a frame and an emission control signal for controlling emission of each of the plurality of emission pixels using the input image control signal. The control unit may include: a data processing unit dividing the dimming signal into the plurality of first and second divided dimming data according to each of the plurality of ratio control signals; A plurality of memories including first and second sub memories respectively storing the plurality of first and second divided dimming data in one frame unit; And a frame buffer unit configured to selectively read and write the plurality of first and second divided dimming data from the plurality of memories according to each of the first counting signal and the second counting signal generated by counting the synchronization signals. The frame buffer unit generates the first counting signal by counting the sync signal in synchronization with the sync signal, and counts the sync signal in synchronization with a time delayed by an half period of the sync signal to count the second count signal. The first counting signal and the second counting signal are implemented as digital data having bits representing the number of the plurality of memories, and are repeatedly changed in units of the plurality of memories. The frame buffer unit writes the plurality of first and second divided dimming data in the order of the plurality of memories according to the first counting signal. The frame buffer unit reads the plurality of first divided dimming data from a first memory in which writing of the plurality of first and second divided dimming data is completed among the plurality of memories according to the first counting signal. The plurality of second divided dimming data are read from the first memory according to a two counting signal. The frame buffer unit reads the plurality of first and second divided dimming data alternately. The controller may further include a control signal generator configured to generate a scan driving control signal and a column driving control signal using the emission control signal. The apparatus may further include a scan driver configured to apply the first and second scan signals to the plurality of scan lines according to the scan drive control signal. Here, the one frame period is divided into at least two first fields and a second field, and the scan driver sequentially applies the plurality of first scan signals corresponding to the first field to the plurality of scan lines. The plurality of second scan signals corresponding to the second field are sequentially applied to the plurality of scan lines. During the first field, the scan driver alternately applies the plurality of first scan signals of the current frame and the plurality of second scan signals of the previous frame. During the second field, the scan driver alternately applies the plurality of second scan signals and the plurality of first scan signals of the current frame. The apparatus may further include a column driver configured to apply a light emission data voltage to the plurality of column lines during a period corresponding to the plurality of first and second divided dimming data according to the column driving control signal.

Light emission includes a plurality of light emitting pixels, a plurality of scan lines, and a plurality of column lines that provide a light source to at least one pixel of a display device displaying an image according to an input image signal and an input image control signal according to the present invention. A method of driving an apparatus, comprising: applying a first and a second scan signal to each of the plurality of scan lines for one frame period; Reading the input image signal and the input image control signal to generate a dimming signal having brightness information of each of the plurality of light emitting pixels; Generating a plurality of motion flag signals having motion information of each area of the display device corresponding to each of the plurality of light emitting pixels; Generating a plurality of ratio control signals having split ratio information of the dimming signal according to each of the plurality of motion flag signals; And dividing the dimming signal into a plurality of first divided dimming data corresponding to the first scan signal and a plurality of second divided dimming data corresponding to the second scan signal according to the plurality of ratio control signals. do. The dividing into the plurality of first and second divided dimming data may include increasing or decreasing a ratio of the plurality of first divided dimming data to the dimming signal according to the plurality of motion flag signals. The input image control signal includes a vertical synchronization signal, and generates a synchronization signal synchronized with the vertical synchronization signal; Generating a first counting signal by counting the sync signal in synchronization with the sync signal, and generating a second counting signal by counting the sync signal in synchronization with a time delayed by a half period of the sync signal; And selectively reading and writing the plurality of first and second divided dimming data according to the first and second counting signals. The selectively reading and writing of the plurality of first and second divided dimming data may include: writing the plurality of first and second divided dimming data in one frame unit according to the first counting signal; Reading the plurality of first divided dimming data according to the first counting signal when writing of the plurality of first and second divided dimming data in one frame unit is completed; And reading the plurality of second divided dimming data according to the second counting signal. And alternately reading the plurality of first and second divided dimming data. The one frame is divided into at least two first and second fields corresponding to the plurality of first and second scan signals, and the plurality of frames are arranged in the order of the plurality of first scan signals during the first field. Supplying a light emission data voltage to each of the plurality of light emitting pixels for a period corresponding to the first divided dimming data; Supplying a light emitting data voltage to each of the plurality of light emitting pixels during a period corresponding to the plurality of second divided dimming data in the order of the plurality of second scanning signals during the second field; During the first field, alternatingly applying the plurality of second scan signals of the previous frame and the plurality of first scan signals of the current frame; And during the second field, the plurality of first and second scan signals of the current frame are alternately applied.

As described above, according to an aspect of the present invention, an effect of improving the motion blur and flicker of the display device is provided.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like parts throughout the specification.

Throughout the specification, when a part is "connected" to another part, this includes not only "directly connected" but also "electrically connected" with another element in between. . In addition, when a part is said to "include" a certain component, which means that it may further include other components, except to exclude other components unless otherwise stated.

1 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is a detailed block diagram of the local brightness controller 200 shown in FIG. 1. 3 is an equivalent circuit diagram of the pixel PX shown in FIG. 1, and FIG. 4 is a detailed block diagram of the controller 110 shown in FIG. 1.

Referring to FIG. 1, a liquid crystal display of the present invention includes a light emitting device 100, a video processor 150, a local brightness controller 200, a liquid crystal panel assembly 300, and a gate driver. 400), a data driver 500, a gray voltage generator 800, and a signal controller 600.

The video processor 150 receives image sources transmitted from various media, and inputs the input image signals R, G, and B corresponding to the resolution of the liquid crystal display, and the input image control signals CP for displaying images according to the input image. Convert. The input image signals R, G, and B and the input image control signal CP generated in this way are input to the local brightness controller 200 and the signal controller 600. The input image signals R, G, and B contain luminance information of each pixel PX, and the luminance is a predetermined number, for example, 1024 (= 2 ¹⁰ ), 256 (= 2 ⁸ ), or 64 (= 2 ⁶ ) It has gray. The input image control signal CP includes the input image signals R, G, and B and control signals Hsync, Vsync, MCLK, and DE necessary to display the same.

Referring to FIG. 2, the local brightness controller 200 may include a dimming signal generator 210, a motion flag signal generator 220, a ratio control signal generator 230, and a light emission control signal generator 240. . The dimming signal generator 210 reads the input image signals R, G, and B and the input image control signal CP to determine the degree of brightness of each of the plurality of light emitting pixels EXP of the light emitting device 100. The dimming signal generator 210 generates a dimming signal DS in which a plurality of dimming data indicating the degree of brightness of each of the plurality of light emitting pixels EXP is arranged.

In detail, the dimming signal generator 210 reads the input image signals R, G, and B and the input image control signal CP, and corresponds to a plurality of light emitting pixels EXP of the light emitting device 100. The highest gray level is detected among the pixels PX, and the gray level of the light emitting pixel EXP is determined according to the detected gray level. The dimming signal generator 210 generates a dimming signal DS representing the determined gray level. In an embodiment of the present invention, the dimming signal DS is implemented with 8 bits, but the present invention is not limited thereto.

The motion flag signal generation unit 220 reads the input image signals R, G, and B and the input image control signal CP to output a plurality of liquid crystal panel assemblies 300 corresponding to each of the plurality of light emitting pixels EXP. Motion information is extracted for each region to generate a plurality of motion flag signals MF. In detail, the motion flag signal generator 220 changes the luminance of the input image signals R, G, and B corresponding to each of the plurality of regions of the liquid crystal panel assembly 300 corresponding to each of the plurality of light emitting pixels EXP. Detect the degree. As a result of the detection, when the change in luminance is large, it is determined as a moving region, and when the change in luminance is small, it is determined as an area where no movement. In an exemplary embodiment of the present invention, the motion flag signal MF corresponding to the region where there is motion is generated at a high level, and the motion flag signal MF corresponding to the region where there is no movement is generated at a low level. The present invention is not limited thereto, and the motion flag signal MF may have different levels depending on the presence / absence of the movement.

The ratio control signal generator 230 generates a plurality of ratio control signals RC according to the motion flag signal MF of each of the plurality of light emitting pixels EXP. The ratio control signal RC refers to a ratio of dimming dimming data of each light emitting pixel EXP into first and second divided dimming data. The light emitting device 100 according to an exemplary embodiment transmits a plurality of scan signals to each of the plurality of scan lines S1 to Sp twice to represent one frame. One frame includes a first field including a period in which a plurality of scan signals are first transmitted to each of the plurality of scan lines S1 to Sp, and a second one of the plurality of scan signals to each of the plurality of scan lines S1 to Sp. It includes a second field containing a period to pass to. The light emitting device 100 emits light of each of the plurality of light emitting pixels EXP according to the plurality of first and second divided dimming data during each field. Dimming data according to an embodiment of the present invention is divided into one frame unit and is data indicating emission time of all of the plurality of light emitting pixels EXP constituting the light emitting device 100 during one frame. In addition, the plurality of first and second divided dimming data are data representing emission times of all the plurality of light emitting pixels EXP during each field. Luminance expressed by emitting light of the plurality of light emitting pixels EXP during each of the first and second fields according to the plurality of first divided dimming data and the second divided dimming data is determined according to the plurality of dimming data before dividing. It is the same as the luminance expressed by emitting light from the light emitting pixel for one frame period. Accordingly, the light emitting device 100 controls the emission level by adjusting the emission time of the plurality of light emitting pixels EXP according to the plurality of first and second dimming data for each of the first and second fields. do.

Specifically, the ratio control signal RC is a quantized ratio applied when dimming the dimming data into the first divided dimming data and the second divided dimming data, and is a ratio of the first divided dimming data to the dimming data. To adjust the division ratio, the number of bits of the dimming signal DS may be increased or decreased. In an embodiment of the present invention, the pulse widths of the plurality of light emitting data voltages are determined according to the plurality of first and second divided dimming data, and thus the degree of brightness of each of the plurality of light emitting pixels EPX is determined. If the ratio control signal RC is set to 50% and the motion flag signal MF is at a high level, the value is increased in units of 10%. If the motion flag signal MF is at a low level, the value is decreased in units of 10%. When the high level motion flag signal MF occurs twice in succession, the ratio control signal RC becomes 70%. If the current ratio control signal RC is 70%, when the motion flag signal MF becomes low, the ratio control signal RC decreases in units of 10%, resulting in 60%. However, the rate control signal RC does not decrease below 50%. The ratio control signal RC has a value of at least 50%. In this way, the ratio control signal RC varies with the motion flag signal MF within a range of 50% to 100%.

The emission control signal generator 240 generates a control signal required to drive the light emitting device by using the input image control signal CP. The emission control signal generator 240 generates a synchronization signal Sync and an emission control signal LCS that classify frames according to the input image control signal CP. The sync signal Sync is a control signal for generating a light emission signal CLS for determining a light emission period, and the light emission control signal LCS is a control signal for operating the light emitting device 100 according to an adaptive scan method. to be. In order to implement this scanning method, it is necessary to modulate the frequency of the input image control signal CP. In more detail, the emission control signal LCS includes a signal obtained by modulating the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the like at twice the frequency. The adaptive scan method will be described later.

Referring back to FIG. 1, the liquid crystal panel assembly 300 is connected to a plurality of signal lines G1 to Gn and D1 to Dm in an equivalent circuit, and is arranged in a substantially matrix form. Pixel PX is included. The signal lines G1 to Gn and D1 to Dm include a plurality of gate lines G1 to Gn for transmitting a gate signal (also called a “scan signal”) and a plurality of data lines D1 to Dm for transmitting a data voltage. do. The gate lines G1 to Gn extend substantially in the row direction and are substantially parallel to each other, and the data lines D1 to Dm extend substantially in the column direction and are substantially parallel to each other.

Referring to FIG. 3, each pixel PX, for example, the i-th (i = 1, 2,, n) gate line Gi and the j-th (j = 1, 2,, m) data line Dj The pixel PXij connected to includes a switching element Q connected to the signal lines Gi and Dj, a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. Holding capacitor Cst can be omitted as needed.

The switching element Q is a three-terminal element of a thin film transistor or the like provided in the lower panel 210. The control terminal is connected to the gate line Gi, and the input terminal is connected to the data line Dj. The output terminal is connected to the liquid crystal capacitor Clc and the storage capacitor Cst.

The liquid crystal capacitor Clc has two terminals, the pixel electrode 308 of the lower panel 210 and the common electrode 302 of the upper panel 306, and the liquid crystal layer 3 between the two electrodes 191 and 270 is a dielectric material. Function as. The pixel electrode 308 is connected to the switching element Q, and the common electrode 302 is formed on the front surface of the upper panel 200 and receives a common voltage Vcom. Unlike in FIG. 2, the common electrode 302 may be provided in the lower panel 100. In this case, at least one of the two electrodes 191 and 270 may be linear or rod-shaped.

The storage capacitor Cst, which serves as an auxiliary part of the liquid crystal capacitor Clc, is formed by overlapping a separate signal line (not shown) and the pixel electrode 308 provided on the lower panel 100 with an insulator interposed therebetween. A predetermined voltage such as the common voltage Vcom is applied to the separate signal line. However, the storage capacitor Cst may be formed such that the pixel electrode 308 overlaps the front gate line Gi-1 directly above the insulator.

On the other hand, in order to implement color display, each pixel PX uniquely displays one of the primary colors (spatial division) or each pixel PX alternately displays the primary colors over time (time division). The desired color is recognized by the spatial and temporal sum of these primary colors. Examples of the primary colors include three primary colors of light such as red, green, and blue. 3 shows as an example of spatial division, each pixel PX includes a color filter 304 representing one of the primary colors in the region of the upper panel 306 corresponding to the pixel electrode 308. Unlike in FIG. 3, the color filter 304 may be disposed above or below the pixel electrode 308 of the lower panel 210. The liquid crystal panel assembly 300 is provided with at least one polarizer (not shown).

Referring back to FIG. 1, the gray voltage generator 800 generates an entire gray voltage related to the transmittance of the pixel PX or a limited number of gray voltages (hereinafter referred to as a reference gray voltage). The reference gray voltage may include having a positive value and a negative value with respect to the common voltage Vcom.

The gate driver 400 is connected to the gate lines G1 to Gn of the liquid crystal panel assembly 300 to receive a gate signal formed of a combination of the gate on voltage Von and the gate off voltage Voff. ) Is applied.

The data driver 500 is connected to the data lines D1 to Dm of the liquid crystal panel assembly 300, and selects a gray voltage from the gray voltage generator 800 and uses the data voltages D1 to Dm as data voltages. To apply. However, when the gray voltage generator 800 does not provide all the gray voltages but provides only a limited number of reference gray voltages, the data driver 500 divides the reference gray voltages to generate a desired data voltage.

The signal controller 600 controls the gate driver 400, the data driver 500, and the like. The signal controller 600 receives the input image signals R, G, and B from the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal CP received from the video processor 150. The digital image signal DATA, the gate control signal CONT1, the data control signal CONT2, and the like may be generated by appropriately processing the device according to the operating conditions. The signal controller 600 transmits the generated gate control signal CONT1 to the gate driver 400, and transmits the data control signal CONT2 and the processed digital image signal DATA to the data driver 500.

The gate control signal CONT1 includes a scan start signal STV indicating a scan start and at least one clock signal for controlling an output period of the gate-on voltage Von. The gate control signal CONT1 also includes a gate-on signal. The display device may further include an output enable signal OE that defines a duration of the voltage Von.

The data control signal CONT2 is analog to the horizontal synchronization start signal STH and the data lines D1 to Dm indicating the start of the transfer of the digital image signal DATA for one row of pixels PX to the data driver 500. It includes a load signal LOAD to apply a data voltage. The data control signal CONT2 also inverts the signal RVS which inverts the polarity of the data voltage with respect to the common voltage Vcom (hereinafter referred to as "polarity of the data voltage" by reducing the "polarity of the data voltage with respect to the common voltage"). It may further include.

The data driver 500 generates an analog data voltage by selecting a gray voltage corresponding to the digital image signal DATA, and applies the analog data voltage to the data lines D1 to Dm.

The gate driver 400 applies a gate-on voltage Von to the gate lines G1 to Gn according to the gate control signal CONT1 from the signal controller 600, and is connected to the gate lines G1 to Gn. Turn on (Q). Then, the data voltage applied to the data lines D1 to Dm is applied to the pixel PX through the turned-on switching element Q.

The difference between the data voltage applied to the pixel PX and the common voltage Vcom is shown as the charging voltage of the liquid crystal capacitor Clc, that is, the pixel voltage. The arrangement of the liquid crystal molecules varies depending on the magnitude of the pixel voltage, thereby changing the polarization of light passing through the liquid crystal layer 3. This change in polarization is represented by a change in the transmittance of light by the polarizer, through which the pixel PX displays the luminance represented by the gray level of the digital image signal DATA.

This process is repeated in units of one horizontal period (also referred to as "1H" and equal to one period of the horizontal sync signal Hsync and the data enable signal DE) to all the gate lines G1 to Gn. The image of one frame is displayed by sequentially applying a gate-on voltage Von and applying a data voltage to all the pixels PX.

The light emitting device 100 includes a controller 110, a column driver 112, a scan driver 114, and a display unit 116. As illustrated in FIG. 4, the controller 110 includes a data processor 110_1, a plurality of first to third memories 110_2 to 110_4, a frame buffer unit 110_5, and a control signal generator 110_6. . The data processor 110_1 generates a plurality of first divided dimming data and a plurality of second divided dimming data by dividing the plurality of dimming data in one frame unit according to a corresponding ratio control signal RC. The data processor 110_1 includes a plurality of first divided dimming data DSS1, DSS3, and DSS5 and a plurality of second divided dimming data DSS2, DSS4, and DSS6 among the plurality of first to third memories 110_2 to 110_4. Transfer to the corresponding memory. That is, the plurality of first divided dimming data DSS1 and the plurality of second divided dimming data DS2 of the nth frame are stored in the first memory 110_2, and the n + 1th frame is stored in the second memory 110_3. A plurality of first divided dimming data (DSS3) and a second divided dimming data (DSS4) of are stored. Similarly, the plurality of first divided dimming data DS5 and the second divided dimming data DS6 of the n + 2th frame are stored in the third memory 110_4. A plurality of first divided dimming data and second divided dimming data of a subsequent frame are also stored in this manner. According to an embodiment of the present invention, the three first to third memories 110_2 to 110_4 are the minimum number necessary for adaptive scanning. The adaptive scanning method according to an embodiment of the present invention transfers a plurality of scan signals to each of the plurality of scan lines S1 to Sp twice to express one frame, and emits light when two scan signals are respectively transmitted. The light emission period of the pixel EPX is determined according to the ratio control signal RC. Specifically, when the ratio control signal RC is 50%, the emission period of the emission pixel EPX is the same as the emission period of the emission pixel EPX during the period when the first scan signal is applied and the emission period of the emission pixel EPX is the same during the period when the second scan signal is applied. Do. If the ratio control signal RC is 60%, the ratio of the light emission period of the light emitting pixel EPX during the period during which the first scan signal is applied and the light emission period of the light emitting pixel EPX during the period during which the second scan signal is applied is 6 : 4. As described above, the emission period of the emission pixel EPX is determined for each of the two scan signals according to the degree of movement of the plurality of liquid crystal pixels PX corresponding to the emission pixel EPX. For this adaptive scanning method, one frame includes a first field and a second field, which are temporal overlaps between the second field of the previous frame and the first field of the current frame and between the first field and the second field of the current frame. Temporal duplication occurs. Therefore, it is necessary to control so that the scan signals between the frames and the first and second fields of each frame do not overlap. The description thereof will be described later with reference to FIG. 7. Therefore, the present invention is not limited thereto, and may include three or more memories.

The first memory 110_2 includes two sub memories 110_21 and 110_22. The plurality of first divided dimming data DSS1 is stored in the first sub memory 110_21, and the plurality of second divided dimming data DS2 is stored in the second sub memory 110_22. The second memory 110_3 includes first and second sub memories 110_31 and 110_32, and the plurality of first divided dimming data DSS3 and the plurality of second divided dimming data DSS4 are formed of the first and second sub memories 110_31 and 110_32. The sub memories 110_31 and 110_32 are respectively stored. Similarly, the third memory 110_4 includes the first and second sub memories 110_41 and 110_42, and the plurality of first divided dimming data DSS5 and the plurality of second divided dimming data DS6 are formed of the first and second sub memories 110_41 and 110_42. The second sub memory 110_41 and 110_42 are respectively stored. Here, the number of sub memories included in each of the first to third memories 110_2 to 110_4 may be adjusted according to the number of dividing the plurality of dimming data. The frame buffer unit 110_5 stores the plurality of first divided dimming data DSS1, DSS3 and DSS5 and the plurality of second divided dimming data DSS2, DSS4 and DSS6 stored in the first to third memories 110_2 to 110_4. It reads and outputs it by the light emission signal CLS in order. The frame buffer unit 110_5 includes two counters (not shown), and the frame buffer units 110_5 are each of the first to third memories 110_2 to 110_4 according to counter pulses output from one of the two counters. The plurality of first divided dimming data DSS1, DSS3, and DSS5 and the plurality of second divided dimming data DSS2, DSS4, and DSS6 are written to the first to third memories 110_2 to 110_4. A plurality of first divided dimming data DSS1, DSS3, and DSS5 are read from each of the first sub memories 110_21, 110_31, and 110_41. In response to the counter pulses of the remaining counters, the frame buffer unit 110_5 includes a plurality of second divided dimming data DSS2 from the second sub memories 110_22, 110_32, and 110_42 of each of the first to third memories 110_2 to 110_4. DSS4, DSS6). This will be described later in detail with reference to FIG. 5.

The control signal generator 110_6 generates the scan driving control signal CS and the column driving control signal CC using the emission control signal LCS and transmits the generated scan driving control signal CS and the column driving control signal CC to the scan driving unit 114 and the column driving unit 112, respectively. . The scan driving control signal CS may include at least one clock signal for controlling the output period of the scan start signal STV1 and the scan on voltage VN indicating the start of scanning of each of the plurality of scan lines S1 to Sp. Include. The scan driving control signal CS according to an embodiment of the present invention has a frequency twice that of the gate control signal CONT1. The scan signals supplied to the plurality of scan lines S1 to Sp according to the scan drive control signal CS will be described later with reference to FIG. 7. The column driving control signal CC is a horizontal synchronization start signal STH1 indicating the start of the transfer of the light emission signal CLS to the column driver 112 in one row of pixels EPX and a light emission signal in the column lines C1 to Cq. And a load signal LOAD for applying the light emission data voltage according to the CLS.

The column driver 112 is connected to the plurality of column lines C1 to Cq, and the plurality of liquid crystal pixels to which the light emitting pixels EPX correspond to themselves according to the column driving control signal CC and the light emitting signal CLS. Control is made so that light can be emitted corresponding to the gray scale of (PX). In detail, the column driver 112 determines pulse widths of the plurality of emission data voltages according to the emission signal CLS, and transmits the pulse widths to the plurality of column lines C1 to Cq according to the column driving control signal CC. That is, the column driver 112 synchronizes the light emitting pixels EPX to emit light with a predetermined gray scale in accordance with images displayed on the plurality of liquid crystal pixels PX corresponding to one light emitting pixels EPX.

The scan driver 114 is connected to the plurality of scan lines S1 to Sp, and the light emitting pixels EPX emit light in synchronization with the plurality of liquid crystal pixels PX corresponding thereto according to the scan driving control signal CS. It transmits a plurality of scan signals so that it can.

The display unit 116 includes a plurality of scan lines S1 to Sp for transmitting a scan signal, a plurality of column lines C1 to Cq for transmitting a light emission data signal, and a plurality of light emitting pixels EPX. Each of the plurality of light emitting pixels EPX is positioned in a region defined by scan lines S1 to Sp and column lines C1 to Cq intersecting the scan lines. Each of the plurality of light emitting pixels EPX according to an exemplary embodiment of the present invention includes a field emission array (FEA) type electron emission device. The FEA type electron emission device includes a scan electrode and a data electrode, an electron emission part and a fluorescent layer electrically connected to any one of the scan electrode and the data electrode. The electron emission part may be made of a material having a low work function or a high aspect ratio, for example, a carbon-based material or a nanometer (nm) size material. The FEA type electron emitting device forms an electric field around the electron emitting part by using the voltage difference between the scan electrode and the data electrode to emit electrons therefrom, and excites the fluorescent layer with the emitted electrons to display visible light having an intensity corresponding to the electron beam emission amount. Releases.

5 is a diagram illustrating an operation of the controller 110 according to an exemplary embodiment of the present invention.

Referring to FIG. 5, the first counting signal Count1 and the second counting signal Count2 are generated according to the synchronization signal Sync. Here, the synchronization signal Sync is a signal synchronized with the vertical synchronization signal Vsync generated by the video processor 150 and has the same frequency as the vertical synchronization signal Vsync. The sync signal Sync includes a pulse having a high level for a predetermined period at the start of one cycle. The first counting signal Count1 is repeatedly counted in the order of '00, 01, 10 'in synchronization with the rising edge of the synchronization signal Sync, and the second counting signal Count2 is synchronized with the first counting signal Count1. The signal is repeatedly counted in order of '00, 01, 10 'with a difference corresponding to a half period of the signal Sync. The first counting signal Count1 and the second counting signal Count2 according to an embodiment of the present invention are implemented as digital data having bits that can indicate the number of the plurality of memories 110_2 to 110_4. 110_2 ~ 110_4) is repeatedly changed in units of numbers. A plurality of first divided dimming data DSS1 is written in the first sub memory 110_21 of the first memory 110_2 during the period T1 when the first counting signal Count1 is '00', and the second sub memory The plurality of second divided dimming data DSS2 is written to 110_22. A plurality of first divided dimming data DSS3 is written in the first sub memory 110_31 of the second memory 110_3 during the period T2 in which the first counting signal Count1 is '01', and the second sub memory A plurality of second divided dimming data DSS4 is written into 110_32. The frame buffer unit 110_5 reads the plurality of first divided dimming data DSS1 from the first sub memory 110_21 during the period T2. The frame buffer unit 110_5 reads the plurality of second divided dimming data DSS2 from the second sub memory 110_22 during the period T3 when the second counting signal Count2 is '01'. A plurality of first divided dimming data DSS5 is written in the first sub memory 110_41 of the third memory 110_4 during the period T4 when the first counting signal Count1 is '10', and the second sub memory The plurality of second divided dimming data DS6 is written in 110_42. The frame buffer unit 110_5 reads the plurality of first divided dimming data DSS3 from the first sub memory 110_31 during the period T4. The frame buffer unit 110_5 reads the plurality of second divided dimming data DSS4 from the second sub memory 110_32 during the period T5 when the second counting signal Count2 is '10'. The plurality of first divided dimming data DSS1 is written in the first sub memory 110_21 of the first memory 110_2 during the period T6 in which the first counting signal Count1 is '00', and the second sub memory A plurality of second divided dimming data DSS2 is written to 110_22. The frame buffer unit 110_5 reads the plurality of first divided dimming data DSS5 from the first sub memory 110_41 during the period T6. The frame buffer unit 110_5 reads the plurality of second divided dimming data DSS6 from the second sub memory 110_42 during the period T7 when the second counting signal Count2 is '00'. In this manner, the plurality of first divided dimming data DSS1, DSS3, DSS5 and the plurality of second divided dimming data DSS2, DSS4, DSS6 corresponding to each frame are output as the emission signal CLS.

On the other hand, the frame buffer unit 110_5 alternately arranges the plurality of first divided dimming data and the second divided dimming data read from each sub memory to generate the emission signal CLS. That is, during the period T23 where the period T2 and the period T3 overlap, the frame buffer unit 110_5 includes the plurality of first divided dimming data DSS1 and the second sub memory read from the first sub memory 110_21. The plurality of second divided dimming data DSSs read from 110_22 are alternately arranged. Similarly, during the period T45 where the period T4 and the period T5 overlap, the frame buffer unit 110_5 includes a plurality of first divided dimming data DSS3 and a second sub memory read from the first sub memory 110_31. A plurality of second divided dimming data DSS4 read out from 110_32 are alternately arranged. During the period T67 in which the period T6 and the period T7 overlap, the frame buffer unit 110_5 includes the plurality of first divided dimming data DSS5 and the second sub memory read from the first sub memory 110_41. The plurality of second divided dimming data DSS6 read out from 110_42 are alternately arranged. The reason why the frame buffer unit 110_5 alternately arranges the first divided dimming data and the second divided dimming data is that a plurality of scan signals are divided into a plurality of scan lines S1 to Sp according to the adaptive scanning method of the present invention. Because it is delivered twice.

6 illustrates a motion flag signal MS, a dimming signal DS, a ratio control signal RC, a plurality of first divided dimming data DSS1, DSS3, and DSS5 and a second divided dimming data according to an exemplary embodiment of the present invention. (DSS2, DSS4, DSS6) is a figure which shows.

FIG. 6 illustrates that a plurality of dimming data of the dimming signal DS is divided into a plurality of first divided dimming data and second divided dimming data through signal division and ratio calculation according to the motion flag signal MS. . In FIG. 6, a motion flag signal MS, a dimming signal DS, a ratio control signal RS, a plurality of first divided dimming data DSS1, DSS3, and DSS5 and a second divided dimming data DSS are illustrated in FIG. 6. , DSS4, DSS6) are expressed in decimal notation.

Referring to FIG. 6, in the region where the motion flag signal MS is at the low level '0' in the nth frame a, the rate control signal RC is generated at 50%, thereby generating a plurality of first divided dimming data. The ratios of the DSS1 and the second divided dimming data DSS2 are 50%, respectively. For example, when the dimming data of the corresponding area is '200', the plurality of first divided dimming data DSS1 becomes '100', and the plurality of second divided dimming data DSS2 also becomes '100'. Next, when the motion flag signal MS of the corresponding region reaches a high level '1' in the n + 1th frame b, the rate control signal RC is generated at 60% to generate a plurality of first divided dimming data. The ratio of the DSS3 increases to 60%, and the ratio of the plurality of second divided dimming data DSS4 decreases to 40%. Then, the plurality of first divided dimming data DSS3 becomes '120', and the plurality of second divided dimming data DSS2 becomes '80'. Next, when the motion flag signal MS of the corresponding region reaches the low level '0' in the n + 2th frame c, the rate control signal RC is generated at 50% to generate a plurality of first divided dimming data. The ratio of the DSS5 is reduced back to 50%, and the ratio of the plurality of second divided dimming data DSS6 is increased again to 50%. Then, the plurality of first divided dimming data DSS5 becomes '100' again, and the plurality of second divided dimming data DSS6 also becomes '100' again. At this time, even if the motion flag signal MS is continuously at the low level '0', the ratio control signal RC does not decrease to less than 50%, and the motion flag signal MS is continuously at the high level '1'. The rate control signal RC goes up to 100%.

FIG. 7 is a diagram illustrating a scan signal supplied to a plurality of scan lines S1 to Sp according to an embodiment of the present invention. Scan signal of one frame In response to the first scan signal of the two scan signals, each of the plurality of light emitting data voltages is applied to each of the plurality of column lines C1 to Cq for a predetermined period according to the corresponding light emitting signal. In this case, the emission signal CLS is a plurality of first divided dimming data corresponding to a plurality of emission pixels connected to the corresponding scan line. Each of the plurality of light emitting data voltages is applied to each of the plurality of column lines for a predetermined period according to the light emitting signal in response to the second scan signal. In this case, the light emission signal is a plurality of second divided dimming data corresponding to a plurality of light emitting pixels connected to the corresponding scan line.

In FIG. 7, the horizontal axis represents the time axis, and the vertical axis corresponds to the plurality of scan lines S1 to Sp. In FIG. 7, the periods T11, T12, and T13 are divided by 1/60 second units, respectively. First, during the period T111, the first field of the nth frame is started from the time point P1. A plurality of light emitting data voltages corresponding to the plurality of first divided dimming data DSSs of the nth frame from the time point P1 must be transmitted to the plurality of light emitting pixels EPX. To this end, the first scan signal is applied to the scan line S1 at the time point P1. Then, the first scan signal is applied to the scan line S2 at the time point P2. In this manner, the plurality of first scan signals are sequentially applied to the plurality of scan lines S1 to Sk-1. During the next period T112, the second field of the nth frame is started from the time point P3. From the time point P3 of the period T112, a plurality of light emitting data voltages corresponding to the plurality of second divided dimming data DSSs of the nth frame must be transmitted to the plurality of light emitting pixels EPX. To this end, the second scan signal is applied to the scan line S1 at the time point P3. In addition, during the period T112, a plurality of light emitting data voltages corresponding to the plurality of first divided dimming data DSSs of the nth frame must be transmitted to the plurality of light emitting pixels EXP. To this end, a plurality of first scan signals are sequentially applied to the remaining plurality of scan lines Sk to Sp. Since two or more scan signals cannot be simultaneously applied, the second scan signal is applied to the scan line S1 at the time point P3, and then the first scan signal is applied to the scan line Sk at the time point P4. Then, after the second scan signal is applied to scan line S2, the first scan signal is applied to scan line Sk + 1. In this manner, the first scan signal and the second scan signal of the nth frame are alternately applied to the plurality of scan lines S1 to Sp during the period T112.

Subsequently, during the period T121, the first field of the n + 1th frame is started from the time point P5. From the viewpoint P5, a plurality of light emitting data voltages corresponding to the plurality of first divided dimming data DSSs of the n + 1th frame must be transferred to the plurality of light emitting pixels EPX. To this end, the first scan signal is applied to the scan line S1 at the time point P5. In addition, during the period T121, a plurality of light emitting data voltages corresponding to the plurality of second divided dimming data DSSs of the nth frame must be transmitted to the plurality of light emitting pixels EXP. To this end, a plurality of second scan signals are sequentially applied to the remaining plurality of scan lines Sk to Sp. In this case, after the first scan signal is applied to the scan line S1 at the time point P5, the second scan signal is applied to the scan line Sk at the time point P6. As described above, the plurality of first scan signals of the n + 1 th frame and the plurality of second scan signals of the n th frame are alternately applied to the plurality of scan lines S1 to Sp during the period T121.

Similarly, during the period T122, the second field of the n + 1 th frame is started so that each of the plurality of second scan signals of the n + 1 th frame during the period T122 and the period T131 has a plurality of scan lines S1. Are sequentially applied to ~ Sp). The second scan signal is generated in accordance with the emission signal CLS corresponding to the plurality of second divided dimming data DSS4 of the n + 1 th frame in synchronization with the time when the second scan signal is sequentially applied to the plurality of scan lines S1 to Sp. A plurality of light emitting data voltages are applied to the plurality of column lines C1 to Cq. Further, during the period T131, the first field of the n + 2th frame is started and n + for the period T131 and the period T132. A plurality of first scan signals corresponding to the second frame are also sequentially applied to the plurality of scan lines S1 to Sp. In accordance with the emission signal CLS corresponding to the plurality of first divided dimming data DSS5 of the n + 2th frame in synchronization with the time when the plurality of first scan signals are sequentially applied to the plurality of scan lines S1 to Sp. The generated light emitting data voltages are applied to the plurality of column lines C1 to Cq. In this order, the scan signals are applied to the plurality of scan lines S1 to Sp.

FIG. 8 is a diagram illustrating light emission data voltages according to an exemplary embodiment of the present invention, and emits light to corresponding light emitting pixels corresponding to a specific area according to a change of the motion flag signal MS in a frame order in a specific area of the display unit 116. The change in the period during which the data voltage is applied is shown.

Referring to FIG. 8, when the motion flag signal MS is at a low level '0' in the nth frame a, light emission is supplied to the corresponding light emitting pixel EPX during the first field F1 when the first scan signal is applied. The pulse width of the data voltage and the pulse width of the light emission data voltage supplied to the corresponding light emitting pixel EPX during the second field F2 when the second scan signal is applied are the same. Next, when the motion flag signal MS of the corresponding region is changed to the high level '1' in the n + 1th frame b, the emission data voltage supplied to the corresponding emission pixel EPX during the first field F1. Is increased by a predetermined ratio, for example 10%, and the pulse width of the light emission data voltage supplied during the second field F2 is reduced by 10%. Subsequently, even in the n + 2th frame c, when the motion flag signal MS is at the high level '1', the ratio of the pulse width of the light emission data voltage supplied to the corresponding light emitting pixel EPX during the first field F1. This increases to 20%, and the pulse width of the light emission data voltage supplied to the corresponding light emitting pixel EPX during the second field F2 decreases by 20%. As such, when the motion flag signal MS is continuously at the high level '1', the pulse of the emission data voltage supplied to the corresponding emission pixel EPX during the first field F1 in the n + 3th frame d. The ratio of width is 100%. That is, the pulse width ratio of the emission data voltage supplied to the corresponding emission pixel EPX is adjusted during the first field F1 and the second field F2 according to the motion flag signal MS. As a result, the flicker phenomenon may be improved by equalizing the period during which the light emission data voltage is applied during the first field F1 and the second field F2 of one frame in the case where there is no motion. On the other hand, in the case of a moving region, the period during which the emission data voltage is applied during the second field F2 is smaller than the period during which the emission data voltage is applied during the first field F1 of one frame, thereby Do not affect the image. This can improve the motion blur phenomenon.

Although the embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

1 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a detailed block diagram of the local brightness controller 200 shown in FIG. 1.

FIG. 3 is an equivalent circuit diagram of the pixel PX shown in FIG. 1.

4 is a detailed block diagram of the controller 110 shown in FIG. 1.

5 is a view for explaining the operation of the control unit 110 according to an embodiment of the present invention.

6 illustrates a motion flag signal MS, a dimming signal DS, a ratio control signal RC, first divided dimming data DSS1, DSS3, and DSS5 and a second divided dimming data DSS according to an exemplary embodiment of the present invention. , DSS4, DSS6).

FIG. 7 is a diagram illustrating a scan signal supplied to a plurality of scan lines S1 to Sp according to an embodiment of the present invention. FIG.

8 is a diagram illustrating emission data voltages according to an exemplary embodiment of the present invention.

Claims (20)

A light emitting device for providing a light source to a display device for displaying an image according to an input image signal and an input image control signal, A plurality of scan lines, a plurality of column lines and a plurality of light emitting pixels for providing the light source to at least one pixel of the display device, each of the plurality of scan lines each of the first and second scan signal for one frame period A display unit to which is applied; Reading the input image signal and the input image control signal to generate a dimming signal having brightness information of each of the plurality of light emitting pixels, and having motion information of each region of the display device corresponding to each of the plurality of light emitting pixels A local brightness controller configured to generate a plurality of motion flag signals and to generate a plurality of ratio control signals having split ratio information of the dimming signal according to each of the plurality of motion flag signals; And A controller configured to divide the dimming signal into a plurality of first divided dimming data corresponding to the first scan signal and a plurality of second divided dimming data corresponding to the second scan signal according to the plurality of ratio control signals. Light emitting device comprising a. The method of claim 1, And the local brightness controller increases or decreases a ratio of the plurality of first divided dimming data to the dimming signal according to the plurality of motion flag signals. The method of claim 1, And the local brightness controller generates a synchronization signal for classifying a frame and an emission control signal for controlling emission of each of the plurality of emission pixels using the input image control signal. The method of claim 3, wherein The control unit, A data processor for dividing the dimming signal into the plurality of first and second divided dimming data according to each of the plurality of ratio control signals; A plurality of memories including first and second sub memories respectively storing the plurality of first and second divided dimming data in one frame unit; And A frame buffer unit for selectively reading and writing the plurality of first and second divided dimming data from the plurality of memories according to each of the first counting signal and the second counting signal generated by counting the synchronization signals; Light emitting device comprising a. The method of claim 4, wherein The frame buffer unit generates the first counting signal by counting the sync signal in synchronization with the sync signal, and generates the second counting signal by counting the sync signal in synchronization with a time delayed by half a period of the sync signal. , The first counting signal and the second counting signal are implemented as digital data having bits that can indicate the number of the plurality of memories, and the light emitting device changes repeatedly in units of the plurality of memories. The method of claim 4, wherein The frame buffer unit, And writing the plurality of first and second divided dimming data in order of the plurality of memories according to the first counting signal. The method of claim 4, wherein The frame buffer unit, Read the plurality of first divided dimming data from a first memory in which writing of the plurality of first and second divided dimming data is completed among the plurality of memories according to the first counting signal, And a plurality of second divided dimming data from the first memory according to the second counting signal. The method of claim 7, wherein The frame buffer unit, And a plurality of first and second divided dimming datas alternately read. The method of claim 4, wherein The controller further includes a control signal generation unit configured to generate a scan driving control signal and a column driving control signal using the light emission control signal. The method of claim 9, And a scan driver configured to apply the first and second scan signals to the plurality of scan lines according to the scan drive control signal. The method of claim 10, The one frame period is divided into at least two first fields and a second field, The scan driver sequentially applies the plurality of first scan signals corresponding to the first field to the plurality of scan lines, and scans the plurality of second scan signals corresponding to the second field. A light emitting device that is sequentially applied to the line. The method of claim 11, wherein During the first field, the scan driver alternately applies the plurality of first scan signals of a current frame and the plurality of second scan signals of a previous frame. The method of claim 11, wherein And the scan driver alternately applies the plurality of second scan signals and the plurality of first scan signals of a current frame during the second field. The method of claim 9, And a column driver configured to apply an emission data voltage to the plurality of column lines during a period corresponding to the plurality of first and second divided dimming data according to the column driving control signal. A driving method of a light emitting device including a plurality of light emitting pixels, a plurality of scanning lines, and a plurality of column lines which provide a light source to at least one pixel of a display device displaying an image according to an input image signal and an input image control signal. , Applying first and second scan signals to each of the plurality of scan lines for one frame period; Reading the input image signal and the input image control signal to generate a dimming signal having brightness information of each of the plurality of light emitting pixels; Generating a plurality of motion flag signals having motion information of each area of the display device corresponding to each of the plurality of light emitting pixels; Generating a plurality of ratio control signals having split ratio information of the dimming signal according to each of the plurality of motion flag signals; And Dividing the dimming signal into a plurality of first divided dimming data corresponding to the first scan signal and a plurality of second divided dimming data corresponding to the second scan signal according to the plurality of ratio control signals. Method of driving a light emitting device. The method of claim 15, The dividing into the plurality of first and second divided dimming data may include: And increasing or decreasing a ratio of the plurality of first divided dimming data to the dimming signal according to the plurality of motion flag signals. The method of claim 15, The input image control signal includes a vertical synchronization signal, Generating a synchronization signal synchronized with the vertical synchronization signal; Generating a first counting signal by counting the sync signal in synchronization with the sync signal, and generating a second counting signal by counting the sync signal in synchronization with a time delayed by a half period of the sync signal; And And selectively reading and writing the plurality of first and second divided dimming data according to the first and second counting signals. The method of claim 17, The selectively reading and writing the plurality of first and second divided dimming data, Writing the plurality of first and second divided dimming data in one frame unit according to the first counting signal; Reading the plurality of first divided dimming data according to the first counting signal when writing of the plurality of first and second divided dimming data in one frame unit is completed; And Reading the plurality of second divided dimming data according to the second counting signal. Method of driving a light emitting device comprising a. The method of claim 18, And alternately reading the plurality of first and second divided dimming data. The method of claim 15, The one frame is divided into at least two first and second fields corresponding to the plurality of first and second scan signals, and the plurality of frames are arranged in the order of the plurality of first scan signals during the first field. Supplying a light emission data voltage to each of the plurality of light emitting pixels for a period corresponding to the first divided dimming data; Supplying a light emitting data voltage to each of the plurality of light emitting pixels during a period corresponding to the plurality of second divided dimming data in the order of the plurality of second scanning signals during the second field; During the first field, alternatingly applying the plurality of second scan signals of the previous frame and the plurality of first scan signals of the current frame; And During the second field, the plurality of first and second scan signals of the current frame are alternately applied. A method of driving a light emitting device further comprising.

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