KR20080070444A - Liquid crystal display device - Google Patents

Abstract

A liquid crystal display device is provided to improve image quality by minimizing common voltage unbalance between the upward area and the downward area of a thin film transistor which is caused by internal resistance of the thin film transistor. A liquid crystal display device includes a first common voltage pad(150), a second voltage pad(160) and plural common voltage lines(120). The first common voltage pad is configured such that it is extended from an upper side to a lower side of a thin film transistor substrate(100) at the left edge of the thin film transistor substrate. The second common voltage pad is configured such that it is extended from an upper side to a lower side of the thin film transistor substrate at the right edge of the thin film transistor substrate, then bent at the lower side, and again extended to the upper side.

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY DEVICE}

1A and 1B are views for explaining a conventional liquid crystal display device.

2 is a view for explaining a liquid crystal display device according to the present invention;

3 is a view for explaining the structure of a second common voltage pad according to the present invention;

4 and 5 are diagrams for explaining the flow of a common voltage.

Explanation of Signs of Major Parts of Drawings

100: thin film transistor substrate 110: gate wiring

120: common voltage line 130: data wiring

140: contact hole 150: the first common voltage pad

160: second common voltage pad 161: second main common pad

162: pad connection portion 163: second sub common voltage pad

170: gate driver 180: data driver

185: connection wiring 190: drive circuit

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of improving image quality by minimizing flicker and afterimages.

Recently, many flat panel display devices such as liquid crystal display devices (PDPs), plasma display panels (PDPs), organic light emitting diodes (OLEDs), and electrophoretic indication displays have been developed in place of conventional CRTs. It is becoming.

Among such flat panel displays, liquid crystal displays have a thinner, lighter weight, and lower power consumption than CRTs.

In general, a liquid crystal display device is an apparatus for controlling an arrangement state of liquid crystals by changing an electric field generated by a potential difference between electrodes facing each other, and forming an image by adjusting light transmittance according to the arrangement state of liquid crystals. The liquid crystal display includes a liquid crystal panel including a color filter substrate on which a color filter is formed, a thin film transistor substrate on which a thin film transistor is formed, and a liquid crystal layer positioned between the color filter substrate and the thin film transistor substrate.

Here, the thin film transistor substrate 1 has a gate wiring 2 and a data wiring 3 formed to cross each other, as shown in Fig. 1A. The gate wiring 2 generally includes a gate line 2a extending in the horizontal direction and a gate pad 2b formed at an end of the gate line 2a. The data line 3 includes a data line 3a extending in the vertical direction and a data pad 3b formed at the end of the data line 3a. An area where the gate line 2a and the data line 3a cross each other is a display area a in which an image is implemented, and the other area is a non-display area b. The gate pad 2b and the data pad 3b are positioned in the non-display area b.

The common voltage pad 4 is formed in the non-display area b. The common voltage pad 4 is provided adjacent to the data pad 3b located at an outer side thereof and extends to the lower region of the thin film transistor substrate 1. The common voltage pads 4 are connected to each other in the non-display area b of the lower region of the thin film transistor substrate 1. In addition, the thin film transistor substrate 1 is provided with a common voltage line 5 connected to the common voltage pad 4 and extending along the gate line 2a. The common voltage pad 4 receives a common voltage Vcom from a driving circuit unit (not shown) and supplies a common voltage to each common voltage line 5. As shown in FIG. 1B, the common voltage Vcom is applied from the upper region of the thin film transistor substrate 1 toward the lower region along the common voltage pad 4.

However, due to the internal resistance of the common voltage pad 4 itself or the like, as shown in FIG. 1B, the common voltage in the upper region of the thin film transistor substrate 1 is large, but is lowered to the lower region of the thin film transistor substrate 1. Increasingly, the magnitude of the common voltage decreases. Accordingly, common voltage imbalances with different magnitudes of the common voltage applied to the common voltage line 5 may occur in the upper region and the lower region of the thin film transistor substrate 1. Due to such a common voltage imbalance, an image quality defect such as afterimage or flicker may occur.

Accordingly, an object of the present invention is to provide a liquid crystal display device capable of improving image quality by minimizing flicker and afterimages.

According to the present invention, a liquid crystal display device comprising a thin film transistor substrate comprising four sides of a left side and a right side and an upper side and a lower side facing each other, wherein the first common voltage is formed at the left edge of the thin film transistor substrate. A pad; A second common voltage pad formed at a right edge of the thin film transistor substrate; A plurality of common voltage lines connecting between the first common voltage pad and the second common voltage pad, wherein the first common voltage pad extends from an upper side to a lower side of the thin film transistor substrate, and the second common voltage pad is a thin film transistor substrate. It is achieved by a liquid crystal display device, characterized in that it extends from the upper side to the lower side of the upper side of the lower side and is bent from the lower side to extend upward.

The second common voltage pad may include a second main common voltage pad and a second sub common voltage pad formed side by side to be spaced apart from each other, and a pad connection portion connecting the second main common voltage pad and the second sub common voltage pad to each other. The pad connection part may be formed under the thin film transistor substrate, and may be bent at an end portion of the second main common voltage pad in a direction in which the first common voltage pad is located to be connected to an end of the second sub common voltage pad. have.

The common voltage line may be connected between the second sub common voltage pad and the first common voltage pad.

In addition, the thin film transistor substrate may be divided into a display area in which an image is formed and a non-display area other than the thin film transistor, and the first common voltage pad and the second common voltage pad may be formed in the non-display area of the thin film transistor substrate.

A data driver connected to an upper side of the thin film transistor substrate; A gate driver connected to a left side of the thin film transistor substrate; The display device may further include a driving circuit unit connected to the other side of the data driver, which is not connected to the thin film transistor substrate.

In addition, the first common voltage pad and the second common voltage pad may receive a common voltage from the driving circuit unit through the data driver.

In addition, the data driver may include a connection wiring for transferring the common voltage supplied from the driving circuit unit to the first and second common voltage pads, and the connection wiring may be connected to each of the first common voltage pad and the second main common voltage pad. Can be.

Here, a common voltage having the same magnitude is applied to the first common voltage pad and the second common voltage pad, and the width of the second common voltage pad may be greater than the width of the first common voltage pad.

In the display area of the thin film transistor substrate, a plurality of gate lines and data lines are formed to cross each other and define a plurality of pixel areas. The common voltage line is formed on the same layer at the same time as the gate lines, and the first and second common lines The voltage pads may be formed on the same layer as the data line.

In addition, a plurality of gate lines and data lines are formed in the display area of the thin film transistor substrate so as to cross each other and define a plurality of pixel areas. The common voltage line and the second common voltage pad are formed on the same layer as the gate line. The first common voltage pad may be formed on the same layer as the data line.

Hereinafter, a liquid crystal display according to the present invention will be described with reference to the drawings. Meanwhile, in the following description, the thin film transistor substrate constituting the liquid crystal display device will be described. The other components, which are not described, are the same as those of the known liquid crystal display device.

2 is a view for explaining a thin film transistor substrate according to the present invention, Figure 3 is a view for explaining the structure of a second common voltage pad according to the present invention.

The thin film transistor substrate 100 is a substantially rectangular plate having four sides of an upper side, a lower side, and a left side and a right side. In general, as shown in FIG. 2, the thin film transistor substrate 100 is divided into a display area D in which an image is formed and a non-display area N other than the thin film transistor substrate 100.

The thin film transistor substrate 100 includes a plurality of gate lines 110 extending in a horizontal direction, a common voltage line 120 formed in parallel with the gate lines 110, and a pixel crossing the gate lines 110. A plurality of data lines 130 defining an area, a thin film transistor (not shown) formed at an intersection point of the gate line 110 and the data line 130, and a thin film transistor (TFT) formed in the pixel area. ) And a pixel electrode (not shown) connected thereto are formed.

In general, the gate wiring 110 is formed in a horizontal direction, and specifically, extends from the left side to the right side of the thin film transistor substrate 100. The gate line 110 extends from the left non-display area N of the thin film transistor substrate 100 to the display area D. FIG. The gate line 110 includes a plurality of gate lines 111 extending in the horizontal direction and a gate pad 112 connected to the ends of the gate lines 111 to receive a gate signal from the outside and to transfer the gate signals to the gate lines 111. Include. In the display area D, the gate lines 111 are formed to be spaced apart from each other at regular intervals and are formed in a form in which the mutual gap gradually narrows in the left non-display area N. FIG. The gate pad 112 is integrally formed with the gate line 111 at the end of the gate line 111, and is formed to have a larger width than the gate line 111.

The common voltage line 120 is formed on the same layer as the gate line 110. The common voltage line 120 is formed to be parallel to the gate line 111, and extends from the non-display area N on the left side of the thin film transistor substrate 100 to the non-display area N on the right side. The common voltage line pad 121 is formed at an end portion of the common voltage line 120 extending to the left non-display area N. FIG. The common voltage line pad 121 is connected to the first common voltage pad 150 to be described later through the contact hole 140. In general, the common voltage line 120 and the common voltage line pad 121 are formed of the same material as the gate line 110. The common voltage line 120 according to the present invention connects the first common voltage pad 150 and the second common voltage pad 160 to be described later. Specifically, as shown in FIG. 3, the common voltage line 120 connects between the first common voltage pad 150 and the second sub common voltage pad 163.

The data line 130 is formed to intersect the gate line 110 and the common voltage line 120. In detail, the data line 130 extends from the upper side to the lower side of the thin film transistor substrate 100 and crosses the gate line 110 to define a pixel area. The data line 130 extends from the upper non-display area N of the thin film transistor substrate 100 to the display area D. FIG. The data line 130 includes a data line 131 extending in the vertical direction and a data pad 132 connected to one end of the data line 131 to receive an image signal from the outside. In the display area D, the data lines 131 are formed to be spaced apart from each other at regular intervals, and the data lines 131 are formed in the upper non-display area N so as to gradually narrow. The data pad 132 is formed integrally with the data line 131 at the end of the data line 131, and is formed to have a larger width than the data line 131.

In the non-display area N, a first common voltage pad 150 and a second common voltage pad 160 are formed.

The first common voltage pad 150 extends from the upper side to the lower side of the thin film transistor substrate 100 at the left edge of the thin film transistor substrate 100. As illustrated in FIG. 2, the first common voltage pad 150 is provided adjacent to the data pad 132 having one end positioned at an outer side of the left side. The first common voltage pad 150 is bent from one end of the first common voltage pad 150 and extends downward from the thin film transistor substrate 100 to overlap the common voltage line pad 121. One end of the first common voltage pad 150 is provided adjacent to the data pad 131. As shown in FIG. 4, the common voltage is applied from the driving circuit unit 190 through the data driver 180. It is for. This will be described in detail in the paragraph describing the data driver 180. The first common voltage pad 150 according to the present invention is formed of the same material as the data line 130 and is simultaneously formed on the same layer.

As shown in FIGS. 2 and 3, the second common voltage pad 160 includes a second main common voltage pad 161 and a second main voltage pad 161 which are formed to be spaced apart from each other at the right edge of the thin film transistor substrate 100. The sub common voltage pad 163 and a pad connection unit 162 connecting between the second main common voltage pad 161 and the second sub common voltage pad 163. The second main common voltage pad 161 is provided outside the right non-display area of the thin film transistor substrate 100, and the second sub common voltage pad 163 is disposed in the right non-display area of the thin film transistor substrate 100. It is provided on the inside. Here, one end of the second main common voltage pad 161 is provided adjacent to the data pad 132 whose one end is located at the outer side of the right side as shown in FIGS. 2 and 3. One end of the second main common voltage pad 161 is provided adjacent to the data pad 131. As shown in FIG. 4, a common voltage is applied from the driving circuit unit 190 through the data driver 180. It is to receive. The pad connector 162 is bent in the right direction from the other end of the second main common voltage pad 161 formed under the thin film transistor substrate 100 and connected to the other end of the second sub common voltage pad 163. . That is, the pad connection unit 162 connects an end portion of the second main common voltage pad 161 and the second sub common voltage pad 163 positioned below. As a result, the second common voltage pad 160 is formed to have a shape substantially like 'U', which extends from the upper side to the lower side of the thin film transistor substrate 100 and is bent from the lower side to extend upward.

The width d1 of the second common voltage pad 160 is greater than the width d2 of the first common voltage pad 150. This is to uniformly set the magnitude of the common voltage applied to each pixel region and to match the supply speed of the common voltage applied to each common voltage line 120. Specifically, as shown in FIG. 2, the length of the second common voltage pad 160 is longer than that of the first common voltage pad 150. As the length of the second common voltage pad 160 increases, the internal resistance of the second common voltage pad 160 is greater than the internal resistance of the first common voltage pad 150. Accordingly, the speed at which the common voltage applied to the second common voltage pad 160 is supplied to the common voltage line 120 is slower than the common voltage applied to the first common voltage pad 150, and the same common voltage line 120 is applied. The magnitudes of the common voltages applied to the?) Are different from each other in the left and right directions or in the up and down directions. In order to solve such a problem, in the present invention, the width d1 of the second common voltage pad 160 is made larger than the width d2 of the first common voltage pad 150 so that the second common voltage pad 160 is formed. Reduced the resistance. Accordingly, the problem of nonuniformity of the common voltage is minimized.

Particularly, in the present invention, as shown in FIGS. 4 and 5, the common voltage applied to the common voltage line 120 through the first common voltage pad 150 moves downward from the upper side of the thin film transistor substrate 100. The common voltage applied to the common voltage line 120 through the second common voltage pad 160 flows from the lower side to the upper side of the thin film transistor substrate 100. Accordingly, common voltage imbalances having different magnitudes of the common voltage applied to the common voltage line 120 in the upper region and the lower region of the thin film transistor substrate 100 are minimized. That is, as shown in FIG. 5, a small common voltage is applied to the common voltage line 120 to the first common voltage pad 150 among the upper regions of the thin film transistor substrate 100, but the second common voltage pad 160 is applied to the first common voltage pad 150. ), A large common voltage is applied to the common voltage line. In addition, a large common voltage is applied to the common voltage line 120 to the first common voltage pad 150 in the lower region of the thin film transistor substrate 100, but a small common voltage is applied to the second common voltage pad 160. This common voltage line is applied. Accordingly, the magnitude of the common voltage applied to the common voltage line 120 in the upper region and the lower region of the thin film transistor substrate 100 is uniform, resulting in a common voltage that may occur in the upper region and the lower region of the thin film transistor substrate 100. The imbalance of is minimized to reduce image quality defects such as afterimages and flickers.

Here, the second common voltage pad 160 is formed on the same layer as the gate line 110 and made of the same material at the same time. In this case, the second common voltage pad 160 may be provided integrally with the common voltage line 120. In contrast, the second common voltage pad 160 may be simultaneously formed of the same material on the same layer as the data line 130. In this case, the second common voltage pad 160 is connected to the common voltage line 120 through a contact hole (not shown).

In the non-display area N, the gate driver 170 is connected to the left side of the thin film transistor substrate 100, and the data driver 180 is connected to the upper side thereof. The driving circuit unit 190 is connected to the other side of the data driver 180 that is not connected to the thin film transistor substrate 100.

As illustrated in FIG. 2, each of the gate driver 170 and the data driver 180 is a driving chip mounted on the flexible printed circuit boards FPC 171 and 181 and the flexible printed circuit boards 171 and 181. (172, 182). The flexible printed circuit boards 171 and 181 are provided with a plurality of circuit patterns for connecting the bumps of the driving chips 172 and 182 and the gate pad 112 or the data pad 132. Here, the data driver 180 positioned on the right and the left side of the data drivers 180 includes a connection wiring 185. That is, the flexible printed circuit board 181 constituting the data driver 180 positioned at the left and right sides thereof may be disposed between the first common voltage pad 150 or the second common voltage pad 160 and the driving circuit unit 190. Connection wiring 185 for connecting is further provided. As shown in FIG. 4, the first common voltage pad 150 and the second main common voltage pad 161 apply the common voltage Vcom generated by the driving circuit unit 190 through the connection wiring 185. Receive. One side of the flexible circuit board 181 constituting the data driver 180 is connected to the thin film transistor substrate 100, and the other side thereof is connected to the driving circuit unit 190. The illustrated gate driver 170 and the data driver 180 represent a chip on film (COF) method, and other known methods such as a taper carrier package (TCP) and a chip on glass (COG) may be used. In addition, the gate driving chip 172 and the data driving chip 182 may be directly mounted on the edge of the thin film transistor substrate 110.

The driving circuit unit 190 generates various signals to be applied to the gate wiring 110, the common voltage line 120, and the data wiring 130. In detail, the driving circuit unit 190 supplies a gate signal such as a gate high voltage and a gate low voltage to the gate line 110, and supplies a common voltage Vcom to the common voltage line 120. ) And an image signal such as a gray scale voltage of the data line 130. Then, a plurality of control signals for controlling these signals are generated and applied to the respective driving chips 172 and 182.

Although some embodiments of the invention have been shown and described, it will be apparent to those skilled in the art that modifications may be made to the embodiment without departing from the spirit or spirit of the invention. . It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.

As described above, according to the present invention, a liquid crystal display device capable of improving image quality by minimizing flicker and afterimage is provided.

Claims (10)

In the liquid crystal display device comprising a thin film transistor substrate consisting of four sides of the left and right and the upper and lower sides facing each other, A first common voltage pad formed at a left edge of the thin film transistor substrate; A second common voltage pad formed at a right edge of the thin film transistor substrate; A plurality of common voltage lines connecting between the first common voltage pad and the second common voltage pad; The first common voltage pad extends from an upper side to a lower side of the thin film transistor substrate. And the second common voltage pad extends from an upper side to a lower side of the thin film transistor substrate, is bent from a lower side, and extends upward. The method of claim 1, The second common voltage pad may be spaced apart from each other to form a second main common voltage pad and a second sub common voltage pad, and a pad connection portion connecting the second main common voltage pad and the second sub common voltage pad. Including; The pad connection part is formed under the thin film transistor substrate, and is bent from an end of the second main common voltage pad in a direction in which the first common voltage pad is positioned to be connected to an end of the second sub common voltage pad. There is a liquid crystal display device. The method of claim 2, And the common voltage line is connected between the second sub common voltage pad and the first common voltage pad. The method of claim 1, The thin film transistor substrate is divided into a display area where an image is formed and a non-display area other than that. And the first common voltage pad and the second common voltage pad are formed in a non-display area of the thin film transistor substrate. The method of claim 2, A data driver connected to an upper side of the thin film transistor substrate; A gate driver connected to a left side of the thin film transistor substrate; And a driving circuit unit connected to the other side of the data driver, which is not connected to the thin film transistor substrate. The method of claim 5, And the first common voltage pad and the second common voltage pad receive a common voltage from the driving circuit unit through the data driver. The method of claim 6, The data driver includes a connection wiring for transferring the common voltage supplied from the driving circuit unit to the first and second common voltage pads. And the connection line is connected to each of the first common voltage pad and the second main common voltage pad. The method of claim 1, The common voltage of the same magnitude is applied to the first common voltage pad and the second common voltage pad, The width of the second common voltage pad is larger than the width of the first common voltage pad. The method of claim 1, A plurality of gate lines and data lines are formed in the display area of the thin film transistor substrate so as to cross each other and define a plurality of pixel areas. And the common voltage line is formed on the same layer as the gate line, and the first and second common voltage pads are formed on the same layer as the data line. The method of claim 1, A plurality of gate lines and data lines are formed in the display area of the thin film transistor substrate so as to cross each other and define a plurality of pixel areas. And the common voltage line and the second common voltage pad are formed on the same layer as the gate line, and the first common voltage pad is formed on the same layer as the data line.

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