KR20080062918A - Liquid crystal display device and method for fabricating the same - Google Patents

Abstract

An LCD(Liquid Crystal Display) device and a manufacturing method thereof are provided to solve a TCP(Tape Carrier Package) repair problem structurally generated when applying an organic insulating layer structure and a four mask process. On a substrate(101), a display area and a non-display area are defined. A gate line is formed on the substrate, and passes the display area. A gate pad(103b) and a data pad(103c) are disposed on the non-display area. A data line(111) defines a pixel area by being formed on the substrate as vertically crossing the gate line, and is connected to the data pad. A TFT(Thin Film Transistor) is formed on the substrate where the gate line and the data line cross each other, and configured with a gate electrode(103a), a source electrode(111a), a drain electrode(111b) and a semiconductor layer pattern(107). An organic insulating layer pattern is formed on the TFT and the pixel area. A gate pad terminal(119a) and a data pad terminal(119b) are respectively connected to the gate pad and the data pad. A pixel electrode(119) is formed on the organic insulating layer pattern and connected with the drain electrode of the TFT.

Description

Liquid crystal display device and manufacturing method thereof {LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR FABRICATING THE SAME}

1 is an enlarged plan view schematically illustrating some pixels of a general liquid crystal display device;

2A to 2J are process cross-sectional views showing a cross section corresponding to one pixel portion of a liquid crystal display device according to the prior art;

3A is a plan view of a data pad portion of one pixel portion of a liquid crystal display device according to the prior art;

FIG. 3B is an enlarged cross-sectional view taken along line IIIb-IIIb of FIG. 3A, and is an enlarged cross-sectional view showing a structure in which an ITO metal line is connected to a side of a data line;

FIG. 4 is a SEM photograph showing that the ITO metal line is damaged during the four-mask process and the application of the photoacryl film in the data pad part in the liquid crystal display device according to the related art.

5 is an enlarged plan view schematically showing some pixels of a liquid crystal display according to the present invention;

6A to 6J are cross-sectional views illustrating a cross section corresponding to one pixel portion of a liquid crystal display according to the present invention;

7 is a plan view of a gate pad portion of one pixel portion of a liquid crystal display device according to the present invention;

8A to 8H are enlarged cross-sectional views taken along the line VII-VII of FIG. 7, which is a cross-sectional view showing a manufacturing process of a gate pad portion of one pixel portion;

9 is a plan view of a data pad portion of one pixel portion of a liquid crystal display according to the present invention;

10A to 10H are enlarged cross-sectional views taken along the line VII-VII of FIG. 9, which is a cross-sectional view showing a manufacturing process of a data pad unit of one pixel unit;

FIG. 11 is a SEM photograph showing that in the liquid crystal display device according to the present invention, the ITO metal line is not damaged when the photoacrylic film is not applied to the 4 mask process and the data pad part. FIG.

Explanation of symbols on the main parts of the drawings

101 substrate 103 gate wiring

103a: gate electrode 103b: gate pad

103c: data pad 103d: capacitor lower electrode

105: gate insulating film 107: semiconductor layer

109: conductive metal layer 111: data wiring

111a: source electrode 111b: drain electrode

111c and 111d: conductive metal layer pattern 111e: capacitor upper electrode

113: protective film 115a: photoacrylic film pattern

117a, 117b, 117c: 1, 2, 3, 4, 5 contact holes

119: pixel electrode 119a: gate pad terminal 119b: data pad terminal

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method of manufacturing the same, and more particularly, to a liquid crystal display device that can fundamentally solve a TCP repair (tape carrier package repair) problem that occurs when the organic insulating film structure and the four mask process are applied. And to a method for producing the same.

In general, liquid crystal displays utilize the optical anisotropy and polarization properties of liquid crystals. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, so that the direction of the molecular arrangement can be controlled by applying an electric field to the liquid crystal artificially.

Accordingly, in the liquid crystal display device, if the molecular alignment direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal by optical anisotropy to express image information.

Currently, the active matrix liquid crystal display (AM-LCD) in which the aforementioned thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner is attracting the most attention due to its excellent resolution and ability to implement video.

In general, a liquid crystal display panel has two substrates in which various kinds of elements are formed to correspond to each other, and a liquid crystal layer is sandwiched between the two substrates.

The liquid crystal display panel includes an upper substrate on which a color filter expressing color is formed and a lower substrate on which a switching circuit capable of converting the molecular arrangement direction of the liquid crystal layer is incorporated.

Here, a color filter layer for implementing color is formed on the upper substrate, and a common electrode covering the color filter layer is formed. The common electrode serves as one electrode for applying a voltage to the liquid crystal.

The lower substrate includes a thin film transistor serving as a switch and a pixel electrode serving as another electrode receiving a signal from the thin film transistor and applying a voltage to the liquid crystal. In this case, the portion where the pixel electrode is formed is called a pixel region.

In order to prevent leakage current of the liquid crystal formed between the upper substrate and the lower substrate, a sealant is sealed at the edges of the upper substrate and the lower substrate.

In the lower substrate, a plurality of pixel electrodes connected to the plurality of thin film transistors are arranged along with a plurality of thin film transistors.

Referring to FIG. 1, the structure of a liquid crystal display device according to the related art, which is configured as described above, is as follows.

1 is an enlarged plan view schematically illustrating some pixels of a general liquid crystal display device.

Referring to FIG. 1, a liquid crystal display array substrate 11 according to the related art includes a plurality of gate lines 13 formed in one direction and a plurality of gate regions 13 perpendicular to the gate lines 13 to define a pixel area. The data wiring 21 is formed.

Gate pads 13b and data pads 21c for receiving external signals are formed at predetermined ends of the gate line 13 and the data line 21, respectively.

The gate line 13 is connected to the gate pad 13b and the data line 21 is connected to the data pad 21c.

A thin film transistor including a gate electrode 13a, a source electrode 21a, a drain electrode 21b, and an active channel is positioned at a point where the two wires cross each other, and the pixel connected to the drain electrode 21c is disposed on the pixel area. The electrode 29 is formed.

Although not shown in the drawing, a sub-color filter of red, green, and blue is formed in each pixel area on a color filter substrate (not shown) disposed spaced apart from the array substrate 11 by a predetermined interval. A black matrix (not shown) composed of an opaque resin is formed between the color filters.

The black matrix is disposed on the gate line 13, the data line 21, and the thin film transistor in the pixel portion where the pixel electrode 29 is positioned, and the gate connection line, which is a non-display area, and the black matrix. It is also formed in the area where the data connection wiring is located.

A method of manufacturing a liquid crystal display device according to the related art having the above configuration will be described below with reference to FIGS. 2A to 2J.

2A to 2J are process cross-sectional views showing a cross section corresponding to one pixel portion of a liquid crystal display device according to the prior art.

Here, the AA part is a cutting surface for showing the cross section of the gate pad portion, the BB part is a cutting surface for showing the cross section of the data pad portion, the CC portion is a cutting surface for showing the cross section of the source / drain electrodes on the gate electrode, the DD portion is a pixel A cut surface for showing the cross section of the electrode portion, EE portion is a cut surface for showing the coupling cross section between the capacitor upper electrode and the pixel electrode, the FF portion is a cut surface for showing the data wiring cross section.

Referring to FIG. 2A, a metal material is deposited on a transparent glass substrate 11 and selectively patterned to form a gate wiring (not shown, 13 in FIG. 1), a gate electrode 13a, a gate pad 13b, and a lower part of a capacitor. The electrode 13c is formed.

Next, referring to FIG. 2B, a gate insulating material is deposited on a glass substrate 11 including the gate wiring, the gate electrode 13a, the gate electrode 13b, and the capacitor lower electrode 13c. To form.

Next, referring to FIG. 2C, an amorphous silicon is deposited on the gate insulating layer 15 to form a semiconductor layer 17.

Next, referring to FIG. 2D, a metal material layer 19 is deposited on the semiconductor layer 17 to form a source / drain electrode and a data wiring.

Subsequently, referring to FIG. 2E, the metal material layer 19 is selectively patterned to form data wirings (not shown; 21 in FIG. 1), source / drain electrodes 21a and 21b, data pads 21c, and capacitors. The electrode 21d is formed. In this case, the semiconductor layer 17 is also selectively patterned when the metal material layer 19 is patterned. In addition, the drain electrode 21b is connected to the capacitor upper electrode 21d by the same metal material layer.

Next, referring to FIG. 2F, an insulating material is deposited on the entire glass substrate 11 including the data line 21, the source / drain electrodes 21a and 21b, and the capacitor upper electrode 21d to form a protective film 23. Form.

Subsequently, referring to FIG. 2G, a photoacryl layer 25 (PAC; photo acryl coating), which is a photosensitive material, is thickly coated on the protective film 23. At this time, since the photoacryl layer 25 is itself a photosensitive material, it is not necessary to apply a separate photosensitive material to form a desired pattern.

Next, referring to FIG. 2H, a portion of the passivation layer 23 on the gate pad 13b and the data pad 21c may be selectively dry-etched by using a pattern mask (not shown). A photoacrylic layer pattern 25a exposing a portion of the passivation layer 23 positioned on the capacitor upper electrode 21d is formed.

2I, a portion of the passivation layer 23, the data pad 21c and the capacitor upper electrode 21d may be selectively removed using the photoacrylic layer pattern 25a as a mask to form an upper portion of the gate pad 13b. And first, second, and third contact holes 27a, 27b, and 27c exposing portions of the gate insulating layer 15 under the data pad 21 and portions of the semiconductor layer 17 under the capacitor upper electrode 21d, respectively. Form.

Next, referring to FIG. 2J, an ITO layer (not shown), which is a transparent conductive material, is deposited on the photoacrylic layer patterns 25a including the first, second, and third contact holes 27a, 27b, and 27c.

Subsequently, the ITO layer is selectively patterned to electrically connect the gate pad 13b, the data pad 21c, and the capacitor upper electrode 21d through the first, second, and third contact holes 27a, 27b, and 27c, respectively. The gate pad terminal 29a, the data pad terminal 29b, and the pixel electrode 29 connected to each other are formed.

In this case, the photoacrylic layer 25 is present in the gate pad 13b and the data pad 21c when the tape carrier package (TCP) repair is performed after the pixel electrode 29 is formed. Damage is generated in the ITO layer constituting the device is less reliable device.

Meanwhile, a structure of a data pad unit of one pixel unit of the liquid crystal display device according to the related art manufactured as described above will be described with reference to FIGS. 3A and 3B.

FIG. 3A is a plan view of a data pad portion of a pixel portion of a liquid crystal display device according to the related art, and FIG. 3B is an enlarged cross-sectional view taken along line IIIb-IIIb of FIG. 3A, showing a structure in which an ITO metal line is in contact with both sides of the data line. It is an enlarged cross section.

Referring to FIGS. 3A and 3B, a gate insulating film 15 is formed on an insulating glass substrate 11 and a data pad part of a liquid crystal display device according to the related art is formed on the insulating layer 15. 17 is formed, and a protective film 23 and a photoacrylic film pattern 25a are formed on the glass substrate 11 including the semiconductor layer pattern 17 and the data pad 21c.

In addition, a data pad contact hole 27b exposing a portion of the semiconductor layer pattern 17 under the data pad 21c is formed in the photoacrylic pattern 25a and the passivation layer 23. In this case, the data pad contact hole 27b is formed by over-etching a part of the data pad 21c.

The data pad terminal 29b is formed on the photoacrylic layer pattern 25a to be in contact with the side surface of the data pad 21c through the data pad contact hole 27b.

When the photoacrylic film is applied to the data pad unit along with the 4 mask process as described above, the photoacrylic film is removed during TCP repair, and the ITO metal line is damaged as shown in FIG. 4. That is, as shown in Figure 4, it can be seen that the damage line (damage line) appears in the ITO metal layer constituting the data pad terminal.

In the case of the liquid crystal display device according to the related art configured as described above, in order to enable the four mask process while using the organic insulating film, that is, the photoacrylic film, the TCP repair reliability, that is, high temperature driving and high temperature and high humidity driving failure must be solved.

In order to solve this problem, there should be essentially no organic insulating film (for example, a photoacryl film) in the pad portion, that is, the bonding portion of the panel and the TCP.

However, in the absence of an organic insulating film, that is, a photoacrylic film, metals of the pad portion are exposed in a dry etch process, and a failure in electrolysis is expected in the subsequent process.

 As described above, the liquid crystal display device and its manufacturing method according to the prior art have the following problems.

In the liquid crystal display device and the method of manufacturing the same according to the prior art, the photoacrylic film is present in the gate pad part and the data pad part so that there is a step difference, thereby causing ITO damage during the TCP repair process, resulting in poor reliability of the device. Brings about.

In particular, the liquid crystal display device according to the related art and its manufacturing method apply a photoacrylic film to the pad portion along with a four mask process, thereby causing damage to the ITO metal by removing the photoacrylic film during TCP repair.

Accordingly, an object of the present invention is to solve the problems of the prior art, and an object of the present invention is to reduce the damage of ITO metal that is structurally generated when an organic insulating film is applied, thereby improving the reliability of the device. The present invention provides a device and a method of manufacturing the same.

Another object of the present invention is to provide a liquid crystal display device and a method of manufacturing the same, which can prevent a metal from being exposed during a dry etching process after forming an organic insulating layer.

According to an aspect of the present invention, a liquid crystal display device includes: a substrate defined by a display area and a non-display area; A gate wiring formed on the substrate and passing through the display area, and a gate pad and a data pad disposed in the non-display area; A data line formed on the substrate so as to vertically cross the gate line to define a pixel area, and connected to the data pad; A thin film transistor formed on the substrate crossing the gate line and the data line, the thin film transistor comprising a gate electrode, a source electrode, a drain electrode, and a semiconductor layer pattern; An organic insulating pattern formed on the thin film transistor and the pixel region; A gate pad terminal and a data pad terminal in contact with the gate pad and the data pad, respectively; And a pixel electrode formed on the organic insulating film pattern and connected to the drain electrode of the thin film transistor.

According to an aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, the method including: providing a substrate defined by a display area and a non-display area; Forming gate wirings passing through the display area on the substrate, gate pads and data pads disposed in the non-display area; Forming a pixel area on the substrate to be perpendicularly intersected with the gate line to define a pixel area, and to form a data line connected to the data pad; Forming a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer pattern on a substrate crossing the gate line and the data line; Forming an organic insulating pattern on the thin film transistor and the pixel region; Forming a gate pad terminal and a data pad terminal in contact with the gate pad and the data pad, respectively; And

And forming a pixel electrode connected to the drain electrode of the thin film transistor on the organic insulating layer pattern.

Hereinafter, a structure of a liquid crystal display device according to the present invention will be described in detail with reference to the accompanying drawings.

5 is an enlarged plan view schematically illustrating some pixels of a liquid crystal display according to the present invention.

Referring to FIG. 5, an array substrate for a liquid crystal display device (101 in FIG. 6A) according to the present invention defines a pixel region by crossing a plurality of gate lines 103 formed in one direction and perpendicularly to the gate lines 103. A plurality of data wirings 111 are formed.

Gate pads 103b and data pads 103c for receiving an external signal are formed at predetermined ends of the gate line 103 and the data line 111, respectively.

The gate pad 103b is connected to the gate line 103 through a gate connection line (not shown) extending from the gate line 103, and the data pad 103c is connected to the data line 111. It is connected to the data line 111 through a data connection line (not shown) extending from.

A thin film transistor including a gate electrode 103a, a source electrode 111a, a drain electrode 111b, and an active channel is positioned at the point where the two wires cross each other, and the pixel connected to the drain electrode 111b is disposed on the pixel area. The electrode 119 is formed.

Although not shown in the drawing, a sub color filter of red, green, and blue is formed in each pixel area on a color filter substrate (not shown) disposed spaced apart from the array substrate 101 by a predetermined interval. A black matrix (not shown) composed of an opaque resin is formed between the color filters.

The black matrix is positioned on the gate line 103, the data line 111, and the thin film transistor in the pixel portion where the pixel electrode 119 is positioned, and the gate connection line, which is a non-display area, and the black matrix. It is also formed in the area where the data connection wiring is located.

A method of manufacturing a liquid crystal display device according to the present invention having the above configuration will be described below with reference to FIGS. 6A to 6J.

6A through 6J are cross-sectional views illustrating a cross section corresponding to one pixel part of the liquid crystal display according to the present invention.

Here, the AA part is a cutting surface for showing the cross section of the gate pad portion, the BB part is a cutting surface for showing the cross section of the data pad portion, the CC portion is a cutting surface for showing the cross section of the source / drain electrodes on the gate electrode, the DD portion is a pixel A cut surface for showing the cross section of the electrode portion, EE portion is a cut surface for showing the coupling cross section between the capacitor upper electrode and the pixel electrode, the FF portion is a cut surface for showing the data wiring cross section.

Referring to FIG. 6A, first, a conductive metal including aluminum (Al), aluminum alloy (AlNd), chromium (Cr), tungsten (W), molybdenum (Mo), copper (Cu), and the like on a transparent substrate 101. Deposit one selected from the group.

Next, a photosensitive material is coated on the conductive metal layer (not shown) to proceed with the first mask process, and the patterned photosensitive material layer is selectively patterned through an exposure and development process using a photolithography process technology to form a first photoresist pattern. (Not shown) is formed.

Subsequently, the conductive material layer is selectively patterned using the first photoresist pattern (not shown) as a mask, thereby forming a plurality of gate wirings (not shown) in one direction, a plurality of gate electrodes 103a and gate pads protruding from the gate wirings. 103b, the data pad 103c and the capacitor lower electrode 103d are formed.

In this case, the gate line (not shown) includes a gate line passing through a display area, a gate pad 103a positioned at an outer portion of the display area and receiving a signal from the outside, the gate line (not shown) and the gate pad. A gate connection wiring (not shown) connecting the 103a is formed.

Next, referring to FIG. 6B, after removing the first photoresist pattern (not shown), an inorganic insulating material group composed of silicon oxide film (SiO ₂ ) or the like may be formed on the entire surface of the substrate 101 including the gate wiring and the like. Is deposited or coated one selected from an organic insulating material consisting of benzocyclobutene (Benzocyclobutene) and acrylic resin (resin), to form a gate insulating film 105.

Subsequently, referring to FIG. 6C, a semiconductor layer 107 is formed by stacking amorphous silicon (a-Si) and impurity amorphous silicon (n + a-Si: H; not shown) on the gate insulating layer.

In this stack structure, the lower pure amorphous silicon layer becomes an active channel later, and the impurity amorphous silicon layer becomes an ohmic contact layer for lowering the resistance between the active layer and the subsequent metal wiring.

Next, referring to FIG. 6D, the conductive metal group as described above on the entire surface of the substrate 101 on which the semiconductor layer 107 is formed, for example, aluminum (Al), aluminum alloy (AlNd), chromium (Cr), A conductive metal layer 109 is formed by depositing a metal selected from the group of conductive metals including tungsten (W), molybdenum (Mo), copper (Cu), and the like.

Subsequently, in order to proceed with the second mask process, a photosensitive material is coated on the conductive metal layer 109, and the photosensitive material layer is selectively patterned through an exposure and development process using a photolithography process technology to form a second photoresist pattern ( Not shown).

Next, referring to FIG. 6E, the conductive metal layer 109 is selectively patterned using the second photoresist layer pattern (not shown) as a mask to vertically cross the gate wiring to define a pixel area to define a pixel region. And a source electrode 111a protruding from one side of the gate electrode 103a on the data line 111, a drain electrode 111b spaced apart from the source electrode 111a by a predetermined distance, and a capacitor upper electrode 111e. To form.

At this time, conductive metal layer patterns 111c and 111d are formed on the gate pad 103b and the data pad 103c, respectively. In addition, each of the conductive metal layer patterns 111c and 111d is formed to be spaced apart from the gate pad 103b and the data pad 103c by a predetermined interval.

Subsequently, referring to FIG. 6F, after the second photoresist layer pattern (not shown) is removed, the organic insulating material group, for example, benzo, as described above is formed on the entire surface of the substrate 101 on which the data wiring 111 and the like are formed. A protective film is selected by applying one of an organic insulating material consisting of cyclobutene and an acrylic resin, or an inorganic insulating material group consisting of a silicon oxide film (SiO ₂ ) and applying or depositing the same. And form 113.

Next, referring to FIG. 6G, a photoacryl coating film 115, which is a photosensitive material, is deposited on the passivation layer 113 by a predetermined thickness.

At this time, since the photoacryl film 115 itself is a photosensitive material, it is not necessary to apply a separate photosensitive material to form a desired pattern.

6H, a portion of the photoacryl film 115 on the gate pad 103b and the data pad 103c and the capacitor is selectively patterned to proceed with the third mask process. The film pattern 115a is formed.

In this case, the photoacryl film pattern 115a is present only on the thin film transistor unit and the pixel area, and is not present on the gate pad 103b and the data pad 103c.

Next, referring to FIG. 6I, the protective layer 113, the capacitor upper electrode 111e, the semiconductor layer 107, and the gate insulating layer 105 may be selectively patterned using the photoacrylic pattern 115a as a mask. First, second, and third contact holes 117a, 117b, and 117c exposing the pad 103b, the data pad 103c, and the portion of the semiconductor layer 107 under the capacitor upper electrode 111e are formed.

In this case, a drain contact hole (not shown) for exposing the drain electrode 111b is also formed when the first, second, and third contact holes 117a, 117b, and 117c are formed. Although not shown, the fourth and fifth contact holes (not shown) may be connected to the data pad terminals 119b to be formed in a subsequent process when the first, second and third contact holes 117a, 117b and 117c are formed. Not shown, 117d and 117e of FIG. 10G are also formed.

Here, the first contact hole 117a is a contact hole exposing the gate pad 103b, and the second contact hole 117b is a contact hole exposing the data pad 103c, and the third contact hole. 117c is a contact hole exposing side surfaces of the capacitor upper electrode 111e.

In addition, the conductive layer patterns 111c and 111d are also etched when the plurality of contact holes 117a, 117b, and 117c are formed.

6J, indium tin oxide (ITO) and indium zinc oxide (IZO) are formed on the entire substrate 101 including the first, second and third contact holes 117a, 117b, and 117c. Deposit one selected from a group of transparent conductive metals.

Next, a photosensitive material is coated on the transparent conductive metal layer (not shown) to proceed with the fourth mask process, and the photosensitive material layer is selectively patterned through an exposure and development process using a photolithography process technology to form a third photosensitive film. A pattern (not shown) is formed.

Subsequently, the transparent conductive metal layer may be selectively patterned using the third photoresist pattern (not shown) as a mask to contact the gate pad terminal 119a and the data pad 103c in contact with the gate pad 103b. The pad terminal 119b and the pixel electrode 119 in contact with the drain electrode 111b and the capacitor upper electrode 111e are formed, and then the third photoresist pattern (not shown) is removed.

   Meanwhile, in the liquid crystal display device according to the present invention manufactured as described above, the manufacturing process of the gate pad part will be described in more detail with reference to the accompanying drawings.

7 is a plan view of a gate pad portion of one pixel portion of a liquid crystal display according to the present invention.

8A to 8H are enlarged cross-sectional views taken along the line VII-VII of FIG. 7, which is a process cross sectional view for explaining a manufacturing process of a gate pad portion of one pixel portion.

Referring to FIGS. 7 and 8A, aluminum (Al), aluminum alloy (AlNd), chromium (Cr), tungsten (W), molybdenum (Mo), copper (Cu), and the like are included on the transparent substrate 101. A selected one of the conductive metal groups is deposited.

Next, the conductive metal layer (not shown) is selectively patterned by a first mask process, and a plurality of gate wirings (not shown) configured in one direction and a plurality of gate electrodes protruding from the gate wiring (not shown; 103a and gate pad 103b are formed.

At this time, during the patterning of the conductive metal layer, a data pad (not shown; 103c of FIG. 6A) and a capacitor lower electrode 103d are formed together with the gate wiring, the gate electrode, and the gate pad 103b.

In addition, the gate line (not shown) may include a gate line (not shown) passing through the display area, a gate pad 103b positioned outside the display area and receiving a signal from the outside, and the gate line (not shown). And a gate connection wiring (not shown) connecting the gate pad 103b.

In the first mask process, the first photosensitive material is coated on the conductive metal layer, and then selectively patterned on the conductive metal layer through an exposure and development process using a photolithography process technology to form a first photoresist film pattern, which is then used as a mask. It consists of the process of patterning a metal layer.

Next, referring to FIG. 8B, an inorganic insulating material group in which silicon oxide film (SiO ₂ ) is formed on the entire surface of the substrate 101 including the gate wiring, and in some cases, benzocyclobutene and acryl A gate insulating film 105 is formed by depositing or applying one selected from an organic insulating material made of resin.

Subsequently, a semiconductor layer 107 is formed by stacking amorphous silicon (a-Si) and impurity amorphous silicon (n + a-Si: H; not shown) on the gate insulating layer.

In this stack structure, the lower pure amorphous silicon layer becomes an active channel later, and the impurity amorphous silicon layer becomes an ohmic contact layer for lowering the resistance between the active layer and the subsequent metal wiring.

Next, referring to FIG. 8C, a conductive metal group as described above on the entire surface of the substrate on which the semiconductor layer 107 is formed, for example, aluminum (Al), aluminum alloy (AlNd), chromium (Cr), and tungsten (W). ), And a conductive metal layer 109 selected from the group of conductive metals including molybdenum (Mo), copper (Cu), and the like.

Subsequently, the conductive metal layer 109 is selectively patterned by a second mask process to vertically intersect the gate wiring (not shown) to define a pixel area to define a pixel region (not shown; 111 in FIG. 6E) and the data. A source electrode (not shown; 111a of FIG. 6E) protruding from one side of the gate electrode 103a and a drain electrode (not shown; 111b of FIG. 6E) spaced apart from the source electrode by a predetermined distance are formed in the wiring.

In this case, the data line (not shown; 111 in FIG. 6E) includes an active data line positioned in a display area and a data connection line (not shown) connecting the active data line and the data pad 103c in FIG. 6A. do.

In the second mask process, a second photosensitive material is coated on the conductive metal layer and then selectively patterned through a photolithography process technology to form a second photoresist pattern, which is then used as a mask. It consists of the process of patterning a metal layer.

Next, referring to FIG. 8D, the above-described organic insulating material group, for example, benzocyclobutene and acryl, is formed on the entire surface of the substrate 101 on which the data wiring (111 of FIG. 6E) is formed. The protective film 113 is formed by selecting one of an organic insulating material composed of a resin or optionally an inorganic insulating material group composed of a silicon oxide film (SiO ₂ ) or the like, and applying or depositing the same.

Subsequently, referring to FIG. 8E, a photo acryl coating film 115 is deposited on the passivation layer 113 by a predetermined thickness.

Next, referring to FIG. 8F, the gate pad 103b, the data pad (not shown; 103c of FIG. 6A), and the photoacryl film 115 on the capacitor are selectively patterned by a third mask process. The film pattern 115a is formed.

At this time, the photoacrylic film pattern 115a does not exist on the gate pad 103b and the data pad 103c.

Subsequently, referring to FIG. 8G, the passivation layer 113, the capacitor upper electrode 111e, the semiconductor layer 107, and the gate insulating layer 105 are formed using the photoacrylic pattern (not shown; 115a of FIG. 6H) as a mask. And selectively patterning the gate pad 103b, the data pad (not shown; 103b of FIG. 6H), an upper portion of the drain electrode 11b, and a portion of the semiconductor layer 107 under the capacitor upper electrode 111e. One contact hole 117a and second and third contact holes (not shown) 117b and 117c are formed.

In this case, the first contact hole is a contact hole exposing the gate pad, the second contact hole is a contact hole exposing the data pad, and the third contact hole is a contact hole exposing the side surface of the capacitor upper electrode.

In addition, in the formation of the contact hole, the protective film on the upper side of the pad portion is etched during dry etching after the photoacrylic film is patterned for patterning of the protective film, but the lower metal layer is exposed in the present invention. Since a semiconductor layer serving as a dry etch stopper is added, the pad portion is protected from being exposed to the metal layer.

Subsequently, referring to FIG. 8H, a selected one of a transparent conductive metal group including indium tin oxide (ITO) and indium zinc oxide (IZO) is deposited on the entire substrate including the first, second and third contact holes. do.

Next, the transparent conductive metal layer (not shown) is selectively patterned by the fourth mask process to contact the gate pad 103b and the data pad (not shown; 103c in FIG. 6H). A pixel pad in contact with the data pad terminal (not shown; 119b of FIG. 6J), the drain electrode (not shown; 111b of FIG. 6E), and a capacitor upper electrode (not shown; 111e of FIG. 6E). 119 of FIG. 6J is formed.

In this case, in the fourth mask process, a third photosensitive material is coated on the conductive metal layer, and then selectively patterned through a photolithography process technology to form a third photoresist pattern, which is then used as a mask. It consists of the process of patterning a metal layer.

In addition, in the liquid crystal display device according to the present invention, the manufacturing process of the data pad unit will be described in more detail with reference to the accompanying drawings.

9 is a plan view of a data pad part of one pixel part of the liquid crystal display according to the present invention.

10A to 10H are enlarged cross-sectional views taken along the line VII-VII of FIG. 9, which is a process cross sectional view for explaining a manufacturing process of a data pad portion of one pixel portion.

9 and 10A, aluminum (Al), aluminum alloy (AlNd), chromium (Cr), tungsten (W), molybdenum (Mo), copper (Cu), and the like are included on a transparent substrate 101. A selected one of the conductive metal groups is deposited.

Next, a plurality of gate wirings (not shown; 103 in FIG. 5) configured in one direction by selectively patterning the conductive metal layer (not shown) by a first mask process and a plurality of gate electrodes protruding from the gate wirings (not shown) A gate pad (103b in FIG. 6A) and a data pad 103c are formed.

In this case, a capacitor lower electrode 103d is also formed along with the gate wiring, the gate electrode, the gate pad 103b and the data pad 103c at the time of patterning the conductive metal layer.

In the first mask process, the first photosensitive material is coated on the conductive metal layer, and then selectively patterned on the conductive metal layer through an exposure and development process using a photolithography process technology to form a first photoresist film pattern, which is then used as a mask. It consists of the process of patterning a metal layer.

Next, referring to FIG. 10B, an inorganic insulating material group in which a silicon oxide film (SiO ₂ ) is formed on the entire surface of the substrate 101 on which the data pad 103c or the like is formed, and in some cases, benzocyclobutene and acryl ( A gate insulating film 105 is formed by depositing or applying one selected from an organic insulating material composed of an acryl resin.

Subsequently, an amorphous silicon (a-Si) and impurity amorphous silicon (n + a-Si: H; not shown) are stacked on the gate insulating layer 105 to form a semiconductor layer 107.

In this stack structure, the lower pure amorphous silicon layer becomes an active channel later, and the impurity amorphous silicon layer becomes an ohmic contact layer for lowering the resistance between the active layer and the subsequent metal wiring.

Next, referring to FIG. 10C, a conductive metal group as described above on the entire surface of the substrate on which the semiconductor layer 107 is formed, for example, aluminum (Al), aluminum alloy (AlNd), chromium (Cr), and tungsten (W). ), And a conductive metal layer (109 of FIG. 6D) selected from the group of conductive metals including molybdenum (Mo), copper (Cu), and the like.

Subsequently, the conductive metal layer is selectively patterned by a second mask process to vertically intersect the gate wiring (not shown) to define a pixel area, and the data wiring 111 and the gate electrode in the data wiring 111. A source electrode (not shown; 111a of FIG. 6E) protruding from one side of the top and a drain electrode (not shown; 111b of FIG. 6E) spaced apart from the source electrode by a predetermined distance are formed.

In this case, the data line (not shown) 111 of FIG. 6E includes an active data line positioned in the display area and a data connection line (not shown) connecting the active data line and the data pad 103c.

In the second mask process, a second photosensitive material is coated on the conductive metal layer and then selectively patterned through a photolithography process technology to form a second photoresist pattern, which is then used as a mask. It consists of the process of patterning a metal layer.

Next, referring to FIG. 10D, the above-described organic insulating material group, for example, benzocyclobutene and acryl-based resin, may be formed on the entire surface of the substrate 101 on which the data wiring 111 and the like are formed. A protective film 113 is formed by selecting one of an organic insulating material composed of a resin or an inorganic insulating material group composed of a silicon oxide film (SiO ₂ ) or the like and applying or depositing the same.

Next, referring to FIG. 10E, a photo acryl coating film 115 is deposited on the passivation layer 113 by a predetermined thickness.

Next, referring to FIG. 10F, a photoacryl may be selectively patterned by selectively patterning the data pad 103c, the gate pad (not shown; 103b of FIG. 6H), and the photoacryl film 115 on the capacitor by a third mask process. The film pattern 115a is formed.

In this case, the photoacryl film pattern 115a does not exist above the gate pad (not shown) 103b of FIG. 6H and the data pad 103c.

Subsequently, referring to FIG. 10G, the passivation layer 113, the gate insulating layer 105, and a portion of the data wiring 111 may be selectively patterned using the photoacrylic pattern (not shown; 115a of FIG. 6H) as a mask. A plurality of contact holes 117b, 117d, and 117e exposing the pad 103b and the data wiring 111 are formed at the same time.

In this case, a contact hole (not shown; 117a of FIG. 6I) and a contact hole exposing a capacitor upper electrode when the plurality of contact holes 117b, 117d, and 117e are formed are exposed. ) Also form.

In this case, the first and second contact holes 117b and 117d of the plurality of contact holes 117b, 117d and 117e are contact holes exposing the data pads, and the third contact holes are contact holes exposing data wirings. to be.

In addition, in the formation of the contact hole, the protective film on the upper side of the pad portion is etched during dry etching after the photoacrylic film is patterned for patterning of the protective film, but the lower metal layer is exposed in the present invention. Since a semiconductor layer serving as a dry etch stopper is added, the pad portion is protected from being exposed to the metal layer.

Subsequently, referring to FIG. 8H, a selected one of a transparent conductive metal group including indium tin oxide (ITO) and indium zinc oxide (IZO) is deposited on the entire substrate including the first, second and third contact holes. do.

Next, data for selectively patterning the transparent conductive metal layer (not shown) by a fourth mask process to connect the data pad 103c and the data wiring 111 through the plurality of contact holes 117b and 117d. The pad terminal 119b is formed.

Although not shown in the drawing, a gate pad terminal (not shown; 119a of FIG. 6J) and a pixel electrode 119 are also formed when the data pad terminal 119b is formed. In addition, a structure that connects the data pad 103c and the data wiring 111 through the plurality of contact holes 117b and 117d is called a jumping structure.

In the fourth mask process, a third photosensitive material is coated on the conductive metal layer, and then selectively patterned through a photolithography process technology to form a third photoresist pattern, which is then used as a mask. It consists of the process of patterning a metal layer.

Referring to FIG. 11, since the photoacrylic film pattern does not exist in the datapad part including the gate pad part along with the 4 mask process in manufacturing the datapad part of the liquid crystal display according to the present invention, there is no photoacrylic film during TCP repair. It can be seen that the transparent conductive metal is not damaged.

On the other hand, while described above with reference to a preferred embodiment of the present invention, those skilled in the art various modifications of the present invention without departing from the spirit and scope of the invention described in the claims below And can be changed.

As described above, the liquid crystal display device and the method of manufacturing the same according to the present invention have the following effects.

The liquid crystal display device and the method of manufacturing the same according to the present invention can fundamentally solve the TCP repair (tape carrier package repair) problem that occurs when the organic insulating film structure and the four mask process are applied.

That is, the liquid crystal display device and the method of manufacturing the same according to the present invention do not have a photoacrylic film pattern on the data pad part (or gate pad part) together with the four mask process at the time of manufacturing the data pad part (or gate pad part). Therefore, there is no photoacrylic film during TCP repair so that the transparent conductive metal is not damaged.

In addition, the liquid crystal display device and the method of manufacturing the same according to the present invention prevent the phenomenon that the lower metal is exposed during the dry etching since the active layer is present on the lower metal during the dry etching process after forming the organic insulating film such as the photoacrylic film. can do.

Claims (21)

A substrate defined by a display area and a non-display area; A gate wiring formed on the substrate and passing through the display area, and a gate pad and a data pad disposed in the non-display area; A data line formed on the substrate so as to vertically cross the gate line to define a pixel area, and connected to the data pad; A thin film transistor formed on the substrate crossing the gate line and the data line, the thin film transistor comprising a gate electrode, a source electrode, a drain electrode, and a semiconductor layer pattern; An organic insulating pattern formed on the thin film transistor and the pixel region; A gate pad terminal and a data pad terminal in contact with the gate pad and the data pad, respectively; And And a pixel electrode formed on the organic insulating film pattern and connected to the drain electrode of the thin film transistor. The liquid crystal display device according to claim 1, wherein a semiconductor layer pattern and a gate insulating film are formed between the gate pad and the gate pad terminal and between the data pad and the data pad terminal. The liquid crystal display of claim 1, wherein a capacitor is further provided on the substrate. The liquid crystal display device according to claim 1, wherein the organic insulating film pattern is formed only in the thin film transistor and the pixel region. The liquid crystal display device of claim 1, wherein the organic insulating film pattern is formed of a photo acryl coating film. The liquid crystal display of claim 1, wherein the data pad terminal is connected to the data pad and a data line. The liquid crystal display of claim 6, wherein the connection structure is formed by a data pad terminal formed in the data pad and the data line through a plurality of contact holes formed in the organic pad pattern on the data pad and the data line. Providing a substrate defined by a display area and a non-display area; Forming a gate line passing through the display area on the substrate, a gate pad and a data pad disposed in the non-display area; Forming a pixel area on the substrate to be perpendicularly intersected with the gate line to define a pixel area, and to form a data line connected to the data pad; Forming a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer pattern on a substrate crossing the gate line and the data line; Forming an organic insulating pattern on the thin film transistor and the pixel region; Forming a gate pad terminal and a data pad terminal in contact with the gate pad and the data pad, respectively; And And forming a pixel electrode connected to the drain electrode of the thin film transistor on the organic insulating layer pattern. 10. The method of claim 8, wherein a semiconductor layer pattern and a gate insulating layer are formed between the gate pad and the gate pad terminal and between the data pad and the data pad terminal. The method of claim 8, wherein a lower electrode constituting the capacitor is formed when the gate wiring is formed. The method of claim 8, wherein the organic insulating pattern is formed only in the thin film transistor and the pixel region. The method of claim 8, wherein a photoacryl coating film is used as the material of the organic insulating pattern. The method of claim 8, wherein the forming of the organic insulating film pattern on the thin film transistor and the pixel region is performed. Forming an organic insulating film on the entire substrate including the thin film transistor, and selectively removing an organic insulating film portion on the remaining portion except for the organic insulating film portion positioned in the pixel transistor and the pixel region to form an organic insulating film pattern Liquid crystal display device manufacturing method characterized in that consisting of. The material of claim 8, wherein the gate wiring, the gate pad and the data pad disposed in the non-display area include aluminum (Al), aluminum alloy (AlNd), chromium (Cr), tungsten (W), A method of manufacturing a liquid crystal display device comprising using one selected from the group of conductive metals containing molybdenum (Mo), copper (Cu) and the like. The method of claim 8, further comprising forming a passivation layer before forming the organic insulating layer pattern. 16. The inorganic insulating material group of claim 15, wherein the protective film includes an organic insulating material composed of benzocyclobutene and an acrylic resin, or a silicon insulating film (SiO ₂ ). Method of manufacturing a liquid crystal display device, characterized in that for use by selecting one. 10. The method of claim 8, wherein the source / drain electrodes constituting the thin film transistor and the material forming the data wiring include aluminum (Al), aluminum alloy (AlNd), chromium (Cr), tungsten (W), and molybdenum (Mo). And a selected one of a conductive metal group containing copper (Cu) and the like. The method of claim 8, wherein a capacitor upper electrode is formed at the same time when the data line and the source / drain electrodes are formed. The method of claim 8, wherein the pixel electrode is selected from a group of transparent conductive metals including indium tin oxide (ITO) and indium zinc oxide (IZO). The method of claim 8, wherein the data pad terminal is connected to the data pad and a data wiring. 21. The structure of claim 20, wherein the structure connected to the data pad and the data line is formed by a data pad terminal formed on the data pad and the data line through a plurality of contact holes formed in the organic insulating pattern on the data pad and the data line. Liquid crystal display device manufacturing method characterized in that.

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