KR20080035044A - The array substrate for liquid crystal display device - Google Patents

Abstract

An array substrate for an LCD(Liquid Crystal Display) is provided to form an organic TFT(Thin Film Transistor) having a big channel ratio and suppress increase of parasitic capacitance by minimizing increase of an area where source and drain electrode are overlapped with a gate electrode, thereby suppressing deterioration of image quality caused by generation of flicker or the like. A source electrode(110) having a "T" shape is formed on a substrate(101). A drain electrode(113) is formed in the same layer as the source electrode as being spaced from the source electrode, and is formed in a "T" shape. Parts where the source and drain electrodes face each other are first parts(110a,113a). Second parts(110b,113b) are branched from the first parts. An organic semiconductor layer(120) is formed in the first and second parts. A gate insulating layer is formed on the organic semiconductor layer. A gate electrode is formed on the gate insulating layer. An organic TFT includes the organic semiconductor layer. Therefore, a width of a channel is increased. And increase of an area where the source and drain electrodes are overlapped with the gate electrode having the same shape as the organic semiconductor layer is suppressed.

Description

Array substrate for liquid crystal display device

1 is an exploded perspective view of a general liquid crystal display device.

2 is a plan view showing one pixel area of an array substrate for a liquid crystal display device including a conventional organic thin film transistor.

3 is a plan view of one pixel region of an array substrate for a liquid crystal display device having an organic thin film transistor having an organic semiconductor layer according to the present invention;

4 is an enlarged view of a region A of FIG. 3;

FIG. 5 is a cross-sectional view of a portion taken along the cutting line VV of FIG. 3. FIG.

<Description of the symbols for the main parts of the drawings>

101: (array) substrate 105: data wiring

110: source electrode 110a: first portion of source electrode

110b: second portion of source electrode 113: drain electrode

113a: first portion of the drain electrode 113b: second portion of the drain electrode

116: pixel electrode 118: first storage electrode

120: organic semiconductor layer 130: gate electrode

138: gate contact hole 145: gate wiring

147: second storage electrode

B: source and drain electrode portions overlapping with the reduced gate electrodes

P: Pixel Area StgC: Storage Capacitor

Tr: Organic Thin Film Transistor

The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a liquid crystal display device using an organic semiconductor material.

In recent years, as the society enters the information age, the display field that processes and displays a large amount of information has been rapidly developed, and recently, the thin film transistor (Thin) having excellent performance of thinning, light weight, and low power consumption has recently been developed. Film Transistor (TFT) type liquid crystal display (TFT-LCD) has been developed to replace the existing cathode ray tube (CRT).

The principle of image realization of a liquid crystal display device is to use the optical anisotropy and polarization property of the liquid crystal. As is well known, liquid crystal has a thin and long molecular structure and optical anisotropy having an orientation in an array, and when placed in an electric field, the orientation of the molecular array depends on its size. This change is polarized. The liquid crystal display is an essential component of a liquid crystal panel formed by bonding an array substrate and a color filter substrate formed with pixel electrodes and common electrodes facing each other with the liquid crystal layer interposed therebetween. In addition, the arrangement direction of the liquid crystal molecules is artificially adjusted by changing the electric field between these electrodes, and various images are displayed by using the light transmittance which is changed at this time.

Recently, the active matrix type, in which pixels, which are the basic units of image expression, are arranged in a matrix manner, and switching elements are arranged in each pixel, is controlled to have an excellent performance in terms of resolution and video performance. The thin film transistor (TFT) is a well-known TFT-LCD (Thin Firm Transistor Liquid Crystal Display device).

In more detail, as shown in FIG. 1, which is an exploded perspective view of a general liquid crystal display device, the array substrate 10 and the color filter substrate 20 face each other with the liquid crystal layer 30 interposed therebetween. The array substrate 10 includes a plurality of gate lines 14 and data lines 16 arranged vertically and horizontally to the first transparent substrate 12 and upper surfaces thereof to define a plurality of pixel regions P. Thin film transistors T are provided at the intersections of the wirings 14 and 16 and are connected one-to-one with the pixel electrodes 18 provided in the pixel regions P. FIG.

In addition, the upper color filter substrate 20 facing the second transparent substrate 22 and its rear surface cover the non-display area of the gate line 14, the data line 16, the thin film transistor T, and the like. A grid-like black matrix 25 is formed that borders each pixel region P. The red, green, and blue color filter layers 26 are sequentially and repeatedly arranged to correspond to the pixel regions P in the grid. Is formed, and a transparent common electrode 28 is provided over the entire surface of the black matrix 25 and the red, green, and blue color filter layers 26.

Although not clearly shown in the drawings, these two substrates 10 and 20 are each sealed with a sealing agent or the like along the edges to prevent leakage of the liquid crystal layer 30 interposed therebetween. An upper and lower alignment layer is provided at the boundary between the substrates 10 and 20 and the liquid crystal layer 30 to provide reliability in the molecular alignment direction of the liquid crystal, and at least one outer surface of each of the substrates 10 and 20 has a polarizing plate. Attached.

In addition, a backlight is provided on the back of the liquid crystal panel to supply light. The on / off signal of the thin film transistor T is sequentially scanned and applied to the gate wiring 14. When the image signal of the data wiring 16 is transmitted to the pixel electrode 18 of the pixel region P, the liquid crystal molecules are driven by the vertical electric field therebetween, and various images are changed due to the change in the transmittance of light. I can display it.

Meanwhile, in the liquid crystal display device, glass substrates have been traditionally used for the first and second insulating substrates 12 and 22, which are the matrixes of the array substrate 10 and the color filter substrate 20. As small portable terminals such as PDAs (personal digital assistants) are widely used, liquid crystal panels using plastic substrates having a lighter weight, lighter weight, and more flexible characteristics than those of glass and having a low risk of damage have been introduced.

However, a liquid crystal panel using a plastic substrate has a high temperature process requiring a high temperature of 200 ° C. or higher, particularly in the manufacture of an array substrate on which a thin film transistor, which is a switching element, is formed. Therefore, heat resistance and chemical resistance are inferior to that of a glass substrate. It is difficult to manufacture the array substrate from a plastic substrate, and thus, only a color filter substrate is manufactured from a plastic substrate, and the array substrate is manufactured using a conventional glass substrate.

In order to solve this problem, a technique for manufacturing an array substrate, which is characterized by forming a thin film transistor by performing a low temperature process below 200 ° C. using an organic semiconductor material, has recently been proposed.

In forming a thin film transistor including a semiconductor layer on a substrate in a low temperature process of 200 ° C. or lower, the formation of a metal material, an insulating film, a protective layer, etc., which form an electrode and wiring, may be formed by a low temperature deposition or coating method. Although it does not affect the characteristics of the thin film transistor, the semiconductor layer forming the channel is formed by a low temperature process using amorphous silicon, which is a general semiconductor material, the durable structure is not dense and important characteristics such as electrical conductivity is reduced Problem occurs.

Therefore, in order to overcome this, it is proposed to form a semiconductor layer using an organic semiconductor material having semiconductor characteristics instead of a conventional semiconductor material such as amorphous silicon.

FIG. 2 is a plan view illustrating one pixel area of an array substrate for a liquid crystal display including an organic thin film transistor having a conventional organic semiconductor layer.

As shown in the drawing, the data line 45 extends in one direction on the substrate 41, and the gate line 73 is formed to cross the data line 45 and define the pixel region P. As shown in FIG. .

In addition, a source electrode 50 is formed in the form of a bar having a predetermined width w1 branching from the data line 45 near an area where these two wires 45 and 73 cross each other. A drain electrode 53 is formed in a bar shape spaced apart from the 50 and having a width w1 that is the same as that of the source electrode 50, and has a bar shape having the same width w1. A gate electrode 75 including a source electrode 50 and a drain electrode 53 covering the separation regions of the two electrodes 50 and 53 and connected to the gate line 73 is formed.

In this case, an organic semiconductor layer 60 made of an organic semiconductor material and a gate insulating layer (not shown) are formed under the gate electrode 75, and contact each end of the drain electrode 53. Independent pixel electrodes 57 are formed for each P).

In this case, the pixel electrode 57 is partially overlapped with a part of the gate wiring 73 at the front end so that the overlapped pixel electrode and the gate wiring form the first and second storage electrodes 58 and 77, respectively. A storage capacitor StgC is formed along with a protective layer (not shown) formed between the two electrodes 58 and 77.

However, in the array substrate 41 for liquid crystal display having a conventional organic semiconductor layer having the structure as described above, the organic semiconductor layer is applied or coated at room temperature using an organic semiconductor material, in particular a liquid organic semiconductor material. When the 60 is formed, the characteristics of the organic semiconductor layer 60, that is, the semiconductor material characteristics such as mobility, are inferior to those of the semiconductor layer using amorphous silicon, so that the channel ratio (W / L, The width w1 of the source and drain electrodes 50 and 53 overlapping the organic semiconductor layer 60 is generally amorphous due to the characteristic that W is the width of the channel and L is the length of the channel. It is formed thicker than the width of the source and drain electrodes of the array substrate having the semiconductor layer of silicon.

However, the channel ratio W / L may be improved by forming a thick width w1 of the source and drain electrodes 50 and 53 overlapping the organic semiconductor layer 60. However, the organic semiconductor layer ( 60 is very vulnerable to stripping or etching liquid for removing photoresist used for patterning. The gate electrode is formed of a gate insulating film (not shown) and a metal material that is not patterned by itself but formed on top thereof. Patterned and formed together with 75, the gate electrode 75 overlaps with the gate electrode 75. In this case, the source and drain electrodes 50 and 53 are relatively larger than that of a conventional array substrate using amorphous silicon. It can be seen that the area overlapping with increases.

However, as the area where the gate electrode 75 and the source and drain electrodes 50 and 53 overlap with each other in the switching region where the thin film transistor Tr is formed increases, the parasitic capacitance (source overlapping with the gate electrode 75) is increased. And capacitance generated by the drain electrodes 50 and 53 increase, and in particular, due to an increase in the parasitic capacitance between the gate electrode 75 and the source and drain electrodes 50 and 53, the change amount of the pixel electrode ΔVp is increased. Increasingly, the problem of flickering of images is caused.

The present invention has an organic semiconductor layer, and the channel ratio is increased to improve the characteristics of the thin film transistor and at the same time minimize the increase in the parasitic capacitance between the overlapping gate electrode and the source and drain electrodes to suppress the occurrence of flicker. It is an object of the present invention to provide an array substrate for a liquid crystal display device.

An array substrate for a liquid crystal display device having an organic semiconductor layer according to the present invention for achieving the above object comprises a source electrode formed in a "T" shape on the substrate; A drain electrode spaced apart from the same layer as the source electrode and formed in a “T” shape; An organic semiconductor layer formed on portions of the source and drain electrodes that are spaced apart from each other, and areas spaced between the two electrodes; A gate insulating film formed on the organic semiconductor layer; It includes a gate electrode formed on the gate insulating film.

At this time, the source and drain electrodes of the "T" shape is characterized in that each has a "T" shape rotated 90 degrees clockwise and a "T" shape rotated 90 degrees counterclockwise, respectively, And defining portions facing each other of the drain electrode as a first portion and a second portion branching from the first portion, respectively, and connected to the second portion of the source electrode on the same layer where the source and drain electrodes are formed. A formed data wiring; A pixel electrode formed on the substrate in contact with the second portion of the drain electrode; The semiconductor device may further include a gate line formed to intersect the data line to define a pixel area and contact the gate electrode. The gate electrode further includes a gate contact hole exposing a portion of the gate electrode and a first passivation layer exposing the pixel electrode, wherein the gate line is formed on the first passivation layer and is formed on the gate contact hole. It characterized in that the contact with the gate electrode through the, further comprises a second protective layer formed on the gate wiring.

In addition, the gate insulating layer and the gate electrode disposed above the gate insulating layer may have the same shape as the organic semiconductor layer disposed below the gate insulating layer. The gate wiring and the pixel electrode may have the first protective layer therebetween. A portion thereof overlaps to form a storage capacitor.

In addition, when the first and second widths having the same directivity are defined in the substrate, and the width of the first portion of each of the source and drain electrodes is defined as the first width and the width of the second portion is defined as the second width, The second width is larger than the first width.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

3 is a plan view of one pixel area of an array substrate for a liquid crystal display device having an organic thin film transistor having an organic semiconductor layer according to the present invention.

As illustrated, the gate line 145 extends in one direction, intersects with the gate line 145 to define the pixel region P, and the data line 105 is formed.

 In addition, adjacent to the intersection of the gate line 145 and the data line 105, the two thin lines 145 and 105 are connected to each other, and an organic thin film transistor Tr is formed as a switching element. In this case, the organic thin film transistor Tr is covered with the gate electrode 130 formed in contact with the gate line 145 and the gate contact hole 138 and the organic semiconductor layer 120 (in the drawing, the gate electrode). Formed under the gate electrode in the same pattern as that of the gate electrode), in contact with the organic semiconductor layer 120 and connected to the data line 105, as if the shape is rotated 90 degrees clockwise. The source electrode 110 having a “T” shape, and the source electrode 110 having a “T” shape which is in contact with the organic semiconductor layer 120 and rotated 90 degrees in the clockwise direction, are counterclockwise. It is characterized by consisting of a drain electrode 113 having a "T" shape rotated 90 degrees. In this case, for convenience of description, portions facing each other of the source and drain electrodes 110 and 113 are referred to as first portions 110a and 113a, respectively, and portions branched from the first portions 110a and 113a are respectively formed. It is referred to as two portions 110b and 113b.

In this case, it can be seen that also in the source electrode 110 connected to the data line 105, the portion in contact with the data line 105 is the second portion 110b of the source electrode 110. .

In the pixel region P, a second part branched from the first part 113a facing the source electrode 110 among the components constituting the drain electrode 113 of the organic thin film transistor Tr. The pixel electrode 116 is formed in contact with a portion of the 113b, and one end of the pixel electrode 116 overlaps with the gate wiring 145 (actually, the gate wiring at the front end). These overlapping pixel electrodes and gate wirings form the first and second storage electrodes 118 and 147, respectively, to form a storage capacitor StgC.

In the array substrate for a liquid crystal display device according to the present invention having the above-described structure, the most structurally significant portion is the source and drain electrodes 110 formed in a "T" shape rotated 90 degrees clockwise and counterclockwise, respectively. 113).

In the related art, the source and drain electrodes have the same width and are formed in a bar shape, and thus, when the width of the source and drain electrodes is increased in order to increase the channel ratio, the portion overlapping with the gate electrode becomes wider. The parasitic capacitance, which is the capacitance generated by these overlapping electrodes, has increased linearly.

However, in the present invention, in the structure of the source and drain electrodes, the width of the channel is determined by forming a “T” shape that is rotated clockwise and counterclockwise, respectively, rather than a bar shape. Divided into portions 110a and 113a and second portions 110b and 113b formed in a branched shape from the first portions 110a and 113a so as to be connected to the data lines 105 and the pixel electrodes 116, respectively. By forming the source and drain electrodes 110 and 113 into two parts, respectively, the source and drain electrode portions (first portions) facing each other to increase the channel ratio (W / L) may be formed. The area in which the portion overlapping with the gate electrode 130 is increased compared to the area in which the width W is increased is characterized in that the moonlight has a smaller value than the conventional area.

Here, why the parasitic capacitance between the overlapping gate electrodes and the source and drain electrodes and the overlapping electrodes affect the display quality will be described briefly.

In general, the gate voltage has a V _GH having a magnitude greater than or equal to a threshold voltage (Vth) and a V _GL value having a magnitude less than or equal to a threshold voltage. When applied in the form of a pulse _wave and V _GH is applied, the organic thin film transistor is turned on and the data signal voltage supplied through the data line 105 is applied to the pixel electrode through the organic thin film transistor. When the voltage applied to the gate electrode becomes V _GL , the pixel electrode must maintain the currently applied data signal voltage for a predetermined time (the time until the next V _GH is applied), but the gate voltage is the threshold voltage. At the moment of falling below, a predetermined amount of voltage drop occurs. In this case, the change amount of the pixel voltage due to the voltage drop in the pixel electrode is defined as ΔVp.

When the pixel voltage change amount ΔVp is expressed by a formula,

---ⓛ

--- ⓛ

It can be expressed as. At this time, C _LC is the capacitance of the liquid crystal, C _ST is the capacitance of the storage capacitor, C _gs (or C _gd ) is the parasitic capacitance between the overlapping gate electrode and the source electrode (or drain electrode).

In this case, it can be seen that as the parasitic capacitance C _gs between the gate electrode and the source electrode increases, ΔVp increases.

On the other hand, in the liquid crystal display device, if the change amount of the pixel electrode ΔVp is large, flickering may be generated when the screen is partially flickered due to improper charging of the liquid crystal while driving the liquid crystal display device.

In the liquid crystal display, if the distribution of ΔVp for each position is not uniform and the difference is large, the V _LC (voltage applied to the liquid crystal layer) also differs for each position, resulting in non-uniformity of the light transmission and thus local flicker. ) Will cause deterioration of image quality. In this case, the distribution nonuniformity of the positional ΔVp increases as the size of the ΔVp increases, thereby increasing flicker.

However, in the present invention, the source and drain electrodes 110 and 113 which are in contact with the organic semiconductor layer 120 and overlap the gate electrode 130 having the same shape as the organic semiconductor layer 120 are the two electrodes. The first of the source and drain electrodes of the " T " shape rotated so as to increase the area (the length of the portions facing each other in the drawing) where the parts 110 and 113 face each other (the first part of each electrode). The portions 110a and 113a are positioned to face each other, and the second portions 110b and the second portions 110b connected to the data line 105 and the pixel electrode 116 in a form branched from the first portions 110a and 113a, respectively. 113b) is formed to have a constant width w2 regardless of the increase or decrease of the width W of the channel. In the figure, the channel width W is formed to be larger than the width w2 of the second portion of the source and drain electrodes (W> w2).

Therefore, the liquid crystal display array substrate 101 including the organic thin film transistor Tr according to the present invention has a width W of the channel due to the organic thin film transistor Tr including the organic semiconductor layer 120. While increasing, the area of the overlapping portion with the gate electrode 130 having the same shape as the organic semiconductor layer 120 is suppressed, the channel ratio (W / L) by the increase in the channel width (W) In addition, it is possible to minimize the occurrence of flicker by providing a structure that suppresses an increase in the change amount of ΔVp, which is a pixel electrode, while improving the efficiency.

At this time, referring to FIG. 4, which is an enlarged view of the region A (switching region) of FIG. 3, the portion B indicated by the dotted line in the drawing is formed to have the same channel width W in the conventional and the present invention. In this case, the region of the source and drain electrodes 110 and 113 of the present invention is further overlapped with the gate electrodes of the source and drain electrodes having a bar shape.

Assuming that the organic thin film transistor is formed to have the same channel width in the array substrate according to the prior art and the present invention, in the case of the array substrate 101 for a liquid crystal display device having the organic thin film transistor (Tr) according to the present invention And the gate electrode 130 as compared to an array substrate for a liquid crystal display device including a conventional organic thin film transistor having a bar-shaped source and drain electrode having the same width as the area of the portion B shown by the dotted line. As shown in FIG. 2, the parasitic capacitance C _gs for the area of the portion B shown by the dotted line is reduced, thereby reducing the size of ΔVp.

Subsequently, an array substrate for a liquid crystal display device having an organic semiconductor layer having source and drain electrodes having a "T" shape rotated 90 degrees clockwise and counterclockwise, respectively, so that the first portion thereof faces each other. The cross-sectional structure of is briefly described.

FIG. 5 is a cross-sectional view of a portion cut along the cutting line VV of FIG. 3.

As shown in the drawing, the data line 105 made of a metal material, for example, gold (Au), and the same metal material as the data line 105 and spaced apart from each other, the source and drain electrodes ( 110 and 113 are formed. In this case, the source electrode 110 has a second portion (not shown) connected to the data line (not shown).

On the other hand, although not shown in the drawings, the source and drain electrodes 110 and 113 have a "T" shape rotated 90 degrees clockwise and counterclockwise, respectively, so that the first portion of the source and drain electrodes (not shown). , 113a) is spaced apart from each other in a form facing each other.

Next, an example of a transparent conductive material on the source and drain electrodes 110 and 113 having a “T” shape rotated 90 degrees with the data line (not shown) and the substrate 101 exposed to the outside of these components. For example, the second portion 113b of the “T” shaped drain electrode formed of indium tin oxide (ITO) or indium zinc oxide (IZO) and rotated 90 degrees counterclockwise, that is, the drain The pixel electrode 116 is formed in direct contact with a portion of the portion formed by branching from the first portion 113a of the electrode and patterned for each pixel region P. FIG.

 In addition, an organic semiconductor layer 120 formed of an organic semiconductor material, for example, liquid pentacene or polythiophene, is formed on the source and drain electrodes 110 and 113 spaced apart from each other. A gate insulating layer made of an organic insulating material, for example, photo acryl or polyvinyl alcohol (PVA), that does not react with or affect the organic semiconductor layer 120 on the organic semiconductor layer 120. 125) is formed.

In addition, a gate electrode 130 made of a second metal material such as molybdenum (Mo) is formed on the gate insulating layer 125.

In this case, the gate insulating layer 125 formed on the organic semiconductor layer 120 and the gate electrode 130 formed on the organic semiconductor layer 120 have the same pattern shape as that of the organic semiconductor layer 120. From the components stacked in sequence, that is, the source and drain electrodes 110 and 113, the organic semiconductor layer 120, the gate insulating layer 125, and the gate electrode 130, each rotated 90 degrees, may be formed. An organic thin film transistor (Tr) is formed.

Next, a gate contact hole 138 exposing a part of the gate electrode 130 is exposed on the gate electrode 130, and most of the pixel electrode 116 formed in the pixel area P is exposed and organic insulation is performed. A protective layer 135 made of a material is formed, and contacts the gate electrode 130 through the gate contact hole 138 over the protective layer 135 and crosses the data line (not shown). The gate wiring 145 defining the pixel region P is formed.

In this case, the gate line 145 is formed to overlap one end of the pixel electrode 116 under the protective layer 135 to form a storage capacitor StgC along with the pixel electrode overlapping the gate electrode 145. That is, the overlapping gate line and the pixel electrode portions 118 and 147 may include the first storage electrode 118 and the passivation layer with an overlapping pixel electrode portion disposed below the passivation layer 135. An upper portion of the gate wiring portion formed as an upper portion of the second storage electrode 147 and a protective layer 135 disposed between the first and second storage electrodes 118 and 147 as a dielectric layer. StgC).

In this case, although not shown, a second protective layer may be further formed on the gate wiring 145 to prevent corrosion and protection of the gate wiring 145.

An array substrate for a liquid crystal display device having an organic semiconductor layer according to the present invention and a "T" shaped source and drain electrode which are rotated by 90 degrees, respectively, has an organic thin film transistor having a large channel ratio, By minimizing the increase of the area overlapping with the gate electrode and suppressing the increase of the parasitic capacitance Cgs, the image quality deterioration due to the occurrence of flicker is suppressed.

Claims (9)

A source electrode formed in a “T” shape on the substrate; A drain electrode spaced apart from the same layer as the source electrode and formed in a “T” shape; An organic semiconductor layer formed on portions of the source and drain electrodes that are spaced apart from each other, and areas spaced between the two electrodes; A gate insulating film formed on the organic semiconductor layer; A gate electrode formed on the gate insulating layer Array substrate for a liquid crystal display device comprising a. The method of claim 1, The source and drain electrodes of the "T" shape, An array substrate for a liquid crystal display device characterized by having a "T" shape rotated 90 degrees clockwise and a "T" shape rotated 90 degrees counterclockwise, respectively. The method of claim 2, When defining portions facing each other of the source and drain electrodes as a first portion and a second portion branched from the first portion, respectively, A data line connected to the second portion of the source electrode on the same layer where the source and drain electrodes are formed; A pixel electrode formed on the substrate in contact with the second portion of the drain electrode; A gate wiring formed in contact with the gate electrode to define a pixel region crossing the data wiring; Array substrate for a liquid crystal display device further comprising. The method of claim 3, wherein And a gate contact hole exposing a portion of the gate electrode and a first passivation layer formed to expose the pixel electrode. The method of claim 4, wherein And the gate wiring is formed on the first protective layer and contacts the gate electrode through the gate contact hole. The method of claim 4, wherein And a second passivation layer formed on the gate wiring. The method of claim 3, wherein And the gate insulating layer and the gate electrode disposed above the gate insulating layer have the same shape as that of the organic semiconductor layer disposed below the gate insulating layer. The method of claim 3, wherein And the gate wiring and the pixel electrode are formed such that a portion thereof overlaps with the first protective layer interposed therebetween to form a storage capacitor. The method of claim 3, wherein Defining a first width and a second width having the same directionality in the substrate, wherein a width of a first portion of each of the source and drain electrodes is defined as a first width and a width of the second portion is defined as a second width; An array substrate for liquid crystal display devices, characterized in that the width is larger than the first width.

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