KR20070087293A - Thin film transistor array panel and liquid crystal display including the panel - Google Patents

Abstract

A thin film transistor substrate and an LCD(Liquid Crystal Display) having the same are provided to overlap data lines in parallel with pixel electrodes by stem electrodes of the pixel electrodes for improving an aperture rate of pixels, and to align branch electrodes of the pixel electrodes symmetrically with respect to center lines of pixel areas for improving visibility. A thin film transistor substrate includes pixel electrodes(191) connected to drain electrodes(175), and having a plurality of stem electrodes(191b) overlapping data lines(171) and branch electrodes(191a) connected to the stem electrodes and aligned in parallel with each other. In the stem electrodes, one of neighboring two overlaps the data line, wherein the other one not overlapping the data line partially overlaps a part of the drain electrode. The stem electrodes are curved by an obtuse angle with respect to the branch electrodes, wherein the drain electrodes are partially in parallel with the curved stem electrodes. The branch electrodes are symmetrically aligned with respect to center lines of the pixel electrodes, which are in parallel with gate lines. The branch electrodes have a certain inclination angle with respect to the gate lines.

Description

Thin film transistor array panel and liquid crystal display including the same {Thin film transistor array panel and Liquid crystal display including the panel}

1 is a layout view illustrating a structure of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a layout view illustrating a structure of a thin film transistor array panel in the liquid crystal display of FIG. 1.

FIG. 3 is a layout view illustrating a structure of a common electrode display panel in the liquid crystal display of FIG. 1.

4 and 5 are cross-sectional views of the liquid crystal display of FIG. 1 taken along lines IV-IV and V-V.

6 is a layout view illustrating a structure of another liquid crystal display according to another exemplary embodiment of the present invention.

7 is a layout view illustrating a structure of another liquid crystal display according to another exemplary embodiment of the present invention.

8 is a layout view illustrating a structure of a liquid crystal display device according to another embodiment of the present invention.

9 is a layout view illustrating a structure of a liquid crystal display device according to another embodiment of the present invention.

FIG. 10 is a plan view illustrating an arrangement of liquid crystal molecules without an electric field applied to two field generating electrodes in a liquid crystal display according to an exemplary embodiment of the present invention.

11 is a plan view illustrating an arrangement of liquid crystal molecules in a state where an electric field is applied to two field generating electrodes in a liquid crystal display according to an exemplary embodiment of the present invention.

12 is a cross-sectional view illustrating an arrangement of liquid crystal molecules when driving the liquid crystal display according to the exemplary embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

100: thin film transistor display panel 200: common electrode display panel

191a, 191b, and 191: pixel electrodes 207a and 270b 270: common electrode

11, 21: alignment film 12, 22: polarizing plate

121 and 129: gate line 124: gate electrode

140: gate insulating film 171, 179: data line

173: source electrode 175: drain electrode

180: protective film 310: liquid crystal molecules

The present invention relates to a thin film transistor array panel and a liquid crystal display device including the same.

The liquid crystal display is one of the most widely used flat panel displays, and is a liquid crystal layer having dielectric anisotropy and inserted between two display panels on which field generating electrodes such as pixel electrodes and common electrodes are formed. Is done. A voltage is applied to the field generating electrode to generate an electric field in the liquid crystal layer, through which the alignment of the liquid crystal molecules of the liquid crystal layer is determined, and the image is displayed by controlling the polarization of the incident light.

Among such liquid crystal display devices, a liquid crystal display device mainly used is a twisted nematic (TN) type liquid crystal display device. In the case of the twisted nematic method, the field generating electrodes are respectively installed on the two display panels, the liquid crystal directors are arranged to be twisted by 90 ° from the lower display panel to the upper display panel, and then the liquid crystal director is driven by applying a voltage to the two field generating electrodes. However, such a liquid crystal display has a problem that the viewing angle is narrow, so that an in-plane switching (IPS) or plane to line switching (PLS) type liquid crystal display has been developed to replace the liquid crystal display.

However, the IPS method and the PLS method have problems in that transmittance and visibility are inferior because both field generating electrodes are disposed on one display panel.

An object of the present invention is to provide a liquid crystal display device having high visibility and transmittance.

The thin film transistor array panel according to the exemplary embodiment of the present invention is formed on an insulating substrate, an insulating substrate, a gate line having a gate electrode, a gate insulating film covering the gate line, a semiconductor formed on the gate insulating film, and an upper portion of the gate insulating film. And a data line having a source electrode formed on the semiconductor and intersecting the gate line, and formed on the semiconductor, covering the drain electrode, the data line and the drain electrode facing the source electrode, and a protective film and a protective film made of an organic material. It is formed on the upper portion, and includes a pixel electrode electrically connected to the drain electrode. In this case, the pixel electrode is connected to a plurality of stem electrodes overlapping the data line and the stem electrode, and includes a plurality of branch electrodes arranged in parallel with each other.

It is preferable that only one of two neighboring stem electrodes overlaps the data line, and a portion of the stem electrode not overlapping the data line preferably overlaps a part of the drain electrode.

The stem electrode may be bent at an obtuse angle with respect to the branch electrode, and the drain electrode may have a portion parallel to the curved stem electrode.

It is preferable that the plurality of branch electrodes are arranged symmetrically with respect to the center line of the pixel electrode parallel to the gate line, and the branch electrodes preferably have an inclination angle inclined with respect to the gate line.

The thin film transistor array panel may further include a storage electrode line forming a storage capacitor overlapping the pixel electrode, and the storage electrode line is preferably disposed at the centers of the gate lines adjacent to each other.

Preferably, the drain electrode has a portion overlapping with the storage electrode line, and the pixel electrode may have an extension portion overlapping with the storage electrode line, and a portion of the drain electrode overlapping the extension portion and the storage electrode line has a boundary line parallel to the branch electrode. It is preferable.

A liquid crystal display according to an exemplary embodiment of the present invention is formed on an insulating substrate and insulates and intersects gate lines and data lines, and connects a plurality of first branch electrodes and first branch electrodes arranged in parallel to each other and is adjacent to each other. A thin film transistor array panel including a pixel electrode having a first stem electrode overlapping at least one of the two data lines, and a second branch electrode facing an thin film transistor array panel and forming an electric field in parallel with the first branch electrode. And a common electrode display panel including a common electrode having a second stem electrode connecting the second branch electrodes, and a liquid crystal layer formed between the common electrode display panel and the thin film transistor array panel.

It is preferable that the first stem electrode and the second stem electrode overlap each other, and the first stem electrode is preferably curved at an obtuse angle with respect to the first branch electrode.

The second stem electrode may be bent in parallel with the first stem electrode, and the first and second branch electrodes may be inclined at an arbitrary angle with respect to the gate line.

Then, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A structure of a thin film transistor array panel and a liquid crystal display including the same according to an exemplary embodiment of the present invention will now be described in detail with reference to the accompanying drawings.

First, a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to FIGS. 1 to 5.

1 is a layout view illustrating a structure of a liquid crystal display according to an exemplary embodiment of the present invention, FIG. 2 is a layout view illustrating a structure of a thin film transistor array panel in the liquid crystal display of FIG. 1, and FIG. 3 is a liquid crystal of FIG. 1. 4 and 5 are cross-sectional views of the liquid crystal display of FIG. 1 taken along lines IV-IV and VV. Referring to FIG.

The liquid crystal display according to the exemplary embodiment of the present invention is injected between the thin film transistor array panel 100, the common electrode display panel 200 facing the thin film transistor array panel 100, and the thin film transistor array panel 100 and the common electrode display panel 200. 200) a liquid crystal layer 3 comprising liquid crystal molecules (not shown) oriented horizontally with respect to the plane.

First, the thin film transistor array panel 100 will be described in detail with reference to FIGS. 1, 2, 4, and 5.

A plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on an insulating substrate 110 made of transparent glass or plastic.

The gate line 121 transmits a gate signal and mainly extends in a horizontal direction. Each gate line 121 includes a plurality of gate electrodes 124 protruding upward and end portions 129 having a large area for connection with another layer or an external driving circuit. A gate driving circuit (not shown) for generating a gate signal is mounted on a flexible printed circuit film (not shown) attached to the substrate 110 in the form of an integrated circuit chip, or the substrate 110. May be mounted directly on the substrate, or integrated into the substrate 110. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend to be directly connected to the gate driving circuit.

The storage electrode line 131 transmits a predetermined voltage, such as a common voltage, and extends in a horizontal direction substantially in parallel with the gate line 121. The storage electrode line 131 is formed of the same layer as the gate line 121. The storage electrode line 131 is positioned at the center between two neighboring gate lines 121 and may have an extension part projecting upward and downward to block leakage light.

The gate line 121 and the storage electrode line 131 may be formed of aluminum-based metal such as aluminum (Al) or aluminum alloy, silver-based metal such as silver (Ag) or silver alloy, copper-based metal such as copper (Cu) or copper alloy, or molybdenum ( It may be made of molybdenum-based metal such as Mo) or molybdenum alloy, chromium (Cr), tantalum (Ta) and titanium (Ti). However, they may have a multilayer structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having low resistivity, such as aluminum-based metal, silver-based metal, or copper-based metal, so as to reduce signal delay or voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum-based metals, chromium, tantalum, and titanium. Good examples of such a combination include a chromium bottom film, an aluminum (alloy) top film, and an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate line 121 may be made of various other metals or conductors.

Side surfaces of the gate line 121 and the storage electrode line 131 are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30 degrees to about 80 degrees.

A gate insulating layer 140 made of silicon nitride (SiNx) or silicon oxide (SiOx) is formed on the gate line 121 and the storage electrode line 131.

On the gate insulating layer 140, a plurality of island semiconductors 154 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated as a-Si), polycrystalline silicon, or the like are formed. The island semiconductors 154 may be disposed on the gate electrodes 124, and each may include an extension covering the boundary of the gate line 121.

A plurality of island type ohmic contacts 163 and 165 are formed on the island type semiconductor 154. The ohmic contacts 163 and 165 may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped, or may be made of silicide. The island-like ohmic contacts 163 and 165 are paired and disposed on the island-like semiconductor 154.

Side surfaces of the island-like semiconductor 154 and the ohmic contacts 163 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is about 30 degrees to about 80 degrees.

A plurality of data lines 171 and a plurality of drain electrodes 175 are formed on the ohmic contacts 163 and 165 and the gate insulating layer 140.

Each data line 171 transmits a data signal and mainly extends in a vertical direction to cross the gate line 121. Each data line 171 has a first and second end portions 179 having a large area for connecting a plurality of source electrodes 173 extending toward the gate electrode 124 with another layer or an external driving circuit. ). A data driving circuit (not shown) for generating a data signal is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or integrated in the substrate 110. Can be. When the data driving circuit is integrated on the substrate 110, the data line 171 may be extended to be directly connected to the data driving circuit.

Each of the drain electrodes 175 is separated from the data line 171 and faces the source electrode 173 with respect to the gate electrode 124. Each drain electrode 175 has one wide end 177 and the other end which is rod-shaped, and the rod end is partially surrounded by the source electrode 173 bent in a U-shape. The wide end portion 177 is positioned at the center between each of the two neighboring gate lines 121 and overlaps the storage electrode line 131, and is symmetrical and inclined with respect to the center line between the two neighboring gate lines 121. It is an isosceles triangle with true border. In addition, each of the drain electrodes 175 includes a connection portion 176 connecting the wide end portion 177 and the rod-shaped end portion, and the connection portion 176 is surrounded by the gate line 121 and the data line 171. Located at the edge of the area.

One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the island-like semiconductor 154 form one thin film transistor (TFT), and a channel of the thin film transistor ( A channel is formed in the semiconductor 154 between the source electrode 173 and the drain electrode 175.

The data line 171 and the drain electrode 175 are preferably made of a refractory metal such as molybdenum, chromium, tantalum, and titanium, or an alloy thereof, and include a refractory metal film (not shown) and a low resistance conductive film. It may have a multilayer structure including (not shown). Examples of the multilayer structure include a double layer of chromium or molybdenum (alloy) lower layer and an aluminum (alloy) upper layer, and a triple layer of molybdenum (alloy) lower layer and aluminum (alloy) interlayer and molybdenum (alloy) upper layer. However, the data line 171 and the drain electrode 175 may be made of various metals or conductors.

The ohmic contacts 163 and 165 exist only between the semiconductor 154 thereunder and the data line 171 and the drain electrode 175 thereon to lower the contact resistance therebetween. When the island type semiconductor 154 includes an extension part, the extension part is wider than the gate line 121 at the portion where the extension part meets the gate line 121 to soften the profile of the surface, thereby disconnecting the data line 171 located above. Prevent it. The semiconductor 154 includes portions exposed between the source electrode 173 and the drain electrode 175 and not covered by the data line 171 and the drain electrode 175.

A passivation layer 180 is formed on the data line 171, the drain electrode 175, and the exposed semiconductor 154. The passivation layer 180 may be made of an organic insulator having a low dielectric constant, may have photosensitivity, and its dielectric constant is preferably about 4.0 or less. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 154 while maintaining excellent insulating properties of the organic layer.

In the passivation layer 180, a plurality of contact holes 182 and 185 exposing the end portion 179 and the drain electrode 175 of the data line 171 are formed, respectively, and the passivation layer 180 and the gate insulating layer are formed. A plurality of contact holes 181 exposing the end portion 129 of the gate line 121 are formed at 140.

A plurality of pixel electrode lines 191 and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180. They may be made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

Each of the pixel electrodes 191 extends in the vertical direction from two stem electrodes 191b extending in the vertical direction at the edge of the region surrounded by the gate line 121 and the data line 171 and faces the stem electrode 191b in the vertical direction. The extension 197 is connected to the branch electrode 191a connecting the first electrode 191b and the stem electrode 191b and overlaps the wide end portion 177 of the drain electrode 175. One of the two stem electrodes 191b facing each other overlaps the data line 171, and the other one overlaps the connection portion 176 of the drain electrode 175. The extension 197 has a large area and has a boundary line parallel to the wide end portion 177 of the branch electrode 191a and the drain electrode 175.

The branch electrode 191a is inclined at a predetermined angle with respect to the gate line 121, and the upper branch electrode and the lower branch electrode are arranged symmetrically with respect to the center line of the pixel electrode 191 parallel to the gate line 121. Each includes.

Each pixel electrode 191 is physically and electrically connected to the drain electrode 175 through the contact hole 185 and receives a data voltage from the drain electrode 175.

The pixel electrode 191 to which the data voltage is applied generates a electric field together with the common electrode 270 (see FIGS. 1 and 4) to which the common voltage is applied, thereby forming a liquid crystal layer (not shown) on the two electrodes 191 and 270. Direction of the liquid crystal molecules. The polarization of light passing through the liquid crystal layer varies according to the direction of the liquid crystal molecules determined as described above.

 In the liquid crystal display including the thin film transistor array panel, the liquid crystal molecules have positive or negative dielectric anisotropy and are oriented almost parallel to the surface of the substrate 110.

At this time, if the liquid crystal molecules have a positive dielectric anisotropy and the horizontal direction is the rubbing direction of the liquid crystal molecules, the liquid crystal molecules positioned in the regions corresponding to the upper and lower branch electrodes may have the gate lines 121 with respect to the branch electrodes 191a. It is oriented to have an initial twist angle as much as it is inclined at a predetermined angle. Therefore, the initial torsion angle is defined as an angle formed by the rubbing direction and the longitudinal direction of the branch electrode or an angle formed by the rubbing direction and the branch electrode, and is preferably greater than 0 degrees and less than or equal to 30 degrees to prevent luminance decrease.

In this case, the liquid crystal molecules positioned in the region corresponding to the upper branch electrode of the pixel electrode 191 rotate in the clockwise direction by the initial twist angle when a voltage is applied, and the liquid crystal molecules are located in the region corresponding to the lower branch electrode of the pixel electrode 191. The liquid crystal molecules positioned rotate counterclockwise by the initial twist angle when a voltage is applied. Thus, two domains are formed, and visibility in the left and right directions is improved.

When the liquid crystal molecules have negative dielectric anisotropy, the liquid crystal molecules may be aligned in a vertical direction parallel to the data lines 171a and 171b.

The pixel electrode 190 and the common electrode 270 (see FIGS. 1 and 4) form a capacitor (hereinafter referred to as a "liquid crystal capacitor") to maintain an applied voltage even after the thin film transistor is turned off. In order to enhance the voltage holding capability, another capacitor connected in parallel with the liquid crystal capacitor is provided and is called a storage capacitor. The storage capacitor is formed by overlapping the pixel electrode 190 with the storage electrode line 131. The storage capacitor is connected to the pixel electrode 190 with an extension on the storage electrode line 131 to increase the capacitance of the storage capacitor, that is, the storage capacitance. By extending and extending the wide end portion 177 of the drain electrode 175 to close the distance between the terminals and to increase the overlap area.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact auxiliary members 81 and 82 compensate for and protect the adhesion between the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 and the external device.

Next, the common electrode display panel 200 will be described with reference to FIGS. 3 to 4.

The common electrode 270 made of a transparent conductor such as ITO or IZO is formed on the insulating substrate 210 made of transparent glass.

The common electrode 270 extends in the vertical direction from two stem electrodes 270b extending in the vertical direction at the edge of the area surrounded by the gate line 121 and the data line 171 and the stem electrodes 270b facing each other ( It includes a branch electrode 270a connecting the 270b. The two stem electrodes 270b overlap the data line 171, and the branch electrodes 270a are parallel to and alternately arranged with the excitation electrode 191a of the pixel electrode 191.

The common electrode panel 200 includes a light blocking member 220 such as a black matrix to block light leaking between the region surrounded by the gate line 121 and the data line 171. The light blocking member 220 may include a portion corresponding to the gate line 121 or the data line 171 and a portion corresponding to the thin film transistor.

In the common electrode display panel 200, a plurality of color filters 230 and a planarization film 250 are sequentially formed. The color filter 230 is mostly located in an area surrounded by the light blocking member 220, and the planarization layer 250 is made of an insulating material. The color filter may extend in the vertical direction, and the color filter may display one of primary colors such as red, green, and blue.

Horizontal alignment layers 11 and 21 are coated on the inner surfaces of the display panels 100 and 200, respectively, and polarizing plates 12 and 22 are provided on the outer surfaces thereof.

The alignment layers 11 and 21 may be vertical alignment layers.

The transmission axes of the two polarizing plates 12 and 22 are orthogonal, and one transmission axis is parallel to the gate line 121.

A phase retardation film may be interposed between the display panels 100 and 200 and the polarizers 12 and 22 to compensate for the delay value of the liquid crystal layer 3, respectively. The phase retardation film has birefringence and serves to reversely compensate for the birefringence of the liquid crystal layer 3. As the retardation film, a uniaxial or biaxial optical film can be used, and in particular, a negative uniaxial optical film can be used.

The liquid crystal display may also include a polarizer 12 and 22, a phase retardation film, display panels 100 and 200, and a backlight unit for supplying light to the liquid crystal layer 3.

In the liquid crystal display according to the exemplary embodiment of the present invention, one of the stem electrodes 191b of the pixel electrode 191 overlaps the data line 171 to maximize the aperture ratio of the pixel. The transmittance can be improved by blocking the texture generated nearby. In this case, a protective film 180 of an organic material having a low dielectric constant is disposed between the stem electrode 191b of the pixel electrode 191 and the data line 171, thereby minimizing signal interference therebetween.

In addition, the storage electrode line 131 or the drain electrode 175, which is an opaque film, is disposed at the horizontal center of the branch electrode symmetrically arranged with respect to the horizontal center line of the pixel electrode 191, and a boundary line parallel to the branch electrode 191a is disposed. The branches may block the generation of the texture by arranging the extension 197 of the pixel electrode 191, thereby maximizing the transmittance of the pixel.

In addition, the connection part 176 of the drain electrode 175 and the stem electrode 191b of the pixel electrode are disposed to overlap each other at the edge of the pixel area adjacent to the data line 171, thereby maximizing the aperture ratio and transmittance of the pixel. have.

In addition, a passivation layer 180 made of an organic material having a low dielectric constant is formed between the gate line 121, the data line 171, and the pixel electrode 191, so that the gate line 121 and the data line 171 may be formed. Parasitic capacitance generated between the pixel electrodes 191 may be minimized.

6 is a layout view showing the structure of another liquid crystal display device according to another embodiment of the present invention, FIG. 7 is a layout view showing the structure of another liquid crystal display device according to another embodiment of the present invention, and FIG. 9 is a layout view showing the structure of another liquid crystal display device according to another embodiment, and FIG. 9 is a layout view showing the structure of another liquid crystal display device according to another embodiment of the present invention.

6 to 9, the structure of the liquid crystal display according to the exemplary embodiments is the same as that of FIGS. 1 to 5.

In the thin film transistor array panel, a plurality of gate lines 121 and a plurality of storage electrode lines 131 including a gate electrode 124 are formed on the substrate 110, and a gate insulating layer 140 and a plurality of island-type semiconductors are formed thereon. 154 and a plurality of island resistive contact members 163 and 165 are sequentially formed. A plurality of data lines 171 and a plurality of drain electrodes 175 including the source electrode 173 are formed on the ohmic contacts 163 and 165 and the gate insulating layer 140, and the passivation layer 180 is disposed thereon. A plurality of contact holes 181, 182, and 185 are formed in the passivation layer 180 and the gate insulating layer 140. A plurality of pixel electrodes 191 and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180.

In addition, the common electrode display panel includes a common electrode 270 including a stem electrode 270b extending in parallel in the vertical direction and a branch electrode 270a disposed in parallel with and alternately arranged with the branch electrode 191a of the pixel electrode 191. ) Is formed.

However, as shown in FIG. 6, in the thin film transistor array panel according to the present exemplary embodiment, the connection portion 176 of the drain electrode 175 and the stem electrode 191b of the pixel electrode 191 adjacent thereto are disposed in parallel without overlapping each other. It is.

In addition, as shown in FIG. 7, the stem electrode 191b of the pixel electrode 191 has an obtuse angle with respect to the branch electrode 191a, and the branch electrode 270a of the common electrode 270 and the stem electrode 270b meet each other. The portion is bent to have an acute angle with respect to the branch electrode 270a of the common electrode 270. In this case, it is preferable that the vertices of the curved stem electrode 191b overlap the data line 171, and the stem electrodes 191b of the pixel electrodes 191 adjacent to each other are preferably parallel to each other. As described above, in the structure in which the stem electrode 191b of the pixel electrode 191 is refracted to have an acute angle with respect to the branch electrode 270a of the common electrode 270 facing the stem electrode 191b of the pixel electrode 191. And an electric field formed between the branch electrode 270a of the common electrode 270 with respect to the direction of the electric field formed between the branch electrode 191a of the pixel electrode 191 and the branch electrode 270a of the common electrode 270. It is formed as parallel as possible to minimize the texture generated near the stem electrode 191b, thereby improving the transmittance of the pixel.

8, the connection portion 176 of the drain electrode 175 is also bent at an obtuse angle with respect to the branch electrode 191a in parallel with the stem electrode 191b of the pixel electrode 191. In this case, although the connection portion 176 of the drain electrode 175 and the stem electrode 191b of the pixel electrode 191 do not overlap each other, they may not be.

In addition, as shown in FIG. 9, the stem electrode 270b of the common electrode 270 is bent in parallel with the stem electrode 191b of the pixel electrode 191 and the connection portion 176 of the drain electrode 175.

Next, the arrangement of the liquid crystal molecules according to the potential difference between the two field generating electrodes in the liquid crystal display according to the exemplary embodiment of the present invention will be described in detail.

FIG. 10 is a plan view illustrating an arrangement of liquid crystal molecules without an electric field applied to two field generating electrodes in the liquid crystal display according to the exemplary embodiment of the present invention, and FIG. 11 is a liquid crystal display according to the exemplary embodiment of the present invention. FIG. 12 is a plan view illustrating an arrangement of liquid crystal molecules in a state in which an electric field is applied to two field generating electrodes, and FIG. 12 is a cross-sectional view illustrating an arrangement of liquid crystal molecules when driving the liquid crystal display according to an exemplary embodiment of the present invention.

First, an arrangement of liquid crystal molecules without an electric field formed on the branch electrode 270a of the common electrode 270 that is the field generating electrode and the branch electrode 191a of the pixel electrode 191 will be described with reference to FIGS. 10 and 12. As illustrated, the liquid crystal molecules 310 positioned between the branch electrode 270a of the common electrode 270 and the branch electrode 191a of the pixel electrode 191 have negative dielectric anisotropy and are oriented in the vertical direction. . Therefore, the liquid crystal molecules 310 have a pretilt angle at an arbitrary angle with respect to the direction perpendicular to the direction in which the branch electrodes 191a and 270a extend. For example, the alignment layer 11 of the lower panel 100 is rubbed to have an inclination angle α of about 60 ° to 85 ° with respect to the direction P in which the branch electrodes 191a and 270a extend, and the upper panel 200 Rubbing to have the same inclination angle as that of the alignment layer 11 of the lower panel 100, but rubbing to form a 180 ° with the rubbing direction R of the alignment layer 11 of the lower panel 100. In this case, the long axis of the liquid crystal molecules 310 is arranged at an angle α of about 60 to 85 degrees with respect to the direction P in which the branch electrodes 191a and 270a extend.

Next, an arrangement of liquid crystal molecules in a state in which an electric field is formed in the branch electrode 270a of the common electrode 270 that is the field generating electrode and the branch electrode 191a of the pixel electrode 191 is illustrated in FIGS. 11 and 12. As described above, an electric field E is formed between the branch electrodes 191a and 270a. In this case, since the liquid crystal molecules 310 positioned between the branch electrode 191a of the pixel electrode 191 and the branch electrode 270a of the common electrode 270 have negative dielectric anisotropy, their major axis is the length of the electric field E. Rotate in the R ₁ direction to be perpendicular to the direction. The liquid crystal molecules 310 are inclined at a predetermined angle with respect to the branch electrodes 191a and 270a by rubbing the alignment layers 11 and 21, and thus, when the voltage is applied, the initial direction of rotation (clockwise) This is determined and the liquid crystal molecules 310 rotate uniformly in the same direction. In this case, the liquid crystal molecules 310 rotate about parallel to the surfaces of the two substrates 110 and 210.

In the liquid crystal display according to the exemplary embodiment as described above, the pixel electrode 191 includes a plurality of linear branch electrodes 191a, the common electrode 270, and the branch electrode of the pixel electrode 191 ( Since a plurality of branch electrodes 270a which do not overlap with 191a are included, a portion where the pixel electrode 191 and the common electrode 270 overlap with each other is minimized to have a low liquid crystal capacitance. Thus, it is advantageous for high frequency driving (120 Hz) such as impulsive driving.

In addition, since the initial orientation of the liquid crystal molecules 310 is inclined at a predetermined angle with respect to the sub-electrode 182a, when the voltage is applied, the liquid crystal molecules 310 uniformly rotate in the same direction, so that texture may occur. It can be minimized.

As described above, in the liquid crystal display according to the exemplary embodiments, the aperture ratio of the pixel may be improved by overlapping the stem electrode of the pixel electrode parallel to the data line with the data line.

In addition, visibility can be improved by arranging the branch electrodes of the pixel electrodes symmetrically with respect to the horizontal center line of the pixel region, and improving the transmittance by arranging the sustain electrode and the drain electrode forming the sustain capacitor in the region where the texture is generated. The aperture ratio of the pixel can be maximized.

In addition, the connection part of the drain electrode and the stem electrode of the pixel electrode may be disposed at the edge of the pixel region to minimize the decrease in the transmittance of the aperture, and may be bent to minimize the texture occurring at the edge of the pixel region. The display characteristic of a liquid crystal display device can be improved.

Although the preferred embodiments of the present invention have been described in detail above, those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Accordingly, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention.

Claims (17)

Insulation board, A gate line formed on the insulating substrate and having a gate electrode; A gate insulating film covering the gate line, A semiconductor formed on the gate insulating film, A data line formed on the gate insulating layer and intersecting the gate line and having a source electrode formed on the semiconductor; A drain electrode formed on the semiconductor and facing the source electrode, A protective film covering the data line and the drain electrode and made of an organic material, A pixel electrode formed on the passivation layer and electrically connected to the drain electrode; The pixel electrode includes a plurality of stem electrodes overlapping the data lines and a plurality of branch electrodes connected to the stem electrodes and arranged in parallel with each other. In claim 1, A thin film transistor array panel in which only one of the two neighboring stem electrodes overlaps the data line. In claim 2, A portion of the stem electrode that does not overlap the data line among two neighboring stem electrodes overlaps with a portion of the drain electrode. In claim 1, And the stem electrode is bent at an obtuse angle with respect to the branch electrode. In claim 4, The drain electrode has a portion parallel to the curved stem electrode. In claim 1, The plurality of branch electrodes are arranged symmetrically with respect to the center line of the pixel electrode parallel to the gate line. In claim 6, And the branch electrode has an inclination angle inclined with respect to the gate line. In claim 1, And a storage electrode line forming a storage capacitor overlapping the pixel electrode. In claim 8, And the storage electrode lines are disposed at the centers of the gate lines adjacent to each other. In claim 9, And the drain electrode has a portion overlapping with the storage electrode line. In claim 10, And the pixel electrode has an extension that overlaps the storage electrode line. In claim 11, A portion of the drain electrode overlapping the extension portion and the sustain electrode line has a boundary line parallel to the branch electrode. A gate line and a data line formed on an insulating substrate and insulated from each other and intersecting with each other; a plurality of first branch electrodes and the first branch electrodes arranged in parallel to each other and overlapping at least one of the two adjacent data lines A thin film transistor array panel including a pixel electrode having a first stem electrode A common electrode display panel facing the thin film transistor array panel, the common electrode display panel including a common electrode having a second branch electrode connecting the second branch electrode and a second branch electrode to form an electric field in parallel with the first branch electrode; And a liquid crystal layer formed between the common electrode display panel and the thin film transistor array panel. In claim 13, The first stem electrode and the second stem electrode overlap each other. The method of claim 13, The first stem electrode is curved with an obtuse angle with respect to the first branch electrode. The method of claim 15, The second stem electrode is curved in parallel with the first stem electrode. In claim 13, And the first and second branch electrodes are inclined at an angle with respect to the gate line.

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