KR20060009744A - Liquid crystal display - Google Patents

Abstract

A liquid crystal display device for solving a display defect is disclosed. The switching element is connected to a gate line carrying a gate signal and a source line carrying a data signal, the liquid crystal capacitor is connected at one end to the switching element, the other end to a common electrode voltage, and one end of the storage capacitor is connected to the switching element. The storage line is connected to the other end of the storage capacitor to transmit a storage voltage that repeats a voltage corresponding to a low gray level and a voltage corresponding to a middle gray level. Accordingly, by using the low gray or the mid gray as the storage voltage, it is possible to solve the light leakage and the afterimage generated after the repair process in the liquid crystal display having the independent wiring system.

Storage Capacitors, Independent Wiring, Repairs, Light Leaks, Afterimages

Description

Liquid Crystal Display {LIQUID CRYSTAL DISPLAY}

FIG. 1A is an equivalent circuit diagram for describing a front gate method, and FIG. 1B is an equivalent circuit diagram for describing an independent wiring method.

2 is a block diagram illustrating a liquid crystal display device employing a storage voltage application method according to an exemplary embodiment of the present invention.

FIG. 3 is a layout diagram illustrating unit pixels of FIG. 2, in particular, showing unit pixel regions formed on an array substrate.

4 is a cross-sectional view taken along the line II ′ of FIG. 3.

FIG. 5 is a block diagram illustrating a source FPCB and a source tap IC of FIG. 2.

6 is a block diagram illustrating a liquid crystal display device employing a storage voltage application method according to another exemplary embodiment of the present invention.

FIG. 7 is a block diagram illustrating a source FPCB and a source tap IC of FIG. 6.

<Description of the symbols for the main parts of the drawings>

110, 210: source PCB 120, 220: source FPCB

130: gate PCB 140: gate FPCB

150: liquid crystal panel 122: source tap IC

122a, 222a: Shift register 122b, 222b: Data latch                 

122c, 222c: Digital-to-analog converter 122d, 222d: Output buffer section

225, 226, 228: pads 224, 227: conductive path

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device for solving a display defect.

In general, when driving the liquid crystal display, a voltage applied to one pixel is not maintained by the liquid crystal capacitor Clc for one frame, thus forming a separate storage capacitor Cst. The liquid crystal display is classified into a front gate method as shown in FIG. 1A and an independent wiring method as shown in FIG. 1B according to a method of generating the storage capacitor Cst.

In the front gate method, since the storage capacitor is connected to the front gate, a gate on / off voltage Von / Voff is automatically applied to the storage voltage applied to the storage capacitor. However, in the independent wiring method, since the storage capacitor is connected to a separate storage line, the storage voltage applied to the storage capacitor must apply an artificial voltage value from the outside.

Typically, the independent wiring type storage voltage uses the common electrode voltage Vcom or the intermediate value Gcnt of the gamma power supply. In this case, in the liquid crystal display of the TN mode, there is a problem in that a display defect such as light leakage and an afterimage occurs even when a repair process is performed due to pixel defects. The light leakage is a liquid crystal disclination phenomenon occurring near the black matrix region, and the afterimage is generated by a voltage charged and trapped in the pixel.

Specifically, in the region where light leakage is blocked by the black matrix, the DC level of the storage voltage applies only an electric field in one direction to the liquid crystal layer, so light leakage may occur due to declining, or afterimage may occur due to the pixel electrode. There is a problem.

Accordingly, the technical problem of the present invention is to solve such a conventional problem, and an object of the present invention is to provide a liquid crystal display device for solving a display defect caused by light leakage or an afterimage generated after performing a pixel repair process.

According to an aspect of the present invention, there is provided a liquid crystal display device comprising: a switching element connected to a gate line transferring a gate signal and a source line transferring a data signal; A liquid crystal capacitor having one end connected to the switching element and the other end connected to the common electrode voltage; A storage capacitor, one end of which is connected to the switching element; And a storage line connected to the other end of the storage capacitor and transferring a storage voltage which repeats a voltage corresponding to a low gray level and a voltage corresponding to a middle gray level.

According to another aspect of the present invention, there is provided a liquid crystal display device comprising: a source printed circuit board; A switching element formed in an area defined by gate lines adjacent to each other and source lines adjacent to each other, a liquid crystal capacitor connected to the switching element, a storage capacitor connected to the switching element, and connected to the other end of the storage capacitor A liquid crystal panel having pixels including storage lines configured to transfer storage voltages that repeat the low gray voltage and the middle gray voltage; And a source flexible printed circuit board having a plurality of conductive paths formed thereon, mounting a source tab IC, and electrically connecting the source printed circuit board and the liquid crystal panel through the plurality of conductive paths.

According to such a liquid crystal display device, by using a low gray level or a medium gray level as a storage voltage, a light leakage or an afterimage generated after a repair process can be solved in a liquid crystal display device employing an independent wiring system.

Hereinafter, with reference to the accompanying drawings, it will be described in detail the present invention.

Example-1

2 is a block diagram illustrating a liquid crystal display device employing a storage voltage application method according to an exemplary embodiment of the present invention. In particular, the storage voltage is directly connected to the independent wiring of the liquid crystal panel through an output lead bonding (OLB) pad.

2, a liquid crystal display according to an exemplary embodiment of the present invention includes a source printed circuit board (PCB) 110 and a source flexible printed circuit board (FPCB) 120. ), A gate PCB 130, a gate FPCB 140, and a liquid crystal panel 150.

The source PCB 110 is electrically connected to the source FPCB 120 to provide various clocks for outputting the image signal together with the image signal. For example, the image signal is an RGB image signal provided from a kind of timing controller (not shown), and the various clocks are data driver driving signals, such as a load signal LOAD and a horizontal start signal STH.

The source FPCB 120 has a plurality of conductive paths formed thereon, and a source tap IC 122 is mounted to correspond to the conductive paths, and the source tap IC 122 is an output lead that is a respective terminal of the plurality of conductive paths. An Out Lead Bonding (OLB) pad may be electrically connected to the source PCB 110 and the liquid crystal panel 150. The OLB pad is formed in an area for electrically connecting with the liquid crystal panel 150.

The gate PCB 130 is electrically connected to the gate FPCB 140 to provide a gate clock or vertical start signal STV to the gate FPCB 140.

The gate FPCB 140 has a plurality of conductive paths formed thereon, and a gate tap IC 142 is mounted to correspond to the conductive paths, and the gate tap IC 142 is connected to the gate PCB 130 through the plurality of conductive paths. ) And the liquid crystal panel 150 are electrically connected to each other.

The liquid crystal panel 150 includes a plurality of gate lines GL extending in a horizontal direction and arranged in a vertical direction, a plurality of source lines SL extending in a vertical direction and arranged in a horizontal direction, and extending in a vertical direction. The main storage line STM and a plurality of sub storage lines STS connected to the main storage line STM while being extended in a horizontal direction. The main storage line STM has a pad in a terminal area (or an input terminal) and is electrically connected to an OLB pad of the source FPCB 120.

In addition, the liquid crystal panel 150 extends in the horizontal direction and is arranged in the vertical direction to transmit the gate signal, and is formed in parallel with the gate line GL, so that the liquid crystal panel 150 has a black or medium gray scale. A sub storage line STS connected to a corresponding voltage, a plurality of source lines SL extending in a vertical direction and arranged in a horizontal direction to transfer an image signal, and formed in parallel with the source line SL The main storage line STM may transfer a voltage corresponding to the black gray level or the middle gray level to the sub storage line STS.

In addition, the liquid crystal panel 150 includes a switching element TFT formed in an area defined by gate lines GL adjacent to each other and source lines SL adjacent to each other, and a liquid crystal connected to the switching element TFT. A pixel including a capacitor CLC and a storage capacitor CST, one end of which is connected to the switching element TFT and the other end of which is connected to the sub storage line STS and connected to a voltage corresponding to a black gradation or a middle gradation. Is formed. The gate electrode of the switching element TFT is connected to the gate line GL, the source electrode is connected to the source line SL, and the drain electrode is connected to the pixel electrode which is the first electrode of the liquid crystal capacitor CLC. . The storage capacitor CST uses the pixel electrode as a first electrode and the gate electrode as a second electrode.

In order to explain the present invention more clearly, a description will be made of a driving operation by a normal pixel and a driving operation by a repaired pixel. The repaired pixel is opened between the switching element TFT and the liquid crystal capacitor Clc to show a structure in which the sub storage line STS and the liquid crystal capacitor Cst are connected to each other.

First, the normal pixel stores the image data signal transmitted to the source line SL in the liquid crystal capacitor Clc and the storage capacitor Cst via the switching element TFT as the gate line GL is activated. Serves to display an image for one frame in response to the stored potential difference.

However, in the repaired pixel, a voltage transmitted by the sub storage line STS is supplied to the first electrode of the liquid crystal capacitor Clc regardless of the active state of the gate line GL. Since the common electrode voltage Vcom is applied to the second electrode of the liquid crystal capacitor Clc and a voltage corresponding to the black gray level or the middle gray level is applied to the first electrode, the common electrode voltage Vcom and the black gray voltage are applied. An image is displayed in response to the potential difference between the potential difference or the potential difference between the common electrode voltage Vcom and the intermediate gray voltage.

In the drawing, a separate output dummy line for outputting low or medium grayscale data is formed only in the source tap IC of the rightmost of the plurality of source tap ICs employed in the liquid crystal panel 150, and the output dummy line is a main storage line. Although connected to the (STM) is shown, a separate output dummy line may be formed in every source tap IC.

In this case, it is preferable to connect through a separate bridge wiring in order to connect the storage lines provided in the adjacent pixels in the vertical direction. That is, since separate different wirings are formed between pixels adjacent to each other and formed on the same substrate, it is preferable to connect through a bridge wiring having a kind of jump function in order to block an electrical effect on the other wirings.

Next, the pixel repair of the liquid crystal display device having the independent wiring method according to the present invention will be described with reference to FIGS. 3 and 4.

FIG. 3 is a layout diagram illustrating unit pixels of FIG. 2, in particular, showing unit pixel regions formed on an array substrate.

Referring to FIG. 3, an array substrate according to the present invention includes a plurality of gate lines GL, a plurality of source lines SL, a switching element TFT, a sub storage line 512, and a pixel electrode 550. .

The plurality of gate lines GL extend in the horizontal direction on the transparent substrate (not shown) and are arranged in the vertical direction, and the plurality of source lines SL extend in the vertical direction on the transparent substrate and in the horizontal direction. Arranged to define multiple partitioned regions.

A switching element TFT is formed in the partitioned region, the gate electrode line 5210 extending from the gate line GL, the source electrode line 530 extending from the source line SL, and the source electrode line. Drain electrode line 532 spaced apart from 530.

The sub storage line 512 is formed while substantially defining a W shape when the gate line GL is formed, and is connected to the main storage line although not illustrated. The sub storage line 512 has a storage capacitance value by an area and a distance overlapping the pixel electrode 550 formed thereon.

The pixel electrode 550 is formed of a transparent ITO layer or an IZO layer, and is formed in each pixel area partitioned by gate lines GL adjacent to each other and source lines SL adjacent to each other. It is connected to the drain electrode line 532 through 543 to receive a pixel voltage for the display.

4 is a cross-sectional view taken along the line II ′ of FIG. 3, and particularly shows a liquid crystal panel.

Referring to FIG. 4, the liquid crystal panel according to the present invention includes an array substrate 500, a color filter substrate 600, and a liquid crystal layer 700 formed between the array substrate 500 and the color filter substrate 600. do.

The array substrate 500 includes a gate electrode 510, a first sub storage line 512, a second sub storage line 514, and a gate electrode extending from a gate line GL formed on a transparent substrate 505. 510 and a gate insulating film 519 formed on the transparent substrate 505. The first sub storage line 512 corresponds to a corresponding pixel, and the second sub storage line 514 corresponds to an adjacent pixel.

In addition, the array substrate 500 may include a switching element TFT including a semiconductor layer 520, an ohmic contact layer 521, a source electrode 530, and a drain electrode 532, and the switching element TFT. A passivation layer 540 that covers a portion of the drain electrode 532, and an organic insulating layer 542 that is thinly formed while exposing a portion of the drain electrode while covering the passivation layer 540. do.

In addition, the array substrate 500 may include a pixel electrode 250 that is partially opened on the organic insulating layer 542 and is connected to the drain electrode 219 through a contact hole 243. The pixel electrode 550 is a kind of transmission electrode that transmits light, and indium tin oxide (ITO), tin oxide (TO), or indium zinc oxide (IZO) is used.

Meanwhile, the color filter substrate 600 may include a color pixel layer 610 formed on each of R, G, and B pixel areas on the transparent substrate 605, and a surface protection applied to protect the color pixel layer 610. A layer (not shown) and a common electrode layer 620 formed on the surface protection layer, that is, the surface close to the liquid crystal layer 700.

In general, when a TFT failure occurs in the liquid crystal display device, if the liquid crystal display device adopts a normally white mode, the area corresponding to the defective TFT is displayed in white when driving. This is because the white is perceived as a strong defect.

In order to eliminate such defects, a pixel repair process is performed. That is, the laser beam is applied to the pixel repair region PRA1 to electrically connect the pixel electrode 550 and the sub storage line 512, which define one electrode of the liquid crystal capacitor Clc.

Therefore, a voltage corresponding to black gray data or intermediate gray data is transferred to the sub storage line 512.

That is, even though grayscale data is not normally applied to the pixel electrode through the switching element, a voltage corresponding to the black gray or the middle grayscale data is transmitted to the pixel electrode through the sub storage line, so that the defective pixel is displayed to the user as a black or middle grayscale screen. Therefore, it is possible to relatively reduce the occurrence of defects.

FIG. 5 is a block diagram illustrating a source FPCB and a source tap IC of FIG. 2.

As illustrated in FIG. 5, a plurality of conductive paths are formed in a source FPCB 120, a source tap IC 122 is mounted, and the source PCB 110 and the liquid crystal panel (via the plurality of conductive paths). 150) is electrically connected. In particular, the source FPCB 120 further includes a dummy output port for outputting a storage voltage corresponding to a low gray level or a medium gray level, and a pad for connection to the storage line.

The source tap IC 122 includes a shift register 122a, a data latch 122b, a digital-to-analog converter (DAC) 122c, and an output buffer portion 122d, and a gray scale data signal provided from the source PCB 110. Is output to the liquid crystal panel 150 through the output terminal of the source FPCB (120). In particular, the source tap IC 122 further includes an effective output port for outputting an image signal, and a dummy output port for outputting a storage voltage corresponding to the low gray level or the middle gray level. The effective output port is electrically connected to the source line SL of the liquid crystal panel 150, and the dummy output port is electrically connected to the main storage line STM of the liquid crystal panel 150.

In detail, the shift register 122a sequentially provides the enable signal to the data latch 122b in response to the dot clock DCLK provided from the outside. The data latch 122b stores an image driving digital signal in response to the enable signal and outputs the digital signal to the digital analog converter 122c. The digital-to-analog converter 122c converts an image driving digital signal into an analog signal and outputs data to be applied to the odd-numbered data lines of the liquid crystal panel 150 and data to be applied to the even-numbered data lines. Output to The output buffer unit 122d outputs the odd-numbered gradation data signal stored in response to the application of the load signal LOAD or TP to the liquid crystal panel 150 through the output terminal of the source FPCB 120. The output buffer 122d is a buffer capable of storing an analog signal, and includes a first buffer for receiving and storing data to be applied to odd-numbered data lines of the liquid crystal panel 150 and an even-numbered data line. The second buffer may be configured to receive and store data.

Example-2

6 is a block diagram illustrating a liquid crystal display device employing a storage voltage application method according to another exemplary embodiment of the present invention. In particular, one side of the source driver IC is connected to the independent wiring of the liquid crystal panel 150 after receiving the storage voltage feedback to the source PCB through the dummy line.

Referring to FIG. 6, a liquid crystal display according to another exemplary embodiment of the present invention may include a source printed circuit board (PCB) 210, a source flexible printed circuit board (FPCB) 220. ), A gate PCB 130, a gate FPCB 140, and a liquid crystal panel 150. Compared with FIG. 2, the same reference numerals are assigned to the same components, and description thereof will be omitted.

The source PCB 210 is electrically connected to the source FPCB 220 to provide various clocks for outputting the image signal together with the image signal. The source PCB 210 includes an amplifier 212, receives a low gray level or a middle gray level data signal provided from the source tap IC 222 of the source FPCB 220, amplifies it, and passes through the source FPCB 220 again. And transfer to the main storage line STM of the liquid crystal panel 150.

The source FPCB 220 has a plurality of conductive paths formed thereon, and a source tap IC 222 is mounted corresponding to the conductive path, and the source tap IC 222 is an output lead which is a respective terminal of the plurality of conductive paths. An Out Lead Bonding (OLB) pad may be electrically connected to the source PCB 210 and the liquid crystal panel 150. The OLB pad is formed in an area for electrically connecting with the liquid crystal panel 150.

In order to explain the present invention more clearly, a description will be made of a driving operation by a normal pixel and a driving operation by a repaired pixel. The repaired pixel is opened between the switching element TFT and the liquid crystal capacitor Clc to show a structure in which the sub storage line STS and the liquid crystal capacitor Cst are connected to each other.

First, the normal pixel stores the image data signal transmitted to the source line SL in the liquid crystal capacitor Clc and the storage capacitor Cst via the switching element TFT as the gate line GL is activated. Serves to display an image for one frame in response to the stored potential difference.

However, in the repaired pixel, a voltage transmitted by the sub storage line STS is supplied to the first electrode of the liquid crystal capacitor Clc regardless of the active state of the gate line GL. Since the common electrode voltage Vcom is applied to the second electrode of the liquid crystal capacitor Clc and a voltage corresponding to the black gray level or the middle gray level is applied to the first electrode, the common electrode voltage Vcom and the black gray voltage are applied. An image is displayed in response to the potential difference between the potential difference or the potential difference between the common electrode voltage Vcom and the intermediate gray voltage.

FIG. 7 is a block diagram illustrating a source FPCB and a source tap IC of FIG. 6.

As shown in FIG. 7, a plurality of conductive paths are formed in a source FPCB 220, a source tap IC is mounted, and the source printed circuit board and the liquid crystal panel are formed through pads that are terminals of the plurality of conductive paths. 150) is electrically connected.

In particular, the source FPCB 220 includes a first dummy conductive path 224 and a first dummy pad 225 for transmitting a storage voltage corresponding to a low gray level or a medium gray level to the source PCB 210. A second dummy pad 226, a second dummy conductive path 227, and a third dummy pad 228 may be further provided to transfer the amplified storage voltage transferred from 210. Here, the first dummy pad 225 is provided for electrical connection with the source PCB 210, and the second and third dummy pads 226 and 228 are main storage lines of the liquid crystal panel 150. STM) is provided for connection.

The source tap IC 222 includes a shift register 222a, a data latch 222b, a digital-to-analog converter (DAC) 222c, and an output buffer portion 222d, and a gray scale data signal provided from the source PCB 210. Is output to the liquid crystal panel 150 through the output terminal of the source FPCB (220). In particular, the source tap IC 222 further includes an effective output port for outputting an image signal, and a dummy output port for outputting a storage voltage corresponding to the low or mid gradation. The effective output port is electrically connected to the source line SL of the liquid crystal panel 150, and the dummy output port is electrically connected to the main storage line STM of the liquid crystal panel 150.

In detail, the shift register 222a sequentially provides the enable signal to the data latch 222b in response to a dot clock DCLK provided from the outside. The data latch 222b stores the image driving digital signal in response to the enable signal and outputs the digital signal to the digital analog converter 222c. The digital-to-analog converter 222c converts an image driving digital signal into an analog signal and outputs data to be applied to the odd-numbered data line of the liquid crystal panel 150 and data to be applied to the even-numbered data line. Output to The output buffer unit 222d outputs the odd-numbered gradation data signal stored in response to the application of the load signal LOAD or TP to the liquid crystal panel 150 through the output terminal of the source FPCB 220. The output buffer unit 222d is a buffer capable of storing analog signals. The output buffer unit 222d is a first buffer for receiving and storing data to be applied to odd-numbered data lines of the liquid crystal panel 150 and to be applied to even-numbered data lines. The second buffer may be configured to receive and store data.

As described above, according to the present invention, the black gray and the middle gray output from the source driver are used as the storage voltage Vcst. Therefore, since the potential difference between the common electrode voltage Vcom and the pixel is always the black tone, the potential difference due to the failure can be reduced by recognizing it as a relatively less white defect than the black defect after the defective TFT repair process.

In addition, the liquid crystal formed in the region where the defect is generated can sense the potential difference between the black and the gray scale in both directions without feeling only the potential in one direction, thereby preventing the unwanted arrangement from occurring, thereby reducing the adverse effects of light leakage and afterimage.

Although described above with reference to the embodiments, those skilled in the art can be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below. I can understand.

Claims (7)

A switching element connected to the gate line transferring the gate signal and the source line transferring the data signal; A liquid crystal capacitor having one end connected to the switching element and the other end connected to the common electrode voltage; A storage capacitor, one end of which is connected to the switching element; And And a storage line connected to the other end of the storage capacitor to transmit a storage voltage which repeats a voltage corresponding to a low gray level and a voltage corresponding to a middle gray level. The liquid crystal display device of claim 1, wherein when operating in a normally black mode, the low gray level is a black gray level. The liquid crystal display device of claim 1, wherein the low gray level is a white gray level when operating in a normally white mode. Source printed circuit boards; A switching element formed in a region defined by gate lines adjacent to each other and source lines adjacent to each other, a liquid crystal capacitor connected to the switching element, a storage capacitor connected to the switching element, and connected to the other end of the storage capacitor A liquid crystal panel having pixels including storage lines configured to transfer storage voltages that repeat the low gray voltage and the middle gray voltage; And And a source flexible printed circuit board (PCB) having a plurality of conductive paths formed thereon, mounting a source tab IC, and electrically connecting the source printed circuit board and the liquid crystal panel through the plurality of conductive paths. The liquid crystal display of claim 4, wherein the low gray voltage and the middle gray voltage are repeated in units of frames. The semiconductor device of claim 4, wherein the source tap IC includes an effective output port for outputting an image signal, and a dummy output port for outputting a storage voltage corresponding to the low or mid-tones, The source flexible printed circuit board may further include a pad for connecting the dummy output port to the storage line. The display device of claim 4, wherein the source tap IC includes an effective output port for outputting an image signal, and a dummy output port for outputting a storage voltage corresponding to the low or mid-tones, The source flexible printed circuit board, A first dummy conductive path for providing a storage voltage output from the dummy output port to the source printed circuit board; A second dummy conductive path for transferring a storage voltage amplified from the source printed circuit board; And And a pad for connecting the second dummy conductive path and the storage line.

Images