KR20040061814A - Method for fabricating capacitor of semiconductor device - Google Patents

Abstract

PURPOSE: A method for fabricating a capacitor of semiconductor device is provided to prevent an etch defect without an additional wet process by performing an in-situ dry process on the liquid residue generated when a polycrystalline silicon is used as a hard mask layer of an oxide layer. CONSTITUTION: An interlayer dielectric(32) is formed on a semiconductor substrate(30). An oxide layer(36) for defining a storage node region is formed on the resultant structure. A hard mask layer(38) of a polycrystalline silicon material is formed on the oxide layer. The hard mask layer is selectively etched by using an etch mask for defining a storage node region so as to form a hard mask layer pattern exposing the oxide layer. A dry cleaning process is performed on the surface of the resultant structure by an in-situ method to eliminate the liquid residue. The oxide layer is etched to form a contact hole by using the hard mask layer pattern as a mask.

Description

METHODS FOR FABRICATING CAPACITOR OF SEMICONDUCTOR DEVICE

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a capacitor of a semiconductor device. In particular, when a hard mask layer used for forming a charge storage electrode in a cylindrical capacitor is used as a polycrystalline silicon layer, gas condensation occurs during hard mask patterning. The present invention relates to a method for manufacturing a capacitor of a semiconductor device capable of improving the process yield and the reliability of device operation by removing liquid residues by dry treatment to prevent defects in subsequent processes.

Generally, capacitors in DRAMs store a certain amount of charge to store and read information. Therefore, the capacitor should have sufficient capacitance, have the insulating property of the dielectric film with low leakage current, and have the reliability for repeated use for a long time.

The capacitance of the capacitor is proportional to the surface area and inversely proportional to the thickness of the dielectric film. As the device becomes more integrated, the allocation area of the unit element decreases, making it difficult to secure the capacitance of the capacitor. For this purpose, the height of the capacitor increases. As a result, process margins with adjacent cells are also decreasing.

1A and 1B are diagrams illustrating a capacitor manufacturing process of a semiconductor device according to the prior art, which is an example of a cylindrical capacitor.

First, an interlayer insulating film 12 including a charge storage electrode contact plug 14 is formed on a semiconductor substrate 10, and an oxide film 16, which is a sacrificial film serving as a charge storage electrode mask, is formed on the interlayer insulating film 12. And a hard mask layer 18 made of polysilicon.

Thereafter, after forming the photoresist pattern 20 as the charge storage electrode etching mask on the hard mask layer 18, the hard mask layer 18 is etched using the photoresist pattern 20 as a mask to expose the oxide layer 16. The hard mask layer 18 pattern is formed, and the photoresist pattern 20 is removed. At this time, the device is highly integrated, and the residues generated by the compression of the chlorine gas used as the etching gas between the fine hard mask layer 18 patterns absorb moisture in the air, thereby leaving the liquid residue 22. (See FIG. 1A).

Thereafter, the oxide film 16 exposing the hard mask layer 18 pattern as a mask is etched to form a charge storage electrode contact hole 24. In this case, the liquid residue 22 may remain in contact with the liquid residue 22 as an etching barrier because the etching may not proceed properly. (See FIG. 1B).

2A is a sample photograph of the portion A in which the actual liquid residue is present in FIG. 1B, and FIG. 2B is an enlarged portion photograph of the portion A of FIG. 2A, and the liquid residue 22 may be confirmed.

In order to solve this problem, a conventional method of removing a photoresist pattern after a hard mask layer etching process and a wet cleaning process using a cleaning solution to remove liquid residues has been performed. In addition, another defect may occur due to the added process, and there is another problem of lowering process yield and reliability of device operation.

The present invention is to solve the above problems, an object of the present invention is to in-situ liquid residue generated by using a polysilicon layer as a hard mask of the oxide film during the manufacturing process of a capacitor having a cylindrical charge storage electrode Process of manufacturing a capacitor of a semiconductor device which can improve the process yield and the reliability of device operation by simplifying the process by preventing the etching failure without adding a wet process by adding a dry process, and improving the process time compared to conventional wet cleaning. In providing.

1A and 1B illustrate a manufacturing process of a capacitor of a semiconductor substrate according to the prior art.

2A and 2B are SEM images of the semiconductor device in which the liquid residue shown in FIG. 1B is formed.

3A to 3C are diagrams illustrating a capacitor manufacturing process of a semiconductor device according to the present invention.

4 is a SEM photograph showing the residue in the state of FIG.

FIG. 5 is an SEM image of the ecology in which residues are removed in the state of FIG. 3B.

<Description of Symbols for Main Parts of Drawings>

10, 30: semiconductor substrate 12, 32: interlayer insulating film

14, 34: contact plug 16, 36: oxide film

18, 38: hard mask layer 20, 40: photosensitive film pattern

22, 42 Liquid residue 24, 44 Contact hole

The present invention is to achieve the above object, the characteristics of the capacitor manufacturing method of a semiconductor device according to the present invention,

Forming an interlayer insulating film on the semiconductor substrate;

Forming an oxide film for defining a charge storage electrode region on the entire surface of the structure;

Forming a hard mask layer of polycrystalline silicon on the oxide film;

Forming a hard mask layer pattern exposing the oxide layer by selectively etching the hard mask layer using an etching mask for defining a charge storage electrode region;

Dry cleaning the surface of the structure in situ to remove liquid residues;

And etching the oxide layer using the hard mask layer pattern as a mask to form a contact hole for a charge storage electrode.

In another aspect of the present invention, the dry cleaning process is a flashing process using O ₂ / Ar gas, gas flash process flowing gaseous pure water, hydrogen, NH ₃ , NF ₃ or nitrogen gas, UV light source or It is a process of evaporating the compressed gas by the heat processing which performs thermal heating, an inert gas ion curing process, an electron beam curing process, or the plasma surface treatment process in the plasma potential to which an etching does not occur.

Hereinafter, a method of manufacturing a capacitor of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

3A to 3C are diagrams illustrating a manufacturing process of a capacitor of a semiconductor device according to the present invention, and show an example up to a charge storage electrode forming step of a silicon capacitor.

First, an interlayer insulating film 32 including a contact plug 34 for a charge storage electrode is formed on a semiconductor substrate 30, and an oxide film, which is a mask layer for defining a charge storage electrode region, is formed on the interlayer insulating film 32. 36) and a hard mask layer 38 of polycrystalline silicon are sequentially formed. A photoresist pattern 40 is then formed on the hard mask layer 38 as a mask for defining a charge storage electrode region.

Thereafter, the hard mask layer 38 having the photoresist pattern 40 exposed as a mask is removed to form a hard mask layer 38 pattern, and the photoresist pattern 40 is removed. At this time, the liquid residue 42 due to the etching gas is left between the hard mask layer 38 pattern. (See FIG. 3A).

Thereafter, a dry cleaning process for removing the liquid residue is performed in situ, and the dry cleaning process may have various embodiments.

One). A gas flash process that flows oxygen or hydrogen gas prior to oxide etching.

This process is a fleshing process using O ₂ / Ar gas,

It is a process of flowing gaseous pure water, hydrogen, NH ₃ , NF ₃ or nitrogen gas to the substrate surface.

2). Compressed gas evaporation process by heat treatment which performs UV light source or thermal heating before oxide film etching.

3). Inert gas ion curing process such as Ar, He, Ne, Xe, Xr, etc. before oxide etching.

4). Electron beam curing process before oxide etching.

5). Plasma potential to the extent that no etching occurs, for example plasma surface treatment at Vp 100V or less.

Processes such as the above can be applied, and in this process, the gas pressure is performed at a pressure of 50 mTorr to 2 Torr to prevent damage to the lower exposure film.

The liquid residue 42 is removed by the above processes. (See Figure 3b).

Thereafter, the exposed oxide layer 36 is removed using the hard mask layer 38 pattern as a mask to form a contact hole 44 defining a charge storage electrode region exposing the contact plug 34. (See FIG. 3C).

Although not shown, a charge storage electrode in contact with the contact plugs is formed, and a dielectric film and a plate electrode are formed to complete the capacitor.

When the liquid residues formed as shown in FIG. 2B proceed to the process of FIG. 3B, the liquid residues 42 gradually decrease as shown in FIG. 4, and when the process of FIG. 3B is completed, as shown in FIG. 5. Completely removed.

As described above, in the method of manufacturing a capacitor of a semiconductor device according to the present invention, when a hard mask layer serving as an etching mask of an oxide film for defining a charge storage electrode region is formed of a polysilicon layer, it is in situ after etching the hard mask layer. The dry cleaning process was performed to remove the liquid residues generated by the etching gas compression and the subsequent oxide film etching process, thereby preventing the etching defects caused by the liquid residues and simplifying the cleaning process to reduce the process time and cost. There is an advantage that can improve the process yield and the reliability of device operation.

Claims (6)

Forming an interlayer insulating film on the semiconductor substrate; Forming an oxide film for defining a charge storage electrode region on the entire surface of the structure; Forming a hard mask layer of polycrystalline silicon on the oxide film; Forming a hard mask layer pattern exposing the oxide layer by selectively etching the hard mask layer using an etching mask for defining a charge storage electrode region; Dry cleaning the surface of the structure in an in situ step to remove liquid residues; And forming a contact hole by etching an oxide layer using the hard mask layer pattern as a mask. The method of claim 1, The dry cleaning process may be a flashing process using O ₂ / Ar gas, or a gas flash process of flowing a gas one selected from the group consisting of gaseous pure water, hydrogen, NH ₃ , NF ₃ and nitrogen gas. A method for manufacturing a capacitor of a semiconductor device. The method of claim 1, The dry cleaning process is a capacitor manufacturing method of a semiconductor device, characterized in that the compressed gas evaporation process by heat treatment to perform a UV light source or thermal heating. The method of claim 1, The dry cleaning process is a capacitor manufacturing method of a semiconductor device, characterized in that the inert gas ion curing process. The method of claim 1, The dry cleaning process is a capacitor manufacturing method of a semiconductor device, characterized in that the electron beam curing process. The method of claim 1, The dry cleaning process is a capacitor manufacturing method of a semiconductor device, characterized in that the plasma surface treatment process at a plasma potential to the extent that etching does not occur.