KR200156815Y1 - Baffle for a wafer chamber - Google Patents
Baffle for a wafer chamber Download PDFInfo
- Publication number
- KR200156815Y1 KR200156815Y1 KR2019970002354U KR19970002354U KR200156815Y1 KR 200156815 Y1 KR200156815 Y1 KR 200156815Y1 KR 2019970002354 U KR2019970002354 U KR 2019970002354U KR 19970002354 U KR19970002354 U KR 19970002354U KR 200156815 Y1 KR200156815 Y1 KR 200156815Y1
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- KR
- South Korea
- Prior art keywords
- baffle
- semiconductor wafer
- pumping
- process chamber
- deposition gas
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 33
- 238000005086 pumping Methods 0.000 claims abstract description 31
- 230000008021 deposition Effects 0.000 claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 claims abstract description 15
- 238000000151 deposition Methods 0.000 abstract description 23
- 238000007599 discharging Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 10
- 238000005530 etching Methods 0.000 description 4
- 238000005137 deposition process Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
본 고안은 반도체 웨이퍼 제조 공정 챔버의 배플에 관한 것으로, 종래 기술에 의한 반도체 웨이퍼 제조 공정 챔버의 배플은 그 배플이 설치되어 있는 일측에서 상기 터보펌프가 상기 증착가스를 펌핑하게 되므로 일정한 형상의 다수개의 펌핑포트가 형성된 배플에서 상기 증착가스가 불균일하게 배출됨과 아울러 반도체 웨이퍼가 불균일하게 증착되게 되어 불량을 초래하는 문제점이 있었다. 이러한 문제점을 해결하기 위하여 본 고안에 의한 반도체 웨이퍼 제조 공정 챔버의 배플은 그 배플에 형성되어 있는 펌핑포트의 크기를 다르게 하므로써, 잔류 증착가스를 균일하게 배출함과 아울러 상기 반도체 웨이퍼를 균일하게 증착할 수 있게 되어 그 반도체 웨이퍼의 품질을 향상할 수 있는 효과가 있다.The present invention relates to a baffle of a semiconductor wafer manufacturing process chamber. The baffle of a semiconductor wafer manufacturing process chamber according to the prior art has a plurality of constant shapes because the turbo pump pumps the deposition gas on one side where the baffle is installed. The deposition gas is unevenly discharged from the baffle in which the pumping port is formed, and the semiconductor wafer is unevenly deposited, which causes a problem. In order to solve this problem, the baffle of the semiconductor wafer manufacturing process chamber according to the present invention has different sizes of pumping ports formed in the baffle, thereby uniformly discharging residual deposition gas and uniformly depositing the semiconductor wafer. It is possible to improve the quality of the semiconductor wafer.
Description
본 고안은 반도체 웨이퍼 제조 공정 챔버의 배플에 관한 것으로, 특히 펌핑포트의 크기를 달리하여 반도체 웨이퍼의 균일한 증착과 더불어 균일한 식각을 할 수 있게 하므로써 상기 반도체 웨이퍼의 품질을 향상할 수 있도록 한 반도체 웨이퍼 제조공정 챔버의 배플에 관한 것이다.The present invention relates to a baffle of a semiconductor wafer fabrication process chamber, and in particular, by varying the size of a pumping port, it is possible to improve the quality of the semiconductor wafer by uniform deposition and uniform etching of the semiconductor wafer. A baffle in a wafer fabrication process chamber.
일반적으로, 반도체 웨이퍼를 제조함에 있어서 그 반도체 웨이퍼는 식각하거나 증착하는 공정을 거치게 된다.In general, in manufacturing a semiconductor wafer, the semiconductor wafer is subjected to an etching or deposition process.
이러한, 식각 및 증착공정은 상기 제1도에 도시된 바와 같은 공정 챔버내에서 하게되는데, 이러한 공정 챔버(1)는 상부에는 증착가스가 인입되는 인입구(2)가 설치되어 있으며, 그 인입구(2)의 하부에는 증착 또는 식각할 반도체 웨이퍼(3)가 위치하는 웨이퍼 척(4)이 설치되어 있으며, 그 웨이퍼 척(4)의 외주면에는 인입된 잔류증착가스가 배출될 수 있는 일정한 형상의 다수개의 펌핑포트(5a)가 형성된 배플(5)이 설치되어 있다.The etching and deposition processes are performed in a process chamber as shown in FIG. 1, and the process chamber 1 has an inlet 2 through which deposition gas is introduced, and an inlet 2 of the process chamber 1. The lower portion of the wafer) is provided with a wafer chuck 4 on which the semiconductor wafer 3 to be deposited or etched is located. The baffle 5 in which the pumping port 5a was formed is provided.
그리고, 상기 펌핑포트(5a)를 통하여 상기 증착가스를 펌핑하는 핌핑라인(6)이 설치되고, 그 펌핑라인(6)에는 배트밸브(7, 7')와 터보펌프(8) 및 드라이펌프(9)가 설치되어 있다.In addition, a pimping line 6 for pumping the deposition gas through the pumping port 5a is installed, and the pumping line 6 includes bat valves 7 and 7 ', a turbo pump 8 and a dry pump ( 9) is installed.
상기와 같은 배플(5)을 갖는 반도체 웨이퍼의 공정 챔버(1)는 상기 웨이퍼 척(4)에 반도체 웨이퍼(3)가 안착고정되게 되면, 상기 인입구(2)를 통하여 증착가스가 인입되어 그 반도체 웨이퍼(3)는 증착되게 된다.In the process chamber 1 of the semiconductor wafer having the baffle 5 as described above, when the semiconductor wafer 3 is seated and fixed to the wafer chuck 4, the deposition gas is introduced through the inlet 2, and the semiconductor is introduced. The wafer 3 is to be deposited.
이때, 상기 터보펌프(8)가 작동하게 되어 상기 배플(5)을 통하여 인입된 잔류 증착가스는 배출되게 되는 것이다.At this time, the turbopump 8 is operated so that the residual deposition gas introduced through the baffle 5 is discharged.
그러나, 상기와 같은 반도체 웨이퍼 제조 공정 챔버는 배플이 설치되어 있는 일측에서 상기 터보펌프가 상기 증착가스를 펌핑하게 되므로 일정한 형상의 다수개의 펌핑포트가 형성된 배플에서 상기 증착가스가 불균일하게 배출됨과 아울러 반도체웨이퍼가 불균일하게 증착되게 되어 불량을 초래하는 문제점이 있었다.However, in the semiconductor wafer manufacturing process chamber as described above, since the turbo pump pumps the deposition gas at one side where the baffle is installed, the deposition gas is unevenly discharged from the baffle in which a plurality of pumping ports having a predetermined shape are formed. There was a problem that the wafer is unevenly deposited, resulting in a defect.
따라서, 본 고안의 목적은 상기의 문제점을 해결하여 증착가스의 균일한 배출과 더불어 반도체 웨이퍼를 균일하게 증착할 수 있는 반도체 웨이퍼 제조 공정 챔버의 배플을 제공함에 있다.Accordingly, an object of the present invention is to provide a baffle of a semiconductor wafer manufacturing process chamber capable of uniformly depositing a semiconductor wafer with uniform discharge of the deposition gas by solving the above problems.
제1도은 종래 기술에 의한 배플을 장착한 반도체 웨이퍼 제조 공정 챔버의 구조를 보인 개략도.1 is a schematic view showing a structure of a semiconductor wafer manufacturing process chamber equipped with a baffle according to the prior art.
제2도는 종래 기술에 의한 반도체 웨이퍼 제조 공정 챔버의 배플의 구조를 보인 평면도2 is a plan view showing the structure of the baffle of the semiconductor wafer manufacturing process chamber according to the prior art.
제3도은 본 고안에 의한 반도체 웨이퍼 제조 공정 챔버의 배플의 구조를 보인 평면도3 is a plan view showing the structure of the baffle of the semiconductor wafer manufacturing process chamber according to the present invention
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 공정 챔버 2 : 인입구1: process chamber 2: inlet
3 : 반도체 웨이퍼 4 : 웨이퍼 척3: semiconductor wafer 4: wafer chuck
6 : 펌핑라인 7,7' :배트밸브6: pumping line 7,7 ': bat valve
8 : 터보펌프 9 : 드라이펌프8: turbo pump 9: dry pump
15 : 배플 15a, 15b, 15c : 펌핑포트15: baffle 15a, 15b, 15c: pumping port
본 고안의 목적은 펌프의 펌핑으로 증착가스가 균일하게 배출될 수 있도록 크기가 다른 다수개의 펌핑포트가 형성된 것을 특징으로 하는 반도체 웨이퍼 제조 공정 챔퍼의 배플에 의하여 달성된다.An object of the present invention is achieved by a baffle of a semiconductor wafer manufacturing process chamfer, characterized in that a plurality of pumping ports of different sizes are formed so that deposition gas can be uniformly discharged by pumping.
다음은, 본 고안에 의한 반도체 웨어퍼 제조 공정 챔버의 배플의 일실시예를 침부된 도면에 의하여 상세하게 설명한다.Next, an embodiment of a baffle of a semiconductor wafer manufacturing process chamber according to the present invention will be described in detail with the accompanying drawings.
제3도은 본 고안에 의한 반도체 웨이퍼 제조 공정 챔버의 배플의 구조를 보인 평면도이다.3 is a plan view showing the structure of the baffle of the semiconductor wafer manufacturing process chamber according to the present invention.
참고로, 본 고안에 의한 배플을 장착한 공정 챔버에서 종래와 동일한 부분은 동일 명칭과 동일 부호를 사용한다.For reference, the same parts as in the prior art in the process chamber equipped with the baffle according to the present invention uses the same name and the same reference numerals.
상기 제3도에 도시된 바와 같이, 반도체 웨이퍼(3)를 증착 또는 식각하는 공정 챔버(1)는 상부에 증착가스가 인입되는 인입구(2)가 설치되어 있고, 그 인입구(2)의 하부에는 증착 또는 식각할 반도체 웨이퍼(3)가 위치하는 웨이퍼 척(4)이 설치되어있으며, 그 웨이퍼 척(4)의 외주면에는 인입된 잔류 증착가스가 배출될 수 있는 크기가 다른 원형상의 다수개의 펌핑포트(15a, 15b, 15c)가 형성된 배플(15)이 설치되어 있다.As shown in FIG. 3, in the process chamber 1 for depositing or etching the semiconductor wafer 3, an inlet 2 through which deposition gas is introduced is provided, and a lower portion of the inlet 2 is provided. A wafer chuck 4 is provided on which the semiconductor wafer 3 to be deposited or etched is located, and on the outer circumferential surface of the wafer chuck 4, a plurality of circular pumping ports of different sizes for discharging the remaining residual deposition gas can be discharged. The baffle 15 in which 15a, 15b, 15c was formed is provided.
그리고, 상기 펌핑포트(15a, 15b, 15c)를 통헤여 상기 증착가스를 펌핑하는 펌핑라인(6)이 설치되고, 그 펌핑라인(6)에는 배트밸브(7, 7')와 터보펌프(8) 및 드라이펌프(9)가 설치되어 있다.In addition, a pumping line 6 for pumping the deposition gas through the pumping ports 15a, 15b, and 15c is installed, and the pumping line 6 includes bat valves 7, 7 'and a turbo pump 8 ) And a dry pump 9 are provided.
상기 배플(15)에 형성된 펌핑포트(15a, 15b, 15c)는, 상기 펌핑라인(6)이 설치된 측의 크기가 제일 작은 크기의 직경을 갖고, 또 상기 펌핑라인(6)에서 가장 먼측의 펌핑포트의 직경이 제일 크게 형성되어 있으며, 상기 제일 작은 직경을 갖는 펌핑포트와 제일 큰 직경을 갖는 펌핑포트를 기준으로 하여 좌.우 대칭적으로 상기 펌핑포트가 형성되어 있다.The pumping ports 15a, 15b, and 15c formed on the baffle 15 have a diameter of the smallest size of the side on which the pumping line 6 is installed, and the pumping side farthest from the pumping line 6. The diameter of the port is formed largest, and the pumping ports are formed symmetrically with respect to the pumping port having the smallest diameter and the pumping port having the largest diameter.
상기와 같은 배플(15)을 갖는 반도체 웨이퍼의 공정 챔버(1)는 상기 웨이퍼 척(4)에 반도체 웨이퍼가 안착고정되게 되면, 상기 인입구(2)를 통하여 증착가스가 인입되어 그 반도체 웨이퍼(3)는 증착되게 됨과 아울러 상기 터보펌프(8)의 펌핑으로 인하여 상기 잔류 증착가스는 배출되게 되는데, 이때, 상기 배플(15)에 형성된 크기가 다른 펌핑포트(15a, 15b, 15c)로 인하여 상기 잔류 증착가스가 상기 챔버내에서 균일하게 배출되게 되는 것이다.In the process chamber 1 of the semiconductor wafer having the baffle 15 as described above, when the semiconductor wafer is seated and fixed to the wafer chuck 4, a deposition gas is introduced through the inlet 2, and the semiconductor wafer 3 is formed therein. ) Is deposited and the residual deposition gas is discharged due to the pumping of the turbopump 8. In this case, the residual deposition gas is discharged due to pumping ports 15a, 15b, and 15c having different sizes formed in the baffle 15. Deposition gas is to be uniformly discharged in the chamber.
상기와 같이 배플의 펌핑포트의 크기를 다르게 하므로써, 잔류 증착가스를 균일하게 배출함과 아울러 상기 반도체 웨이퍼를 균일하게 증착할 수 있게 되어 그 반도체 웨이퍼의 품질을 향상할 수 있는 효과가 있다.By varying the size of the pumping port of the baffle as described above, it is possible to uniformly discharge the residual deposition gas and to uniformly deposit the semiconductor wafer, thereby improving the quality of the semiconductor wafer.
Claims (2)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019970002354U KR200156815Y1 (en) | 1997-02-17 | 1997-02-17 | Baffle for a wafer chamber |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019970002354U KR200156815Y1 (en) | 1997-02-17 | 1997-02-17 | Baffle for a wafer chamber |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR19980058014U KR19980058014U (en) | 1998-10-26 |
| KR200156815Y1 true KR200156815Y1 (en) | 1999-09-01 |
Family
ID=19495667
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019970002354U KR200156815Y1 (en) | 1997-02-17 | 1997-02-17 | Baffle for a wafer chamber |
Country Status (1)
| Country | Link |
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| KR (1) | KR200156815Y1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100808341B1 (en) * | 2000-04-28 | 2008-03-06 | 어플라이드 머티어리얼스, 인코포레이티드 | Wafer fabrication data acquisition and management systems |
-
1997
- 1997-02-17 KR KR2019970002354U patent/KR200156815Y1/en not_active IP Right Cessation
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100808341B1 (en) * | 2000-04-28 | 2008-03-06 | 어플라이드 머티어리얼스, 인코포레이티드 | Wafer fabrication data acquisition and management systems |
Also Published As
| Publication number | Publication date |
|---|---|
| KR19980058014U (en) | 1998-10-26 |
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