KR20010019666A - Tft lcd - Google Patents

Abstract

PURPOSE: A thin film transistor liquid crystal display device is provided so that the whole process can be simplified by omitting an etching step for removing aluminum from an exposed pad metal layer, before forming a transparent electrode pad and a pixel electrode in a gate pad unit or data pad unit. CONSTITUTION: A gate pattern, which is composed of a gate electrode, a gate line and a gate pad(12), is formed on a thin film transistor substrate as a multi-layer metal on which an aluminum containing metal is stacked. A gate insulating film having a window in a gate pad region is stacked on the gate pattern. An active pattern consisting of a semiconductor layer is formed on the gate insulating film. A source, drain, data line and data pad are formed on the active pattern as a multi-metal on which the aluminum containing metal is stacked. A protecting film having a window in the drain region, data pad region and gate pad region is stacked on the source, drain, data line and data pad. There are formed a pixel electrode consisting of indium zinc oxide, a contact connecting the pixel electrode and the drain region, and a transparent pad electrode(14) covering the exposed upper portion through the window. Here, it is not required to remove the upper aluminum containing metal to prevent an insulating oxide film at the interface.

Description

Thin Film Transistor Liquid Crystal Display {TFT LCD}

The present invention relates to a thin film transistor liquid crystal display device, and more particularly, to a thin film transistor liquid crystal display device having a pad portion such as a gate pad portion or a data pad portion.

In the liquid crystal display device, when the electrode for controlling the liquid crystal array is formed on the entire screen composed of pixels, the liquid crystal display device can be divided into various types according to the configuration of the electrode. )to be. TFT LCD is a typical type of active matrix method, which forms a nonlinear element transistor in each pixel, applies a signal to the gate and drain electrodes through the gate line and the data line, and connects the pixel electrode to the drain of the transistor to face the common electrode. A voltage is applied between and the liquid crystal array of each pixel is adjusted.

In order to give a flashing signal and a gray level signal to each pixel, a signal necessary for a gate and a source constituting a transistor of each pixel is applied. At this time, the contact connecting the driving IC with the gate line and the data line is a gate pad part and a data pad part. If the connection of the contact point is not accurate and the disconnection occurs in the pad part to which the driving IC and the transistor constituting electrode are connected, the correct image signal is not transmitted to the pixels connected to the pad part and the signal line, and thus it cannot function as a display device. . Therefore, in the TFT glass fabrication of the liquid crystal display device, it is also important to form a transistor in each pixel on the substrate, but it is also important to open the conductive layer so that the pad portion can be accurately connected to the outside and the signal lines can be easily connected.

First, an example of a five-step bottom gate mask process will be described, and a thin film transistor forming method focusing on a pad portion forming method will be described.

As an example of an electrode forming step in a TFT-side substrate, first, a gate electrode, a gate line, and a gate pad are formed of a chromium layer and an aluminum or aluminum alloy layer on a glass substrate. At this time, photolithography and an etching process are used (first mask). On it, a gate insulating film, a silicon film, that is, an amorphous silicon film, and an amorphous silicon film doped with phosphorus are sequentially stacked. Then, two silicon films are patterned to form an active pattern made of a semiconductor layer (second mask). Each electrode and channel of the transistor element is formed in this active region. Next, a chromium layer, which is a metal layer for forming the source drain electrode, and an aluminum or aluminum nemium (AlNd) alloy layer are sequentially stacked, and the electrode is etched according to the source drain electrode pattern (third mask). A portion of the source electrode is formed out of the active region, and the channel region between the source and drain electrodes is continuously etched in the amorphous silicon layer doped with impurities using the source drain electrode as an etching mask while the source drain electrode is patterned with a metal layer. By removing it. At this time, the upper portion of the amorphous silicon film may be etched together.

After forming the source drain electrode through the above process, a protective film is stacked on the entire surface of the substrate, and a contact hole is etched in the protective film layer on the drain electrode for connection with the pixel electrode. The gate insulating film and the protective film stacked on the gate pad are also usually exposed at this time, and the protective film on the data pad is also removed to form a pad contact hole (fourth mask). Next, an ITO transparent electrode layer is formed on the entire surface and patterned to form a pixel electrode (fifth mask). At this time, since the drain electrode of the transistor is formed of an aluminum or aluminum alloy layer on the chromium layer like the source electrode, when the aluminum or aluminum alloy layer is exposed through the contact hole, an ITO (Indium Tin Oxide) transparent electrode is stacked to form a contact. Prior to formation, the aluminum or aluminum alloy layer is removed by etching, and then the drain electrode and the pixel electrode are electrically connected by forming a contact between the chromium layer and the ITO electrode layer exposed in the contact portion.

As described above, the metal layer forming the gate electrode, the drain, and the source electrode uses a multilayer metal in which an aluminum or aluminum alloy is laminated on a reflective metal-based metal layer such as chromium, molybdenum, titanium, or an alloy thereof. Although it is somewhat cumbersome in terms of using two different metal layers, it is used because it can compensate for the problem of forming electrodes or signal lines with only one metal by taking advantage of the combination of two layers of metals. For example, it may be necessary in terms of using as an alternative layer or a buffer layer between layers of materials that may cause problems with mutual reactions if they are directly or in direct contact with adjacent layers of materials. In particular, it is widely used in that it can prevent the problem of increasing the resistance in the electrical connection.

In the case of a data line applying a data signal of a transistor, an aluminum or aluminum alloy having good electrical conductivity is used to keep the resistance low at the line applying the electrical signal to the source electrode to prevent screen distortion on the large screen caused by the signal line resistance. It is preferable to use. However, when the drain electrode and the ITO pixel electrode are contacted, the ITO and the aluminum or aluminum alloy electrode are in contact with each other, and the contact resistance of the contact surface is increased because the oxygen atoms of ITO are combined with the aluminum or aluminum alloy to form the aluminum oxide or aluminum alloy at the interface. Will be. Therefore, when the electrode is formed of a multilayer of chromium and aluminum or aluminum alloy, the aluminum or aluminum alloy of the contact portion is removed by etching, and the chromium layer and the ITO layer below are used to form a contact. In this case, the pad part, which is open for connection with the driving IC, is also in contact with the ITO transparent electrode when forming the pixel electrode.The data pad of the data line and the gate pad of the gate line connected to the source electrode are made of only aluminum or aluminum alloy. Problems can occur when contacting with the dual layer structure in which upper layer aluminum or aluminum alloy is laminated with lower layer chromium, etc., so that the exposed part of aluminum can be removed by etching and the chromium layer is exposed before etching the ITO layer. It is to form the ITO layer pad with a larger area than the pad.

FIG. 1 is a side sectional view showing a projection plan view of such a gate pad portion and a data pad portion, respectively. FIGS. 2 and 3 show the layer structure of the gate pad portion and the data pad portion, respectively, when cut along the AA line of FIG.

In FIG. 1, the area of the insulating film opening 16 is slightly smaller than that of the gate pad 12, and the transparent pad electrode 14 formed of ITO is slightly larger than the area covering the gate pad 12. 2 and 3 illustrate a state in which the upper aluminum containing metal layers 15 and 25 of the gate pad and the data pad are etched away when the insulating film is opened. The insulating film 15 in the gate pad portion of FIG. 2 is formed of a gate insulating film and a passivation film formed on the data line. The insulating film 15 below the data pad of FIG. 3 is a gate insulating film. do. The lower portion of the gate pad under the aluminum-containing metal layer is a chromium layer (11, 21), and other titanium, molybdenum, Ta, etc. are frequently used.

In the present invention, a thin film transistor capable of forming a pad portion according to convenience without having to etch to remove aluminum from an exposed pad metal layer prior to forming the transparent electrode pad together with the pixel electrode in the gate pad portion or the data pad portion. An object of the present invention is to provide a liquid crystal display device.

1 is a projection plan view of a gate pad portion or a data pad portion of a conventional thin film transistor.

2 and 3 are side cross-sectional views showing the layer structure of the gate pad portion and the data pad portion, respectively, when cut along the AA line of FIG.

Figure 4 shows a projection plan view of the gate pad portion or data pad portion of the present invention and is the same view as Figure 1 on a plane.

Fig. 5 is a side cross-sectional view of the pad section taken along the line A'A 'when Fig. 4 shows the gate pad section.

Fig. 6 is a side cross-sectional view of the pad section taken along the line A'A 'in the case where Fig. 4 shows the data pad section.

※ Explanation of symbols for main parts of drawing

10: substrate 11,21: chromium layer

12: gate pad 13, 23, 53, 63: aluminum containing metal layer

14, 17, 27, 57, 67: transparent pad electrode 15: insulating film

16: opening 25: protective film

In the thin film transistor liquid crystal display device of the present invention for achieving the above object, a gate pattern consisting of a gate electrode, a gate line, and a gate pad is formed of a multilayer metal having an aluminum containing metal on the thin film transistor side substrate. A gate insulating film having a window is stacked in the gate pad region, and an active pattern formed of a semiconductor layer is formed on the gate insulating film, and source and drain electrodes, data lines, and data pads are formed on top of the active pattern. A protective layer having a window formed on the source, the drain, the data line, the data pad, and the drain area, the data pad, and the gate pad area; and a pixel electrode made of the indium zinc oxide (IZO) material. A cone connecting the pixel electrode and the drain region , The transparent electrode pads covering the exposed top said pad through said window is formed characterized in that formed.

Therefore, the pad peripheral portion of the present invention is formed on the periphery of the substrate with a plurality of metal layers together with a signal line to apply a signal to the transistor, and the upper portion is an aluminum-containing metal pad, a window of the insulating film exposing the pad, and the window through the window. A transparent pad electrode made of IZO material is in contact with the pad. In this case, the signal line is a concept encompassing a gate line and a data line, and at least one signal line of the two signal lines includes a plurality of metal layers, and the upper portion of the signal line corresponds to the present invention. In the present invention, the insulating film removed in the step of forming a window stacked on the pad to open the pad is mainly a silicon oxide film and a silicon nitride film. In the case of a gate pad, a silicon nitride film as a gate insulating film and a silicon oxide film as a protective film formed over the data pad may be formed to form an insulating film.

In the plurality of metal layers constituting the pad, the upper aluminum-containing metal layer may be exposed without being removed at all, and in some cases, such as a central portion, such as when a metal having a small contact resistance with the transparent pad electrode forms the lower metal layer of the pad. In a state in which the bottom metal is exposed while the bottom metal is removed, the transparent pad electrode made of the IZO material may be in contact with the aluminum-containing metal layer and the lower metal layer. The aluminum-containing metal layer mainly uses aluminum neodymium or pure aluminum metal layer, and the lower metal layer of the pad mainly uses chromium, molybdenum, titanium, Ta, and the like as in the conventional example.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

4 is the same view as FIG. 1 in plan view. However, it can be seen from FIG. 5 and FIG. 6 that the state of the pad 12 in which the transparent pad electrode 14 made of IZO material contacts the opening 16 of the insulating film may be different from that of the conventional art.

Fig. 5 shows a cross-sectional structure of a pad portion with a gate pad forming the end of the gate line, and is a sectional side view of the pad portion taken along line A'A 'when Fig. 4 shows the gate pad portion. Unlike the related art, the transparent pad electrode 57 has been changed from ITO to IZO. Thus, the gate pad contacting the transparent pad electrode 57 has not been removed from the upper portion of the metal layer 53 including the aluminum layer among the multilayered metal layers. Doing. This is because, in the case of IZO, even in contact with aluminum, an oxide film having high resistance at the interface is not easily formed. The lower portion of the gate pad is made of the chromium layer 11 as in the related art, and the gate insulating film 15 forming the opening portion uses a silicon nitride film.

FIG. 6 shows a cross-sectional structure of a pad portion with a data pad forming the end of the data line, and is a sectional side view of the pad portion taken along the line A'A 'when FIG. 4 shows the data pad portion. Since IZO is used as the transparent pad electrode 67, the high resistance problem of the interface is reduced even when the upper aluminum-containing metal layer 63 is not removed among the plurality of metal layers forming the data line and the data pad. Of course, the upper portion of the aluminum-containing metal layer may be removed from the pad so that the lower layer metal and the transparent pad electrode made of IZO are in contact with each other. In this case, the intermediate tone exposure may be used in the process of forming the pad contact window by removing the insulating layer on the pad to prevent further use of a single exposure process to remove a part of the upper aluminum containing metal layer.

Halftone exposure is to have two different patterns in one exposure mask. In this case, the two patterns should have a relationship in which one includes the other. For example, to remove the upper aluminum containing metal layer from a portion of the data pad, a halftone mask can be used in the exposure process. The halftone mask has a light transmittance of 20% to 40% in the pattern of the mask portion where the insulating film is removed from the pad portion, and a light transmittance of 90% in the pattern of the mask portion corresponding to the region where the pad portion is to be removed. It is formed transparently. Therefore, when the exposure is performed, the positive photoresist is decomposed by the photochemical reaction in the middle tone portion of 20% to 40% light transmittance, and is removed during development, and the entire layer is decomposed at 90% light transmittance. Is removed. As a result, the impermeable portion remains 14000 mm 3, which is the total thickness of the photoresist, and the semi-transparent portion remains 2000-5000 mm 3. The photoresist pattern serves as an etching mask to etch to remove the insulating film in the region where the aluminum-containing metal is to be removed. Subsequently, etching is performed to remove the aluminum-containing metal. In this process, the thickness of the photoresist layer is also slightly reduced. Next, through the ashing process of etching back the entire photoresist, the photoresist is completely removed from the transflective portion where the photoresist remains thin, and the insulating film is etched again while the photoresist of the non-transmissive portion is left. When the photoresist stripping is completed, a part of the upper pad metal layer made of aluminum-containing metal is removed and a part of the upper pad metal layer is removed, and the pad is exposed and electrically connected to the transparent pad electrode made of IZO material.

In addition to the exposure mask having the translucent portion, the halftone exposure may have a method of replacing the translucent portion with a pattern in which a plurality of slits are formed. The plurality of slits give the photoresist film an intermediate amount of light by diffraction, and thus can have the same effect as the exposure mask pattern made of midtones.

The present invention will be mainly employed in the conventional five-step mask process of the bottom gate method described above, a three-layer film is stacked and patterned to change the five-sheet process of first forming an active region and stacking and patterning the source and drain metal layers. Therefore, the gate insulating film, the amorphous silicon layer, and the three-layer film of the amorphous silicon layer doped with impurities and the source and drain electrode layers may be continuously stacked and may be used in a four-sheet mask process for forming source and drain electrodes, data lines, and pads. In addition, it may be used in other thin film transistors in which pads of a plurality of metal layers using other aluminum-containing metals and transparent pad electrodes come into contact with each other.

According to the present invention, even when a plurality of metal layer pads having an aluminum-containing metal layer thereon are opened for contact with the driving IC and then there is a stack of transparent electrodes, it is not necessary to remove the upper aluminum-containing metal to prevent an insulating oxide film at the interface. The process can be simplified, and the pad portion, which is a contact point with the driving IC, can be used to increase the area of the contact point with a transparent pad metal, thereby maintaining the advantage of stable connection.

Claims (5)

A gate pattern consisting of a gate electrode, a gate line, and a gate pad is formed on a thin film transistor side substrate using a multilayer metal having an aluminum containing metal thereon. A gate insulating film having a window formed on a gate pad region over the gate pattern, An active pattern of a semiconductor layer is formed on the gate insulating layer, The source and drain electrodes, the data lines, and the data pads are formed of a multilayer metal having an aluminum containing metal on the active pattern. A passivation layer having a window is formed on the source and drain, the data line, and the data pad, and a drain region, the data pad, and the gate pad region. A thin film transistor liquid crystal display device comprising a pixel electrode, a contact connecting the pixel electrode and the drain region with an indium zinc oxide (IZO) material, and a transparent pad electrode covering the pad exposed through the window. The method of claim 1, And a portion of the upper aluminum containing metal of the pad exposed by the window is removed to expose the lower metal of the pad. The method of claim 2, The removal of a portion of the aluminum-containing metal layer is a thin film transistor liquid crystal display, characterized in that the continuously made through the halftone exposure without a separate exposure during the window opening process. The method of claim 1, And the window is formed in an area smaller than the pad in an area on the plane where the pad is installed, and the transparent pad metal is formed in an area larger than that of the pad. The method of claim 1, And the aluminum-containing metal is aluminum neodymium and the lower metal of the pad is made of chromium.