KR102445539B1 - Light emitting device and lighting apparatus - Google Patents

Abstract

The embodiment relates to a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and a lighting device.
The light emitting device according to the embodiment includes a first conductivity type semiconductor layer 112; a second conductivity type semiconductor layer 116 disposed under the first conductivity type semiconductor layer 112; an active layer 114 disposed between the first conductivity type semiconductor layer 112 and the second conductivity type semiconductor layer 116; A plurality of holes exposing a portion of the first conductivity type semiconductor layer 112 through the second conductivity type semiconductor layer 116 and the active layer 114 from the bottom surface of the second conductivity type semiconductor layer 116 (H); a first semiconductor contact layer 160 electrically connected to the first conductivity type semiconductor layer 112 from a bottom surface of the second conductivity type semiconductor layer 116 through the plurality of holes H; a first electrode layer 150 disposed under the first semiconductor contact layer 160 and electrically connected thereto; and a second electrode layer 130 electrically connected to the second conductivity type semiconductor layer 116 .

Description

Light emitting device and lighting device {LIGHT EMITTING DEVICE AND LIGHTING APPARATUS}

The embodiment relates to a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and a lighting device.

A light emitting device (Light Emitting Device) can be produced by combining a p-n junction diode with a characteristic in which electric energy is converted into light energy, an element of Group 3-5 or Group 2-6 element on the periodic table, and the composition ratio of the compound semiconductor It is possible to realize various colors by adjusting the

For example, nitride semiconductors are receiving great attention in the field of developing optical devices and high-power electronic devices due to their high thermal stability and wide bandgap energy. In particular, a blue light emitting device, a green light emitting device, an ultraviolet (UV) light emitting device, and a red light emitting device using a nitride semiconductor have been commercialized and widely used.

Among the light emitting devices according to the prior art, there is a horizontal type light emitting device in which an electrode layer is disposed in one direction of an epi layer. ) increases, the current efficiency decreases, and there is a problem of being vulnerable to electrostatic discharge.

In order to solve this problem, conventionally, a via hole type vertical light emitting device in which an electrode is disposed by forming a via hole under the epi layer has been developed.

In order to manufacture a via hole type vertical light emitting device in the prior art, a plurality of mesa etchings for n-contacts are performed, and between the n-contacts and mesa etching holes An insulating layer is formed.

On the other hand, in the prior art via hole type vertical light emitting device, the n-contact is formed in the mesa-etched via hole region, so that the contact area between the n-contact and the n-type semiconductor layer is small and the contact resistance is increased, so that the operating voltage is increased and the optical output ( There is a problem that Po) is lowered.

In addition, according to the prior art, there is a problem in that the contact area between the n-contact and the n-type semiconductor layer is small, so that the current injection efficiency is lowered, so that the luminous flux is reduced.

In addition, according to the prior art, there is a problem in that the light emitted by the n-contact formed in the mesa-etched via hole region is absorbed and the light extraction efficiency is lowered, so that the luminous flux is lowered.

SUMMARY An embodiment is to provide a light emitting device, a method for manufacturing a light emitting device, a light emitting device package, and a lighting device capable of improving light output and improving electrical reliability by preventing an increase in operating voltage.

In addition, the embodiment is to provide a light emitting device capable of improving the luminous flux by improving current injection efficiency, a method of manufacturing the light emitting device, a light emitting device package, and a lighting device.

In addition, the embodiment is to improve the light extraction efficiency to provide a light emitting device capable of improving the luminous flux, a method of manufacturing a light emitting device, a light emitting device package, and a lighting device.

The light emitting device according to the embodiment includes a first conductivity type semiconductor layer 112; a second conductivity type semiconductor layer 116 disposed under the first conductivity type semiconductor layer 112; an active layer 114 disposed between the first conductivity type semiconductor layer 112 and the second conductivity type semiconductor layer 116; A plurality of holes exposing a portion of the first conductivity type semiconductor layer 112 through the second conductivity type semiconductor layer 116 and the active layer 114 from the bottom surface of the second conductivity type semiconductor layer 116 (H); a first semiconductor contact layer 160 electrically connected to the first conductivity type semiconductor layer 112 from a bottom surface of the second conductivity type semiconductor layer 116 through the plurality of holes H; a first electrode layer 150 disposed under the first semiconductor contact layer 160 and electrically connected thereto; and a second electrode layer 130 electrically connected to the second conductivity type semiconductor layer 116 .

In addition, the light emitting device according to the embodiment includes a first conductivity type semiconductor layer 112; a second conductivity type semiconductor layer 116 disposed under the first conductivity type semiconductor layer 112; an active layer 114 disposed between the first conductivity type semiconductor layer 112 and the second conductivity type semiconductor layer 116; A plurality of holes exposing a portion of the first conductivity type semiconductor layer 112 through the second conductivity type semiconductor layer 116 and the active layer 114 from the bottom surface of the second conductivity type semiconductor layer 116 . (H); It is electrically connected to the first conductivity-type semiconductor layer 112 from the bottom surface of the second conductivity-type semiconductor layer 116 through the plurality of holes H, and has a maximum horizontal width W of the plurality of holes H. ) of the second semiconductor contact layer 162 larger than the width; a first electrode layer 150 electrically connected to the second semiconductor contact layer 162; and a second electrode layer 130 electrically connected to the second conductivity type semiconductor layer 116 .

The lighting device according to the embodiment may include a light emitting unit including the light emitting device.

The embodiment provides a light emitting device capable of improving optical output (Po) and improving electrical reliability by preventing an increase in operating voltage by reducing contact resistance between a semiconductor contact layer and an electrode layer, a method of manufacturing a light emitting device, a light emitting device package and A lighting device may be provided.

In addition, the embodiment may provide a light emitting device capable of improving luminous flux by improving current injection efficiency between a semiconductor contact layer and an electrode layer, a method for manufacturing a light emitting device, a light emitting device package, and a lighting device.

In addition, the embodiment may provide a light emitting device, a method of manufacturing a light emitting device, a light emitting device package, and a lighting device capable of improving light flux by improving light extraction efficiency by preventing light absorption by the semiconductor contact layer.

1 is a plan view of a light emitting device according to an embodiment;
2 is a cross-sectional view of the light emitting device according to the first embodiment.
3 is a cross-sectional view of a light emitting device according to a second embodiment;
4 is a cross-sectional view of a light emitting device according to a third embodiment.
5 to 14 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment.
15 is a cross-sectional view of a light emitting device package according to the embodiment;
16 is a perspective view of a lighting device according to an embodiment;

In the description of the embodiment, each layer (film), region, pattern or structures is “on/over” or “under” the substrate, each layer (film), region, pad or pattern. In the case of being described as being formed on, “on/over” and “under” include both “directly” or “indirectly” formed through another layer. do. In addition, the reference for the upper / upper or lower of each layer will be described with reference to the drawings, but the embodiment is not limited thereto.

(Example)

1 is a plan projection view of a light emitting device 100 according to an embodiment, and FIG. 2 is an enlarged cross-sectional view of the first embodiment taken along line A-A' of FIG. 1 . Hereinafter, it will be described with reference to FIG. 2 .

The light emitting device 100 according to the first embodiment includes a light emitting structure layer 110 , a first electrode layer 150 , a second electrode layer 130 , a first semiconductor contact layer 160 , an insulating layer 140 , and passivation. It may include a layer 170 , a pad electrode 180 , and a lower electrode 159 .

For example, the light emitting device 100 according to the first embodiment includes a first conductivity type semiconductor layer 112 , a second conductivity type semiconductor layer 116 disposed under the first conductivity type semiconductor layer 112 , The light emitting structure layer 110 including the active layer 114 disposed between the first conductivity type semiconductor layer 112 and the second conductivity type semiconductor layer 116 may be included.

In addition, in the first embodiment, a portion of the first conductivity type semiconductor layer 112 passes through the second conductivity type semiconductor layer 116 and the active layer 114 from the bottom surface of the second conductivity type semiconductor layer 116 . Electrically connected to the first conductivity type semiconductor layer 112 through a plurality of holes H (refer to FIG. 6) exposing , and the plurality of holes H from the bottom surface of the second conductivity type semiconductor layer 116. The first semiconductor contact layer 160 connected by A second electrode layer 130 may be included.

The second electrode layer 130 may include a second contact electrode 132 , a first reflective layer 134 , and a capping layer 136 , and the second electrode layer 130 is formed from the pad electrode 180 . The supplied power may be supplied to the second conductivity type semiconductor layer 116 .

In the embodiment, the first semiconductor contact layer 160 penetrates through the active layer 114 to expose a portion of the first conductivity-type semiconductor layer 112 through the first electrode layer in a downward direction from the plurality of holes H ( 150) and may be disposed to extend in the direction.

Accordingly, in the embodiment, a top surface of the first semiconductor contact layer 160 is disposed higher than the active layer 114 , and a bottom surface of the first semiconductor contact layer 160 is the second conductivity type semiconductor layer 116 . It can be placed lower.

The first semiconductor contact layer 160 may be formed of the same material as the first conductivity type semiconductor layer 112 . For example, the first semiconductor contact layer 160 may be In _x Al _y Ga ₁ -x- _y N ( _{0≤≤x≤≤1} , 0≤≤y≤≤1, 0≤≤x+y≤≤ It may be formed of a semiconductor layer having the composition formula of 1).

In an embodiment, the first semiconductor contact layer 160 may be doped with a first conductivity type element, for example, an n-type doping element, and the first conductivity type element doped into the first semiconductor contact layer 160 is The doping concentration may be higher than the doping concentration of the first conductivity-type doping element doped in the first conductivity-type semiconductor layer 112 . Accordingly, according to the embodiment, the doping concentration of the first conductivity-type element doped in the first semiconductor contact layer 160 is formed to be higher than the doping concentration of the first conductivity-type semiconductor layer 112 , thereby improving the current injection efficiency. have.

The first electrode layer 150 includes a diffusion barrier layer 154 disposed on a side surface of the first semiconductor contact layer 160 , a bonding layer 156 and a bonding layer 156 disposed under the diffusion barrier layer 154 . ) may include a support member 158 disposed below.

The diffusion barrier layer 154 constituting the first electrode layer 150 may be in contact with a side surface of the first semiconductor contact layer 160 , and the bonding layer 156 may be formed with the first semiconductor contact layer 160 . The contact area between the first electrode layer 150 and the first semiconductor contact layer 160 may be expanded.

Accordingly, according to the embodiment, the contact resistance between the first semiconductor contact layer 160 and the first electrode layer 150 is reduced, thereby preventing an increase in the operating voltage, thereby improving the optical output (Po) and improving the electrical reliability. can

Also, according to the embodiment, the luminous flux may be improved by improving the current injection efficiency according to an increase in the contact area between the first semiconductor contact layer 160 and the first electrode layer 150 .

In an embodiment, the lower region of the first semiconductor contact layer 160 may have a slope on the side surface to increase the surface area, and the diffusion barrier layer 154 may contact the side surface of the first semiconductor contact layer 160 so that the first semiconductor contact layer 160 is in contact with each other. The increase in operating voltage can be prevented by reducing the contact resistance by increasing the contact area of

In addition, according to the embodiment, the contact area is widened by the slanted side surface of the first semiconductor contact layer 160 and the diffusion barrier layer 154 coming into contact with the current between the first electrode layer 150 and the first semiconductor contact layer 160 . By improving the injection efficiency, it is possible to provide a light emitting device capable of improving the luminous flux. Specifically, in the prior art, the diffusion barrier layer was in contact with only the upper surface of the contact layer, so the contact area was small. Since the diffusion barrier layer 154 is in contact with the inclined side surface of the semiconductor contact layer 160 , the mutual contact area is widened, thereby improving the current injection efficiency between the first semiconductor contact layers 160 , thereby improving the luminous flux.

The embodiment may include a first channel layer 120 disposed between an upper side surface of the first semiconductor contact layer 160 and the first conductivity-type semiconductor layer 112 . Also, the first channel layer 120 may be disposed between the upper side surface of the first semiconductor contact layer 160 and the active layer 116 and the second conductivity type semiconductor layer 116 . Accordingly, the first channel layer 120 may prevent a short circuit between the first semiconductor contact layer 160 , the active layer 114 , and the second conductivity type semiconductor layer 116 .

In an embodiment, the reflectivity of the first channel layer 120 may exceed 50%. For example, the first channel layer 120 may be formed of any one or more materials selected from SiO _x , SiO ₂ , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO ₂ . It may be formed in a form in which an insulating material and a reflective material are mixed.

For example, the first channel layer 120 may be formed by mixing an insulating material with at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, or Hf. may be formed, and may be formed as a single layer or a multilayer, but is not limited thereto.

According to the embodiment, the first channel layer 120 including a reflective material is disposed on the side surface of the first semiconductor contact layer 160 serving as a contact layer, so that, unlike the prior art, the first semiconductor contact layer 160 is By preventing the light absorption by the light extraction efficiency can be improved to improve the luminous flux.

Next, the light emitting device 102 according to the second embodiment will be described with reference to FIG. 3 .

The second embodiment may adopt the technical features of the first embodiment, and the main features of the second embodiment will be mainly described below.

In the second embodiment, a first concave-convex pattern R1 may be formed on a lower surface of the first semiconductor contact layer 160 , and a first concave-convex pattern R1 may be formed on an upper surface of the bonding layer 156 to correspond to the first concave-convex pattern R1 . A second concave-convex pattern R2 may be provided.

Accordingly, according to the second embodiment, the contact area between the junction layer 156 and the first semiconductor contact layer 160 is increased to prevent an increase in operating voltage, thereby improving optical output and improving electrical reliability. can

Also, according to the second embodiment, the luminous flux can be improved by improving the current injection efficiency according to an increase in the contact area between the bonding layer 156 and the first semiconductor contact layer 160 .

The second embodiment may include a second reflective layer 125 disposed between the first channel layer 120 and the first semiconductor contact layer 160 . The second reflective layer 125 may be formed of one or a plurality of layers of a material consisting of Al, Rh, Pd, Ir, Ru, Ag, Ni, Mg, Zn, Pt, Au, Hf, and alloys of two or more of them. may be, but is not limited thereto.

According to the second embodiment, even if the first channel layer 120 does not include a reflective material, the second reflective layer 125 is disposed between the first channel layer 120 and the first semiconductor contact layer 160 . By preventing light absorption by the first semiconductor contact layer 160 , the light extraction efficiency can be improved, thereby improving the luminous flux.

In addition, even when the first channel layer 120 includes a reflective material, light reflective performance is improved by the second reflective layer 125 , thereby minimizing light absorption by the first semiconductor contact layer 160 and thus light extraction efficiency. can improve

4 is a cross-sectional view of the light emitting device 103 according to the third embodiment.

The third embodiment may adopt the technical features of the first embodiment or the second embodiment, and the main features of the third embodiment will be mainly described below.

The light emitting device 103 according to the third embodiment includes a first conductivity type semiconductor layer 112 , a second conductivity type semiconductor layer 116 disposed under the first conductivity type semiconductor layer 112 , and the first conductivity type semiconductor layer 112 . The active layer 114 disposed between the first conductivity type semiconductor layer 112 and the second conductivity type semiconductor layer 116, and the second conductivity type semiconductor layer 116 from the bottom surface of the second conductivity type semiconductor layer 116 ) and a plurality of holes (H) penetrating through the active layer 114 to expose a portion of the first conductivity type semiconductor layer 112 , and the plurality of holes from the bottom surface of the second conductivity type semiconductor layer 116 . a second semiconductor contact layer 162 electrically connected to the first conductivity-type semiconductor layer 112 through (H) and having a maximum horizontal width W greater than the width of the plurality of holes H; It may include a first electrode layer 150 electrically connected to the second semiconductor contact layer 162 and a second electrode layer 130 electrically connected to the second conductivity-type semiconductor layer 116 .

A top surface of the second semiconductor contact layer 162 may be in contact with a portion of a bottom surface of the first conductivity-type semiconductor layer 112 , and a side surface of the second semiconductor contact layer 162 is a first channel layer 120 . , may be in contact with the second channel layer 122 , but is not limited thereto.

In the second embodiment, the horizontal width of the second semiconductor contact layer 162 is widened from the top to the bottom, so that the bottom surface of the second semiconductor contact layer 162 is formed wider than the top surface, thereby contacting the first electrode layer 150 . area can be enlarged.

For example, the lower region of the second semiconductor contact layer 162 includes a side extension 162P overlapping the second electrode layer 130 and the upper and lower sides to increase the contact area with the first electrode layer 150 . can be obtained

In this case, in the second embodiment, the second channel layer 122 is disposed between the side extension 162P of the second semiconductor contact layer 162 and the second electrode layer 130 to form the second semiconductor contact layer 162 . It is possible to prevent conduction between the and the second electrode layer 130 .

A portion of an upper surface of the side extension 162P of the second semiconductor contact layer 162 may be in contact with the second channel layer 122 , and a side extension 162P of the second semiconductor contact layer 162 may be formed. A portion of a side surface of the may be in contact with the insulating layer 140 .

In the second embodiment, a portion of the side surface of the side extension 162P of the second semiconductor contact layer 162 is in contact with the diffusion barrier layer 154 constituting the first electrode layer 150, thereby forming the first electrode layer 150 and the first electrode layer 150. The current injection efficiency may be improved by increasing the contact area between the two semiconductor contact layers 162 . In the second embodiment, the second semiconductor contact layer 162 may be formed through the plurality of holes in the first conductivity type semiconductor layer. The second semiconductor contact layer ( The luminous flux may be increased by improving the current injection efficiency between the 162 ) and the first electrode layer 150 .

In addition, according to the second embodiment, the contact resistance between the second semiconductor contact layer 162 and the first electrode layer 150 increases due to an increase in the area in which the second semiconductor contact layer 162 contacts the first electrode layer 150 . By reducing the operating voltage, it is possible to significantly improve the optical output and improve the electrical reliability by preventing the increase of the operating voltage.

Hereinafter, a method of manufacturing a light emitting device according to an embodiment will be described with reference to FIGS. 5 to 14 . Although the first embodiment will be mainly described, the manufacturing method is not limited to the description below.

First, as shown in FIG. 5 , the light emitting structure layer 110 may be formed on the growth substrate 105 . The light emitting structure layer 110 may include a first conductivity type semiconductor layer 112 , an active layer 114 , and a second conductivity type semiconductor layer 116 .

The growth substrate 105 may be loaded into a growth device and formed in a layer or pattern form using a compound semiconductor of a group II to group VI element thereon.

The growth equipment includes an electron beam evaporator, physical vapor deposition (PVD), chemical vapor deposition (CVD), plasma laser deposition (PLD), dual-type thermal evaporator sputtering, and metal organic chemical vapor (MOCVD). deposition) may be employed, but is not limited to such equipment.

The growth substrate 105 may be a conductive substrate or an insulating substrate. For example, the growth substrate 105 may be selected from the group consisting of a sapphire substrate (Al ₂ 0 ₃ ), GaN, SiC, ZnO, Si, GaP, InP, Ga ₂ 0 ₃ , and GaAs. .

A buffer layer (not shown) may be formed on the growth substrate 105 . The buffer layer reduces the difference in lattice constant between the growth substrate 105 and the nitride semiconductor layer that is the light emitting structure layer 110 to be formed later, and the material thereof is GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN. , AlGaAs, GaP, GaAs, GaAsP, and AlGaInP.

An undoped semiconductor layer (not shown) may be formed on the buffer layer, and the undoped semiconductor layer may be formed of an undoped GaN-based semiconductor. The n-type semiconductor layer may have a lower concentration than the n-type semiconductor layer by diffusion, but is not limited thereto.

A first conductivity type semiconductor layer 112 may be formed on the buffer layer or the undoped semiconductor layer. Thereafter, an active layer 114 may be formed on the first conductivity-type semiconductor layer 112 , and a second conductivity-type semiconductor layer 116 may be sequentially formed on the active layer 114 .

Other layers may be further disposed above or below each of the semiconductor layers, for example, may be formed in a superlattice structure using a group III-V compound semiconductor layer, but is not limited thereto.

The first conductivity type semiconductor layer 112 is a compound semiconductor of a group III-V element doped with a first conductivity type dopant, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, It may be selected from GaAsP, AlGaInP, and the like. For example, the first conductivity type semiconductor layer 112 may include In _x Al _y Ga ₁ -x- _y N ( _{0≤≤x≤≤1} , 0≤≤y≤≤1, 0≤≤x+y≤ It may be formed of a semiconductor layer having a composition formula of ≤1).

The first conductivity-type semiconductor layer 112 may be an n-type semiconductor layer, and the first conductivity-type dopant may include an n-type dopant such as Si, Ge, Sn, Se, Te, or the like.

The first conductivity type semiconductor layer 112 may be formed as a single layer or a multilayer, and alternately two different layers among GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. It may include a superlattice structure arranged as

The active layer 114 may include a single quantum well structure, a multiple quantum well structure, a quantum wire structure, or a quantum dot structure. The active layer 114 may be formed in a periodic structure of a well layer and a barrier layer using a compound semiconductor material of a group III-V element.

The well layer includes a semiconductor layer having a compositional formula of In _x Al _y Ga ₁ -x- _y N ( _{0≤≤x≤≤1} , 0≤≤y≤≤1, 0≤≤x+y≤≤1) and the barrier layer is a semiconductor layer having a composition formula of In _x Al _y Ga ₁ -x- _y N ( _{0≤≤x≤≤1} , 0≤≤y≤≤1, 0≤≤x+y≤≤1) can be formed with A bandgap of the barrier layer may be formed of a material higher than a bandgap of the well layer.

Accordingly, the active layer 114 includes, for example, a period of at least one of the period of the InGaN well layer/GaN barrier layer, the period of the InGaN well layer/AlGaN barrier layer, and the period of the InGaN well layer/InGaN barrier layer. can do.

The second conductivity type semiconductor layer 116 is formed on the active layer 114, and the second conductivity type semiconductor layer 116 is a compound semiconductor of a group III-V element doped with a second conductivity type dopant, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and the like. The second conductivity type semiconductor layer 116 has the composition formula of In _x Al _y Ga _1-xy N (0≤≤x≤≤1, 0≤≤y≤≤1, 0≤≤x+y≤≤1) It may be formed of a semiconductor layer having

The second conductivity-type semiconductor layer 116 may be a p-type semiconductor layer, and the second conductivity-type dopant may include a p-type dopant such as Mg or Zn. The second conductivity type semiconductor layer 116 may be formed as a single layer or a multilayer, but is not limited thereto.

The second conductivity type semiconductor layer 116 may include a superlattice structure in which two different layers of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP are alternately arranged. can

In an embodiment, a third conductivity type semiconductor layer (not shown), for example, a semiconductor layer having a polarity opposite to that of the second conductivity type, may be formed on the second conductivity type semiconductor layer 116 , but is not limited thereto.

Accordingly, the light emitting structure layer 110 may include at least one of an n-p junction, a p-n junction, an n-p-n junction, and a p-n-p junction structure.

Next, as shown in FIG. 6A , a mesa etching process for removing a portion of the light emitting structure layer 110 may be performed. For example, a plurality of holes H penetrating through the second conductivity type semiconductor layer 116 and the active layer 114 to expose a portion of the first conductivity type semiconductor layer 112 may be formed.

In an embodiment, the plurality of holes H are formed at a predetermined angle from the first conductivity type semiconductor layer 112 to the upper surface of the second conductivity type semiconductor layer 116 , for example, on the upper surface of the light emitting structure layer 110 . It may be formed at an obtuse angle, but is not limited thereto.

In an embodiment, the horizontal width of the plurality of holes H may decrease toward the lower side. Meanwhile, with reference to FIG. 2 , the horizontal widths of the plurality of holes H may decrease toward the upper side.

Referring back to FIG. 6A , according to the embodiment, the area of the active layer 114 and the first conductivity type semiconductor layer 112 that are removed by decreasing the horizontal width of the plurality of holes H toward the lower side is reduced to emit light. On the other hand, as shown in FIG. 6B , a structural diagram of forming a second hole H2 vertically formed from the first conductivity type semiconductor layer 112 to the upper surface of the second conductivity type semiconductor layer 116 . It may be possible.

Next, as shown in FIG. 7 , the first channel layer 120 may be formed on the plurality of holes H and a portion of the second conductivity type semiconductor layer 116 . In this case, the first channel layer 120 may not be formed in a region where the first semiconductor contact layer 160 to be formed later will be formed. Accordingly, a portion of the first conductivity type semiconductor layer 112 exposed by the plurality of holes H may be exposed.

The first channel layer 120 functions to electrically insulate the first semiconductor contact layer 160 , the active layer 114 , and the second conductivity type semiconductor layer 116 to be formed later.

In an embodiment, the reflectance of the first channel layer 120 may be greater than 50%. For example, the first channel layer 120 may be formed of an insulating material selected from among SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO ₂ . The reflective material may be formed in a mixed form.

For example, the first channel layer 120 may be formed by mixing an insulating material with at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, or Hf. can be formed.

According to the embodiment, the first channel layer 120 including the reflective material is disposed on the side surface of the first semiconductor contact layer 160 to be formed later, thereby preventing light absorption by the first semiconductor contact layer 160 . By improving the light extraction efficiency, it is possible to improve the luminous flux.

Next, as shown in FIG. 8 , a second contact electrode 132 may be formed on the second conductivity type semiconductor layer 116 . The second contact electrode 132 is in ohmic contact with the second conductivity type semiconductor layer 116 , may include at least one conductive material, and may be formed of a single layer or multiple layers.

For example, the second contact electrode 132 may include at least one of a metal, a metal oxide, and a metal nitride material. The second contact electrode 132 may include a light-transmitting material. For example, the second contact electrode 132 may include indium tin oxide (ITO), indium zinc oxide (IZO), IZO nitride (IZON), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), and indium (IGZO). gallium zinc oxide), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IrOx, RuOx, RuOx/ITO, Ni/IrOx/Au, Ni/ It may include at least one of IrOx/Au/ITO, Pt, Ni, Au, Rh, or Pd.

Next, as shown in FIG. 9 , a first reflective layer 134 may be formed on the second contact electrode 132 . The first reflective layer 134 is disposed on the second contact electrode 132 , and may reflect light incident through the second contact electrode 132 .

The first reflective layer 134 includes a metal, for example, one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, and an alloy of two or more of them; It may be formed in a plurality of layers.

Next, a capping layer 136 may be formed on the first reflective layer 134 .

The second electrode layer 130 may include the second contact electrode 132 , the first reflective layer 134 , and the capping layer 136 , and the second electrode layer 130 is a pad electrode 180 to be formed later. ) may be supplied to the second conductivity type semiconductor layer 116 .

The capping layer 136 is disposed on the first reflective layer 134 and may supply power supplied from the pad electrode 180 to be formed thereafter to the first reflective layer 134 . The capping layer 136 may function as a current diffusion layer.

The capping layer 136 includes a metal and is a material with high electrical conductivity, for example, Sn, Ga, In, Bi, Cu, Ni, Ag, Mo, Al, Au, Nb, W, Ti, Cr, Ta, It may include at least one of Al, Pd, Pt, Si and an optional alloy thereof.

Next, as shown in FIG. 10 , a first semiconductor contact layer 160 may be formed on the exposed first conductivity-type semiconductor layer 112 . For example, the first semiconductor contact layer 160 may be formed on the exposed first conductivity-type semiconductor layer 112 by performing a re-growth process using a MOCVD method.

The first semiconductor contact layer 160 may be formed of the same material as the first conductivity type semiconductor layer 112 . For example, the first semiconductor contact layer 160 may be In _x Al _y Ga ₁ -x- _y N ( _{0≤≤x≤≤1} , 0≤≤y≤≤1, 0≤≤x+y≤≤ It may be formed of a semiconductor layer having the composition formula of 1).

In addition, the first semiconductor contact layer 160 may be selected from a group III-V element compound semiconductor, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, etc. .

In an embodiment, the first semiconductor contact layer 160 may be doped with a first conductivity type element, for example, an n-type doping element, and the first conductivity type element doped into the first semiconductor contact layer 160 is The doping concentration may be higher than the doping concentration of the first conductivity-type doping element doped in the first conductivity-type semiconductor layer 112 .

For example, the first semiconductor contact layer 160 may be an n-type semiconductor layer, and the first conductivity-type dopant may include an n-type dopant such as Si, Ge, Sn, Se, Te, or the like.

Accordingly, according to the embodiment, the doping concentration of the first conductivity-type element doped in the first semiconductor contact layer 160 is formed to be higher than the doping concentration of the first conductivity-type semiconductor layer 112 , thereby improving the current injection efficiency. have.

In an embodiment, the first semiconductor contact layer 160 may be formed to extend upwardly from a plurality of holes H penetrating through the active layer 114 and exposing a portion of the first conductivity-type semiconductor layer 112 . can

The upper shape of the first semiconductor contact layer 160 may have a trapezoidal shape, thereby increasing the contact area with the first electrode layer 150 to be formed later, but is not limited thereto.

이하로 형성될 수 있다. 상기 제1 반도체 컨택층(160)의 수평 폭이 약 100

이후 형성되는 제2 전극층(130)과 접촉하여 통전될 수 있기 때문에 제2 전극층(130)과 통전되지 않는 범위에서 수평 폭을 구비할 수 있다. 또한, 상기 제1 반도체 컨택층(160)의 수평폭은 상기 비아홀(H)의 폭보다 크게 형성될 수 있으며, 예를 들어 상기 비아홀(H)의 수평폭이 약 24

상기 제1 반도체 컨택층(160)은 약 24

초과의 수평 폭으로 형성될 수 있으나 이에 한정되는 것은 아니다.In the embodiment, the horizontal width of the first semiconductor contact layer 160 is formed to be larger than the horizontal width (based on the horizontal width of the bottom surface) of the plurality of holes H, and is approximately 100

It can be formed as follows. The horizontal width of the first semiconductor contact layer 160 is about 100

Since the second electrode layer 130 formed thereafter and may be energized, the horizontal width may be provided in a range not energized with the second electrode layer 130 . In addition, the horizontal width of the first semiconductor contact layer 160 may be formed to be greater than the width of the via hole (H), for example, the horizontal width of the via hole (H) is about 24.

The first semiconductor contact layer 160 is about 24

It may be formed with an excessive horizontal width, but is not limited thereto.

Next, an insulating layer 140 may be formed on the capping layer 136 and the first channel layer 120 . The insulating layer 140 may be formed to expose the semiconductor contact layer 160 . Through this, the diffusion barrier layer 154 to be formed later is in contact with the side surface of the first semiconductor contact layer 160 to expand a contact area between them, thereby reducing electrical resistance and improving current injection efficiency.

The insulating layer 140 may electrically insulate between the first semiconductor contact layer 160 and the second conductivity type semiconductor layer 116 . The insulating layer 140 may be formed of a material selected from SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO ₂ .

Next, a diffusion barrier layer 154 may be formed on the side surfaces of the insulating layer 140 and the first semiconductor contact layer 160 , and a bonding layer 156 may be formed on the diffusion barrier layer 154 . .

The diffusion barrier layer 154 and/or the bonding layer 156 may be a single layer or a plurality of layers including at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, or Ta. have.

The diffusion barrier layer 154 and/or the bonding layer 156 may be formed by at least one of a deposition method, a sputtering method, and a plating method, or may be attached with a conductive sheet.

The bonding layer 156 may not be formed, but is not limited thereto.

According to an embodiment, the diffusion barrier layer 154 may be in contact with a side surface of the first semiconductor contact layer 160 , and the bonding layer 156 may be in contact with the first semiconductor contact layer 160 , thereby forming a first electrode layer. A contact area between 150 and the first semiconductor contact layer 160 may be increased.

Accordingly, according to the embodiment, the contact resistance between the first semiconductor contact layer 160 and the first electrode layer 150 is reduced, thereby preventing an increase in operating voltage, thereby improving optical output and improving electrical reliability.

Also, according to the embodiment, the luminous flux may be improved by improving the current injection efficiency according to an increase in the contact area between the first semiconductor contact layer 160 and the first electrode layer 150 .

In an embodiment, the upper region (lower region when referring to FIG. 2 ) of the first semiconductor contact layer 160 may have a slope on the side to increase the surface area, and the diffusion barrier layer 154 is the first semiconductor By making contact with the side surfaces of the contact layer 160 , a mutual contact area is widened, and an increase in the operating voltage can be prevented by reducing the contact resistance.

In addition, according to the embodiment, the contact area is widened by the slanted side surface of the first semiconductor contact layer 160 and the diffusion barrier layer 154 coming into contact with the current between the first electrode layer 150 and the first semiconductor contact layer 160 . By improving the injection efficiency, the luminous flux can be improved.

Next, a support member 158 may be formed on the bonding layer 156 . The diffusion barrier layer 154, the bonding layer 156, and the support member 158 may be referred to as a first electrode layer 150, and the first electrode layer 150 is a lower electrode 159 (FIG. 14). reference) may be supplied to the first conductivity-type semiconductor layer 112 .

The support member 158 may be bonded to the bonding layer 156, but is not limited thereto. The support member 158 may be a conductive support member, and as a base substrate, at least one of copper (Cu), gold (Au), nickel (Ni), molybdenum (Mo), copper-tungsten (Cu-W), and the like. can be one

In addition, the support member 158 may be implemented with a carrier wafer, for example, Si, Ge, GaAs, ZnO, SiC, SiGe, Ga ₂ O ₃ , GaN, etc., on a circuit pattern of a board or a lead frame of a package. It can be bonded with solder.

Next, as shown in FIG. 11 , the growth substrate 105 may be removed. In this case, the surface of the first conductivity type semiconductor layer 112 may be exposed by removing the undoped semiconductor layer (not shown) remaining after the removal of the growth substrate 105 .

The growth substrate 105 may be removed by physical and/or chemical methods. For example, the method of removing the growth substrate 105 may be performed by a laser lift off (LLO) process. For example, the growth substrate 105 is lifted off by irradiating a laser having a wavelength of a predetermined region to the growth substrate 105 .

Alternatively, a buffer layer (not shown) disposed between the growth substrate 105 and the first conductivity type semiconductor layer 112 may be removed using a wet etching solution to separate the growth substrate 105 .

When the growth substrate 105 is removed and the buffer layer is removed by etching or polishing, an upper surface of the first conductivity-type semiconductor layer 112 may be exposed.

A top surface of the first conductivity type semiconductor layer 112 is an N-face, and may be a surface closer to the growth substrate. The upper surface of the first conductivity type semiconductor layer 112 may be etched using an inductively coupled plasma/reactive ion etching (ICP/RIE) method or polished using a polishing device.

Next, as shown in FIG. 12 , a portion of the light emitting structure layer 110 may be removed to expose a portion of the first channel layer 120 . For example, portions of the first conductivity type semiconductor layer 112 , the active layer 114 , and the second conductivity type semiconductor layer 116 in the region where the pad electrode 180 is to be formed may be removed.

For example, by performing wet etching or dry etching, the periphery of the light emitting structure layer 110 , that is, a channel region or an isolation region that is a boundary region between a chip and a chip may be removed, and the first channel layer 120 . can be exposed.

A light extraction structure P may be formed on the upper surface of the first conductivity type semiconductor layer 112 , and the light extraction structure may be formed in a roughness or pattern. The light extraction structure may be formed by a wet or dry etching method.

Next, as shown in FIG. 13 , a passivation layer 170 may be formed on the exposed first channel layer 120 and the light emitting structure layer 110 . The passivation layer 170 may have a pattern corresponding to the pattern of the light extraction structure (P). The passivation layer 170 may be formed of a material selected from SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , and TiO ₂ .

Thereafter, a portion of the capping layer 136 may be exposed by forming a second hole H2 in which a portion of the passivation layer 170 and the first channel layer 120 are removed in the region where the pad electrode 180 is to be formed. have.

Next, as shown in FIG. 14 , the pad electrode 180 may be formed on the exposed capping layer 136 , and the lower electrode 159 is formed under the first electrode layer 150 to emit light according to the embodiment. The device 100 may be manufactured.

The pad electrode 180 or the lower electrode 159 may be formed of a material such as Ti/Au, but is not limited thereto. The pad electrode 180 is a portion to be bonded with a wire, and may be disposed on a predetermined portion of the light emitting structure layer 110 , and may be formed in one or a plurality.

According to the embodiment, it is possible to provide a light emitting device and a method of manufacturing a light emitting device capable of improving optical output and electrical reliability by preventing an increase in operating voltage by reducing a contact resistance between a semiconductor contact layer and an electrode layer.

In addition, according to the embodiment, the luminous flux may be improved by improving the current injection efficiency between the semiconductor contact layer and the electrode layer.

In addition, according to the embodiment, by preventing absorption of light by the semiconductor contact layer, light extraction efficiency can be improved, thereby improving the luminous flux.

15 is a view showing a light emitting device package 200 to which a light emitting device according to an embodiment is applied.

The light emitting device package 200 according to the embodiment is provided on a body 205 , first lead electrodes 213 and second lead electrodes 214 disposed on the body 205 , and the body 205 , The light emitting device 100 electrically connected to the first lead electrode 213 and the second lead electrode 214 may include a molding member 240 surrounding the light emitting device 100 .

The body 205 may be formed of a silicon material, a synthetic resin material, or a metal material, and an inclined surface may be formed around the light emitting device 100 .

The first lead electrode 213 and the second lead electrode 214 are electrically isolated from each other and provide power to the light emitting device 100 . In addition, the first lead electrode 213 and the second lead electrode 214 reflect the light generated by the light emitting device 100 to increase light efficiency, and the heat generated by the light emitting device 100 . It may also play a role in discharging to the outside.

The light emitting device 100 may be disposed on the body 205 or disposed on the first lead electrode 213 or the second lead electrode 214 .

The light emitting device 100 may be electrically connected to the first lead electrode 213 and the second lead electrode 214 by any one of a wire method, a flip chip method, and a die bonding method.

In the embodiment, the light emitting device 100 is mounted on the second lead electrode 214 and may be connected to the first lead electrode 213 and the wire 250, but the embodiment is not limited thereto.

The molding member 240 may surround the light emitting device 100 to protect the light emitting device 100 . In addition, the molding member 240 may include a phosphor 232 to change the wavelength of light emitted from the light emitting device 100 . The upper surface of the molding member 240 may have a flat cross-section or a convex or concave shape, but is not limited thereto.

A plurality of light emitting devices or light emitting device packages according to the embodiment may be arrayed on a substrate, and optical members such as lenses, light guide plates, prism sheets, diffusion sheets, etc. may be disposed on a light path of the light emitting device package. Such a light emitting device package, a substrate, and an optical member may function as a light unit. The light unit may be implemented as a top view or side view type, and may be provided in display devices such as portable terminals and notebook computers, or may be variously applied to lighting devices and indicating devices. Another embodiment may be implemented as a lighting device including the light emitting device or the light emitting device package described in the above-described embodiments. For example, the lighting device may include a lamp, a street lamp, an electric billboard, and a headlamp.

16 is an exploded perspective view of a lighting device according to an embodiment.

The lighting device according to the embodiment may include a cover 2100 , a light source module 2200 , a heat sink 2400 , a power supply unit 2600 , an inner case 2700 , and a socket 2800 . In addition, the lighting device according to the embodiment may further include any one or more of the member 2300 and the holder 2500 . The light source module 2200 may include a light emitting device package according to an embodiment.

For example, the cover 2100 may have a shape of a bulb or a hemisphere, and may be provided in a shape with a hollow inside and an open part. The cover 2100 may be optically coupled to the light source module 2200 . For example, the cover 2100 may diffuse, scatter, or excite the light provided from the light source module 2200 . The cover 2100 may be a kind of optical member. The cover 2100 may be coupled to the heat sink 2400 . The cover 2100 may have a coupling portion coupled to the heat sink 2400 .

A milky white paint may be coated on the inner surface of the cover 2100 . The milky white paint may include a diffusing material for diffusing light. The surface roughness of the inner surface of the cover 2100 may be greater than the surface roughness of the outer surface of the cover 2100 . This is so that the light from the light source module 2200 is sufficiently scattered and diffused to be emitted to the outside.

The material of the cover 2100 may be glass, plastic, polypropylene (PP), polyethylene (PE), polycarbonate (PC), or the like. Here, polycarbonate is excellent in light resistance, heat resistance, and strength. The cover 2100 may be transparent or opaque so that the light source module 2200 can be seen from the outside. The cover 2100 may be formed through blow molding.

The light source module 2200 may be disposed on one surface of the heat sink 2400 . Accordingly, heat from the light source module 2200 is conducted to the heat sink 2400 . The light source module 2200 may include a light source unit 2210 , a connection plate 2230 , and a connector 2250 .

The member 2300 is disposed on the upper surface of the heat sink 2400 and has guide grooves 2310 into which a plurality of light sources 2210 and a connector 2250 are inserted. The guide groove 2310 corresponds to the board and the connector 2250 of the light source unit 2210 .

The surface of the member 2300 may be coated or coated with a light reflective material. For example, the surface of the member 2300 may be coated or coated with a white paint. The member 2300 reflects the light reflected on the inner surface of the cover 2100 and returned to the light source module 2200 in the direction of the cover 2100 again. Accordingly, the light efficiency of the lighting device according to the embodiment may be improved.

The member 2300 may be made of, for example, an insulating material. The connection plate 2230 of the light source module 2200 may include an electrically conductive material. Accordingly, electrical contact may be made between the heat sink 2400 and the connection plate 2230 . The member 2300 may be made of an insulating material to block an electrical short between the connection plate 2230 and the heat sink 2400 . The heat sink 2400 receives heat from the light source module 2200 and heat from the power supply unit 2600 and radiates heat.

The holder 2500 blocks the receiving groove 2719 of the insulating part 2710 of the inner case 2700 . Accordingly, the power supply unit 2600 accommodated in the insulating unit 2710 of the inner case 2700 is sealed. The holder 2500 has a guide protrusion 2510 . The guide protrusion 2510 has a hole through which the protrusion 2610 of the power supply unit 2600 passes.

The power supply unit 2600 processes or converts an electrical signal received from the outside and provides it to the light source module 2200 . The power supply unit 2600 is accommodated in the receiving groove 2719 of the inner case 2700 , and is sealed inside the inner case 2700 by the holder 2500 .

The power supply unit 2600 may include a protrusion part 2610 , a guide part 2630 , a base 2650 , and an extension part 2670 .

The guide part 2630 has a shape protruding outward from one side of the base 2650 . The guide part 2630 may be inserted into the holder 2500 . A plurality of components may be disposed on one surface of the base 2650 . A plurality of components include, for example, a DC converter for converting AC power provided from an external power source into DC power, a driving chip for controlling the driving of the light source module 2200 , and ESD for protecting the light source module 2200 . (ElectroStatic discharge) may include a protection device, but is not limited thereto.

The extension 2670 has a shape protruding outward from the other side of the base 2650 . The extension part 2670 is inserted into the connection part 2750 of the inner case 2700 and receives an electrical signal from the outside. For example, the extension portion 2670 may be provided to be equal to or smaller than the width of the connection portion 2750 of the inner case 2700 . Each end of the "+ wire" and the "- wire" may be electrically connected to the extension part 2670 , and the other end of the "+ wire" and the "- wire" may be electrically connected to the socket 2800 . .

The inner case 2700 may include a molding unit together with the power supply unit 2600 therein. The molding part is a part where the molding liquid is hardened, and allows the power supply unit 2600 to be fixed inside the inner case 2700 .

Features, structures, effects, etc. described in the above embodiments are included in at least one embodiment, and are not necessarily limited to only one embodiment. Furthermore, features, structures, effects, etc. illustrated in each embodiment can be combined or modified for other embodiments by those of ordinary skill in the art to which the embodiments belong. Accordingly, the contents related to such combinations and modifications should be interpreted as being included in the scope of the embodiments.

In the above, the embodiment has been mainly described, but this is only an example and does not limit the embodiment, and those of ordinary skill in the art to which the embodiment pertains are provided with several examples not illustrated above within a range that does not depart from the essential characteristics of the embodiment. It can be seen that variations and applications of branches are possible. For example, each component specifically shown in the embodiment can be implemented by modification. And differences related to such modifications and applications should be interpreted as being included in the scope of the embodiments set forth in the appended claims.

The light emitting structure layer 110, the first conductivity type semiconductor layer 112,
The second conductivity type semiconductor layer 116, the active layer 114,
The first electrode layer 150 , the second electrode layer 130 ,
a first semiconductor contact layer 160 , an insulating layer 140 ,
The passivation layer 170 , the pad electrode 180 .

Claims (16)

a first conductivity type semiconductor layer;
a second conductivity type semiconductor layer disposed under the first conductivity type semiconductor layer;
an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer;
a plurality of holes passing through the second conductivity type semiconductor layer and the active layer from a bottom surface of the second conductivity type semiconductor layer and exposing a portion of the first conductivity type semiconductor layer;
a first semiconductor contact layer electrically connected to the first conductivity type semiconductor layer through the plurality of holes from a bottom surface of the second conductivity type semiconductor layer;
a first electrode layer disposed under the first semiconductor contact layer and electrically connected; and
a second electrode layer electrically connected to the second conductivity-type semiconductor layer;
the first semiconductor contact layer includes a lower region in contact with the first electrode layer and an upper region disposed on the lower region;
The lower region of the first semiconductor contact layer includes a slope to the side,
The first electrode layer is a light emitting device in contact with a side surface of the lower region including a slope. The method of claim 1,
The first semiconductor contact layer is doped with a first conductivity type element, and is formed of a nitride semiconductor layer of the same series as the first conductivity type semiconductor layer,
A doping concentration of the first conductivity-type doping element doped into the first semiconductor contact layer is higher than a doping concentration of the first conductivity-type doping element doped into the first conductivity-type semiconductor layer. The method of claim 1,
The first electrode layer,
a diffusion barrier layer disposed on a side surface of the first semiconductor contact layer; and
a bonding layer disposed under the diffusion barrier layer; and
Including; a support member disposed under the bonding layer;
The diffusion barrier layer is in contact with the side surface of the lower region including the slope,
The bonding layer is a light emitting device in contact with a bottom surface of the lower region disposed between the side surfaces of the lower region. The method of claim 1,
an upper surface of the first semiconductor contact layer is disposed above the active layer in a vertical direction;
A bottom surface of the first semiconductor contact layer is disposed below the second conductivity-type semiconductor layer in a vertical direction. The method of claim 1,
Further comprising a first channel layer disposed between the first conductivity-type semiconductor layer and the first semiconductor contact layer,
The upper region of the first semiconductor contact layer includes a slope on the side,
The first channel layer is a light emitting device in contact with a side surface of the upper region including a slope. A lighting system comprising a light emitting unit having the light emitting device according to any one of claims 1 to 5. delete delete delete delete delete delete delete delete delete delete

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