KR102366863B1 - Digitizer and image display device including the same - Google Patents

Abstract

One objective of the present invention is to provide a digitizer having improved mechanical and electrical reliability. The digitizer comprises: a substrate layer including an active region, a peripheral region surrounding the active region, and a circuit connection region assigned to one end of the substrate layer; a conductive coil including a first conductive coil disposed on the active region of the substrate layer and extending in a row direction and a second conductive coil extending in a column direction; and traces disposed on the active region of the base layer, extending to the circuit connection region, and respectively connected to the first conductive coil and the second conductive coil. At least one of the traces has a variable width that increases as the at least one trace moves away from the circuit connection region.

Description

Digitizer and image display device including same

The present invention relates to a digitizer and an image display device including the same. More particularly, it relates to a digitizer including a multilayer conductive structure and an image display device including the same.

Recently, various sensing functions and communication functions are combined in an image display device, and are implemented in the form of, for example, a smartphone. For example, electronic devices in which a touch panel or a touch sensor is attached to a display panel of the image display device to select a menu displayed on a window surface to implement an information input function are being developed.

In addition, as disclosed in Korean Patent No. 10-1750564, a digitizer that converts analog coordinate information into a digital signal by an electromagnetic method is disposed on the back side of the image display device.

The digitizer needs a circuit design with low resistance to improve electromagnetic induction efficiency. However, when the wiring thickness is increased in order to increase the sensitivity of the digitizer, a step may be caused in the image display device. Also, when a difference in resistance occurs according to positions of circuits included in the digitizer, a difference in sensitivity for each region of the image display device may be caused.

Recently, a flexible display having flexibility that can be folded or bent is being developed, and accordingly, a sensor structure such as the digitizer needs to be developed to have appropriate properties, design, and structure to be applied to the flexible display.

Korean Patent Publication No. 10-1750564

One object of the present invention is to provide a digitizer having improved mechanical and electrical reliability.

An object of the present invention is to provide an image display device including a digitizer having improved mechanical and electrical reliability.

1. A substrate layer comprising an active region, a peripheral region surrounding the active region, and a circuit connection region allocated to one end of the substrate layer; a conductive coil disposed on the active region of the base layer and including a first conductive coil extending in a row direction and a second conductive coil extending in a column direction; and traces disposed on the active region of the base layer to extend to the circuit connection region and respectively connected to the first conductive coil and the second conductive coil, wherein at least one of the traces comprises the circuit A digitizer having a variable width that increases in width as it moves away from the connection area.

2. The digitizer according to 1 above, wherein the at least one trace includes an extension that increases in width in the row direction.

3. The digitizer according to 2 above, wherein the at least one trace has a stepped shape in a planar direction.

4. The digitizer according to 2 above, wherein the at least one trace includes a plurality of extensions, and the width of the extensions increases as the distance from the circuit connection area increases.

5. In the above 2, a trace group is defined by the traces disposed adjacently in the row direction among the traces, and the traces included in the trace group are arranged to increase in length sequentially along the row direction. , digitizer.

6. The digitizer according to 5 above, wherein the number of extensions increases as the length of the traces included in the trace group increases.

7. The method of 1 above, wherein the first conductive coil includes first upper conductive lines extending in the row direction, second lower conductive lines extending in the column direction, and the second lower conductive lines and the second conductive coil. 1 comprising first contacts electrically connecting the upper conductive lines;

The second conductive coil electrically connects first lower conductive lines extending in the column direction, second upper conductive lines extending in the row direction, and the first lower conductive lines and the second upper conductive lines A digitizer comprising second contacts for coupling.

8. The method of 7 above, further comprising an interlayer insulating layer formed on the base layer,

The first lower conductive lines and the second lower conductive lines are disposed on the upper surface of the base layer together with the traces, and the interlayer insulating layer is formed on the upper surface of the base layer to form the first lower conductive line lines, the second lower conductive lines, and the traces, the first upper conductive lines and the second upper conductive lines being disposed on a top surface of the interlayer insulating layer.

9. In the above 8, a trace group is defined by the traces arranged adjacently in the row direction among the traces,

A digitizer, wherein a plurality of the trace groups are arranged to be spaced apart along the row direction.

10. The digitizer according to 9 above, further comprising a first dummy pattern disposed between the trace groups on the upper surface of the base layer and separated from the traces.

11. The method of 8 above, wherein a plurality of the first conductive coils are arranged along the column direction, and a plurality of the second conductive coils are arranged along the row direction,

A digitizer, wherein lattice spaces are defined by the first conductive coils and the second conductive coils intersecting each other in a planar direction.

12. The digitizer of the above 11, further comprising a second dummy pattern disposed in the lattice spaces on the upper surface of the base layer.

13. The digitizer according to 8 above, wherein a thickness of the first lower conductive lines is greater than a thickness of the first upper conductive lines.

14. The digitizer according to the above 13, wherein the base layer includes a bending region in the central portion.

15. The digitizer according to 14 above, wherein a bending axis of the bending region intersects the first upper conductive lines and is parallel to the first lower conductive lines.

16. Display panel; and a digitizer according to the above-described embodiments disposed under the display panel.

17. The image display device according to 16 above, further comprising a touch sensor disposed on the display panel.

18. The method of 17 above, further comprising a rear cover and a window substrate,

The touch sensor is disposed between the window substrate and the display panel, and the digitizer is disposed between the display panel and the rear cover.

According to embodiments of the present invention, traces that transmit input/output signals to the conductive coil in the active region of the digitizer may be formed to have a variable width. For example, the traces may be sequentially formed to include an extension having a wider width as the distance from the circuit connection region increases.

Accordingly, it is possible to prevent an increase in resistance as the distance increases in the circuit connection region, and to improve the uniformity of resistance and signal sensitivity in the conductive coils.

In some embodiments, a dummy pattern may be disposed in a space between the traces or between the conductive coils. An empty space in which the conductive pattern is not disposed is reduced by the dummy pattern, thereby suppressing or reducing the generation of a step by the digitizer.

In example embodiments, the digitizer may include a multilayer structure of a lower conductive layer and an upper conductive layer. The upper conductive layer may include a first upper conductive line intersecting a bending axis, and the first conductive layer may include a first lower conductive line parallel to the bending axis. By forming it smaller than the first lower conductive line, it is possible to suppress electrode cracks and improve bending characteristics.

The digitizer may include a plurality of first conductive coils and second conductive coils, and the first conductive coil and the second conductive coil may include a plurality of conductive loops. Accordingly, a digitizer that promotes the electromagnetic induction phenomenon and has high resolution and improved flexible characteristics can be provided.

1 is a schematic cross-sectional view illustrating a digitizer according to exemplary embodiments.
2 and 3 are schematic plan views illustrating conductive coils included in a digitizer according to example embodiments.
4 is a schematic plan view illustrating a digitizer according to exemplary embodiments.
5 is a schematic partially enlarged plan view showing the structure of traces of a digitizer according to exemplary embodiments.
6 and 7 are schematic partial enlarged plan views illustrating an arrangement of a dummy pattern of a digitizer according to example embodiments.
8 is a schematic cross-sectional view illustrating an image display apparatus according to example embodiments.

SUMMARY Embodiments of the present invention provide a digitizer including conductive coils having a multi-layer structure and traces connected to the conductive coils, and having improved electrical characteristics and mechanical reliability. Also provided is an image display device including a digitizer.

Hereinafter, with reference to the drawings, embodiments of the present invention will be described in more detail. However, the following drawings attached to the present specification illustrate preferred embodiments of the present invention, and serve to further understand the technical spirit of the present invention together with the above-described contents of the present invention, so the present invention is described in such drawings It should not be construed as being limited only to the matters.

In the following drawings, two directions parallel to and intersecting with the upper surface of the digitizer 100 or the base layer 105 are defined as a first direction and a second direction. For example, the first direction and the second direction may cross each other perpendicularly. A direction other than the direction indicated by the arrow in the drawings is also regarded as the same direction.

The first direction may correspond to a width direction, a row direction, or an X-direction of the digitizer 100 . The second direction may correspond to a longitudinal direction, a column direction, or a Y-direction of the digitizer 100 .

The terms "row direction", "column direction", etc. used in the present application do not refer to absolute directions, and should be understood as relative meanings designating different directions.

1 is a schematic cross-sectional view showing a digitizer according to exemplary embodiments. 2 and 3 are schematic plan views illustrating conductive coils included in a digitizer according to example embodiments. For example, FIG. 1 is a cross-sectional view taken along the line I-I' shown in FIG. 2 in the thickness direction.

For convenience of explanation, the traces 60 and 80 are shown to have a uniform width in FIGS. 2 and 3, and for the arrangement and shape of the traces 60 and 80, refer to FIGS. 4 and 5. It will be described later in detail.

Referring to FIG. 1 , the digitizer 100 may include a lower conductive layer 110 and an upper conductive layer 130 formed on a base layer 100 . The lower conductive layer 110 and the upper conductive layer 130 may be separated in different layers with the interlayer insulating layer 120 interposed therebetween.

The substrate layer 100 is used to encompass a support layer or a film-type substrate for forming the conductive layers 110 and 130 and the interlayer insulating layer 120 . For example, the base layer 100 may include a polymer applicable to a flexible display. Examples of the polymer include cyclic olefin polymer (COP), polyethylene terephthalate (PET), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyphenylene sulfide (PPS), poly Allylate (polyallylate), polyimide (PI), cellulose acetate propionate (CAP), polyethersulfone (PES), cellulose triacetate (TAC), polycarbonate (PC), cyclic olefin copolymer (COC), poly Methyl methacrylate (PMMA), etc. are mentioned.

Preferably, the base layer 105 may include polyimide to secure stable bending properties.

Each of the lower conductive layer 110 and the upper conductive layer 130 may include a low-resistance metal. For example, the lower conductive layer 110 and the upper conductive layer 130 are silver (Ag), gold (Au), copper (Cu), aluminum (Al), platinum (Pt), palladium (Pd), chromium ( Cr), titanium (Ti), tungsten (W), niobium (Nb), tantalum (Ta), vanadium (V), iron (Fe), manganese (Mn), cobalt (Co), nickel (Ni), zinc ( Zn), tin (Sn), molybdenum (Mo), calcium (Ca), or an alloy containing at least two of them.

Preferably, the lower conductive layer 110 and the upper conductive layer 130 may include copper or a copper alloy to realize low resistance.

The interlayer insulating layer 120 may be formed on the upper surface of the base layer 105 to cover the lower conductive layer 110 . The interlayer insulating layer 120 may include an organic insulating material such as an epoxy-based resin, an acrylic resin, a siloxane-based resin, or a polyimide-based resin, or an inorganic insulating material such as silicon oxide or silicon nitride. Preferably, the interlayer insulating layer 120 may be formed using an organic insulating material to improve flexible properties.

The upper conductive layer 130 may be formed on the interlayer insulating layer 120 . In some embodiments, the passivation layer 140 may be formed on the interlayer insulating layer 120 to cover the upper conductive layer 130 . The passivation layer 140 may include an organic insulating material such as an epoxy-based resin, an acrylic resin, a siloxane-based resin, or a polyimide-based resin, or an inorganic insulating material such as silicon oxide or silicon nitride.

Preferably, the passivation layer 140 may be formed using an organic insulating material to improve flexible properties. In an embodiment, each of the interlayer insulating layer 120 and the passivation layer 140 may have a thickness in a range of about 1.5 to 20 μm to improve bending properties, and may include the organic insulating material.

In an embodiment, each of the interlayer insulating layer 120 and the passivation layer 140 may include the inorganic insulating material and may have a thickness of about 100 nm to 500 nm.

2 and 3 , the digitizer 100 according to example embodiments may include a first conductive coil 50 and a second conductive coil 70 .

The first conductive coil 50 and the second conductive coil 70 may be defined by combining the lower conductive layer 110 and the upper conductive layer 130 by the contacts 135 and 137 .

The lower conductive layer 110 may include a first lower conductive line 112 (see FIG. 3 ) and a second lower conductive line 114 (see FIG. 2 ). The upper conductive layer 130 may include a first upper conductive line 132 (see FIG. 2 ) and a second upper conductive line 134 (see FIG. 3 ).

The first lower conductive line 112 and the second lower conductive line 114 may extend in the second direction. The first upper conductive line 132 and the second upper conductive line 134 may extend in a first direction.

As shown in FIG. 2 , the first upper conductive line 132 of the upper conductive layer 130 and the second lower conductive line 114 of the lower conductive layer 110 are coupled to each other to form a first conductive coil 50 . can form.

The first upper conductive line 132 and the second lower conductive line 114 may together form a first conductive coil 50 to serve as a sensing line for an input pen through electromagnetic induction.

For example, the first upper conductive line 132 and the second lower conductive line 114 may be electrically connected to each other through the first contact 135 . A plurality of first upper conductive lines 132 and a plurality of second lower conductive lines 114 are electrically connected to each other through a plurality of first contacts 135 to form a single first conductive coil 50 . A plurality of conductive loops may be included. For example, four first conductive loops may be included in one first conductive coil 50 .

In some embodiments, the first conductive loops may have different sizes or areas in a planar direction. The first contact 135 may pass through the interlayer insulating layer 120 to be formed substantially integrally with the first upper conductive line 132 .

A first trace 60 may be connected to any one of the first conductive loops. According to example embodiments, the first trace 60 may include a first input line 62 and a first output line 64 .

A first input line 62 is connected to a first conductive loop of any one of the first conductive loops, and a first output line 64 is connected to a first conductive loop of the other of the first conductive loops. can

For example, the first input line 62 may be connected to an innermost first conductive loop among the first conductive loops. The first output line 64 may be connected to an outermost first conductive loop among the first conductive loops.

The current input from the first input line 62 may alternately cycle through the lower conductive layer 110 and the upper conductive layer 130 through the first conductive loops, and may be discharged through the first output line 64 . there is.

In some embodiments, the first input line 62 and the first output line 64 may be included in the lower conductive layer 110 .

In some embodiments, the lower conductive layer 110 may further include a first internal connection line 114a. For example, first conductive loops adjacent to the first internal connection line 114a may be connected to each other.

As shown in FIG. 3 , the first lower conductive line 112 of the lower conductive layer 110 and the second upper conductive line 134 of the upper conductive layer 130 are coupled to each other to form a second conductive coil 70 . can form.

The first lower conductive line 112 and the second upper conductive line 134 may be provided together as a sensing line for an input pen through electromagnetic induction by forming a second conductive coil 70 together.

For example, the first lower conductive line 112 and the second upper conductive line 134 may be electrically connected to each other through the second contact 137 . A plurality of first lower conductive lines 112 and a plurality of second upper conductive lines 134 are electrically connected to each other through a plurality of second contacts 137 to form a single second conductive coil 70 . A plurality of conductive loops may be included. For example, four second conductive loops may be included in one second conductive coil 70 .

In some embodiments, the second conductive loops may have different sizes or areas in a planar direction. The second contact 137 may pass through the interlayer insulating layer 120 to be formed substantially integrally with the second upper conductive line 134 .

A second trace 80 may be connected to any one of the second conductive loops. According to example embodiments, the second trace 80 may include a second input line 82 and a second output line 84 .

For example, the second input line 82 may be connected to an innermost second conductive loop among the second conductive loops. The second output line 84 may be connected to an outermost second conductive loop among the second conductive loops.

The current input from the second input line 82 may alternately cycle through the lower conductive layer 110 and the upper conductive layer 130 through the second conductive loops, and may be discharged through the second output line 84 . there is.

In some embodiments, the second input line 82 and the second output line 84 may be included in the lower conductive layer 110 .

In some embodiments, the upper conductive layer 130 may further include an external connection line 134a. For example, the second input line 82 and the second output line 84 may be connected to the second conductive loop and the second contact 137 by the external connection line 134a.

In an embodiment, the external connection line 134a may be connected to two different second conductive coils. For example, the second output line 84 connected to one of the second conductive coils 70 may be connected to the input line 82 of the other second conductive coil 70 through an external connection line 134a. .

In some embodiments, the upper conductive layer 130 may further include a second internal connection line 134b. For example, adjacent second conductive loops in the second conductive coil 70 may be connected to each other by the second internal connection line 134b.

Although it is illustrated that four conductive loops are included in one conductive coil in FIGS. 2 and 3 , the number of conductive loops in the conductive coil may be adjusted in consideration of the size and resolution of the image display device.

As described with reference to FIGS. 2 and 3 , the first conductive coil 50 and the second conductive coil 70 may each include a plurality of conductive loops having different sizes.

Accordingly, it is possible to sufficiently increase the magnetic field strength generated through the digitizer 100 , so that, for example, energy transfer to the input pen in contact with the window surface of the image display apparatus can be efficiently enhanced.

In addition, since the lower conductive layer 110 and the upper conductive layer 130 are connected through the contacts 135 and 137 to form a conductive loop, the number of loops of the conductive coil in a limited space is efficiently increased and electromagnetic induction efficiency is achieved. can improve

In example embodiments, both the lower conductive layer 110 and the upper conductive layer 130 may be disposed on the upper surface of the base layer 105 . Accordingly, when bending or folding through the base layer 105 , the stress direction for the first conductive layer 110 and the second conductive layer 130 may be adjusted to be the same.

For example, when tensile stress is applied to the bottom surface of the base layer 105 , compressive stress may be applied to the lower conductive layer 110 and the upper conductive layer 130 . Accordingly, a neutral plane in which stress is canceled may be easily generated to be adjacent to the conductive layers 110 and 130 . Accordingly, stress applied to the conductive layers 110 and 130 may be relieved, thereby reducing or preventing electrode cracking due to bending.

In example embodiments, the thickness of the lower conductive layer 110 may be greater than the thickness of the upper conductive layer 130 . For example, the thickness of the first lower conductive line 112 may be greater than the thickness of the first upper conductive line 132 .

As will be described later with reference to FIG. 4 , the first upper conductive line 132 may extend in a first direction (eg, a row direction or a width direction) and intersect a bending axis. For example, the first upper conductive line 132 may be perpendicular to the bending axis. The first lower conductive line 112 may extend in a second direction (a column direction or a length direction) and may be substantially parallel to the bending axis.

According to example embodiments, by reducing the thickness of the first upper conductive line 132 through which bending stress is easily transmitted as it intersects the bending axis, prevention of cracks in the conductive line may be reduced or suppressed. The first lower conductive line 112 that is parallel to the bending axis and is relatively free from bending stress is formed to have a large thickness, so that a sufficient electromagnetic induction effect may be realized by expanding a current path through the conductive coil.

In an embodiment, the second lower conductive line 114 may also have a greater thickness than the second upper conductive line 134 .

In some embodiments, the thickness of the lower conductive layer 110 (the first lower conductive line or the second lower conductive line) may be about 5 to 20 μm, preferably 10 to 20 μm. The thickness of the upper conductive layer 130 (the first upper conductive line or the second upper conductive line) may be 6 μm or less, and preferably about 1 to 6 μm.

4 is a schematic plan view illustrating a digitizer according to exemplary embodiments. For convenience of description, the detailed structure/configuration of the conductive coil is omitted in FIG. 4 .

The digitizer 100 or the base layer 105 may include an active area AA and a peripheral area PA. The peripheral area PA may include an outer portion of the base layer 105 , and the active area AA may be surrounded by the peripheral area PA.

The active area AA may substantially correspond to a sensing area in which a physical signal transmitted to the input pen is converted into a digital signal. The peripheral area PA may serve as a margin area of the base layer 105 .

In some embodiments, the peripheral area PA may include the circuit connection area CA. For example, the circuit connection area CA may be disposed at the lower end of the base layer 105 in the planar direction.

Pads 90 may be arranged in the circuit connection area CA. For example, distal ends of the traces 60 and 80 may be collected in the peripheral area CA and connected to the pads 90 . In one embodiment, the distal ends of traces 60 , 80 may be provided as pads 90 .

The integrated circuit chip may be electrically connected to the conductive coils 50 and 70 included in the digitizer 100 through the pads 90 . Accordingly, power and signals may be applied from the integrated circuit chip to the conductive coils 50 and 70 through the traces 60 and 80 .

In some embodiments, ends of the conductive coils 50 and 70 may be disposed on the peripheral area PA. For example, both ends of the first conductive coil 50 in the row direction (or the first direction) and both ends of the second conductive coil 70 in the column direction (or the second direction) are in the peripheral area PA may be placed on the

The first conductive coil 50 may extend in the first direction or the row direction. The plurality of first conductive coils 50 may be arranged along the second direction or the column direction.

For example, n first conductive coils 50 - 1 to 50 - n may be sequentially arranged in the second direction (n is a natural number).

The second conductive coil 70 may extend in the second direction or in the column direction. The plurality of second conductive coils 70 may be arranged along the first direction or the row direction.

For example, m second conductive coils 70 - 1 to 70 - m may be sequentially arranged in the first direction (m is a natural number).

A bending area BA may be included in the central portion of the base layer 105 . A bending axis BX extending in the second direction may be positioned in the bending area BA. The digitizer 100 according to example embodiments may be bent or folded around the bending axis BX.

As described above, the thickness of the first upper conductive line 132 or the second upper conductive line 134 crossing the bending axis BX may be relatively small. Accordingly, it is possible to prevent cracking of the upper conductive layer 130 to which bending stress is directly applied and to increase flexibility.

The thickness of the first lower conductive line 112 and the second lower conductive line 114 parallel to the bending axis 80 and having relatively small bending stress is increased to reduce resistance and improve the efficiency of generating a magnetic field through the conductive coil can do it

In example embodiments, the active area AA may include a trace area TA. For example, an area within the active area AA may be allocated as the trace area TA.

The traces 60 and 80 described with reference to FIGS. 2 and 3 may be assembled on the trace area TA of the base layer 105 and extend to the circuit connection area CA.

As described above, as the trace area TA is included in the active area AA, the connection distance between the traces 60 and 80 and the conductive coils 50 and 70 may be shortened. Accordingly, it is possible to further improve the electromagnetic induction strength by increasing the efficiency of current transmission to the conductive coils 50 and 70 .

Also, as the traces 60 and 80 are disposed in the active area AA, the area of the peripheral area PA may be reduced, and a space in which a conductive pattern/wiring may be disposed may be additionally secured.

Although the trace area TA is illustrated as being disposed on one side of the active area AA in FIG. 4 , the position of the trace area TA may be appropriately adjusted in consideration of the circuit design of the conductive coils 50 and 70 . there is.

5 is a schematic partially enlarged plan view showing the structure of traces of a digitizer according to exemplary embodiments.

Referring to FIG. 5 , traces 60 and 80 of the digitizer 100 according to example embodiments may have a variable width. "Variable width" as used in the present application may refer to having a non-uniform width depending on an area, rather than having a constant width as a whole.

For example, at least some of the first traces 60 connected to the first conductive coils 50 may have a variable width.

In some embodiments, the first traces 60 ( 60a , 60b , 60c , 60d , 60e ) in the order connected to the first conductive coil 50 away from the circuit connection area CA shown in FIG. 4 . These may be sequentially arranged adjacent to each other in the first direction.

For example, when the first trace marked "60a" is connected to the first conductive coil 50-1 closest to the circuit connection area CA, the first trace marked "60b" is the first conductive coil ( 50-2) and sequentially connected to the first conductive coils 50 moving away from the circuit connection area CA, the first traces 60c and 60d 60e may be arranged in the first direction. .

A predetermined number of first traces 60 may be disposed adjacent to each other to form a trace group TG. A plurality of trace groups TG may be arranged along the second direction.

For example, among the first traces 60 included in the trace group TG, connected to the first conductive coil 50 closest to the circuit connection area CA (eg, the first contact 135 ) through) the first trace 60a may have the shortest length. Accordingly, an additional space may be created while the other first traces 60b, 60c, 60d, and 60e extend along the second direction, and the other first traces 60b, 60c, 60d through the additional space. , 60e) may increase in area.

In the same manner as described above, the number of the first traces 60 included in the width corresponding to the trace group TG may decrease as it moves away from the circuit connection area CA.

Accordingly, the first traces 60b, 60c, 60d, and 60e include extension portions 65 having an increased width in the first direction, and the extension portions 65 are circuit-connected as shown in FIG. 5 . A width may increase as it moves away from the area CA in the second direction. Accordingly, the first trace 60 may have a stepped shape.

As described above, at least one of the first traces 60 may include an extension 65 .

For example, as the length of the first trace 60 increases, the number of extension parts 65 included in the corresponding first trace 60 may increase. Also, the extensions 65 may have different widths, and may have an increased width as the distance from the circuit connection area CA increases.

Accordingly, the first trace 60 having wide extensions 65 is connected to the first conductive coil 50 relatively far from the circuit connection area CA to suppress or buffer an increase in resistance according to a signal transmission distance. can do. Therefore, resistance and current intensity distribution in the conductive coils included in the digitizer 100 may be substantially uniformed, and uniformity of sensitivity may also be improved.

6 and 7 are schematic partial enlarged plan views illustrating an arrangement of a dummy pattern of a digitizer according to example embodiments.

The digitizer according to example embodiments includes a dummy pattern, and the dummy pattern may be included in the lower conductive layer 110 having a relatively large thickness.

Referring to FIG. 6 , the dummy pattern may include a first dummy pattern 150 disposed between adjacent trace groups TG.

The first dummy pattern 150 may be physically spaced apart from the traces 60 and 80 , may extend in the second direction, and may fill a space between the adjacent trace groups TG.

The first dummy pattern 150 may have a line shape extending in the second direction as shown in FIG. 6 . In an embodiment, the first dummy pattern 150 may have a bar pattern shape cut to a predetermined length. In this case, the plurality of first dummy patterns 150 may be arranged in the second direction between the adjacent trace groups TG.

Referring to FIG. 7 , the dummy pattern may include a second dummy pattern 155 disposed in a space between the first lower conductive lines 112 and the first upper conductive lines 132 in a planar direction. .

As described with reference to FIG. 4 , the conductive coils 50 and 70 may be arranged to cross each other in a planar direction. Accordingly, the first upper conductive lines 132 included in the first conductive coil 50 and the first lower conductive lines 112 included in the second conductive coil 70 cross each other in a planar direction. A region C may be formed. Also, a lattice space LA may be defined between the conductive coils 50 and 70 crossing each other.

For example, the first lower conductive lines 112 and the first upper conductive lines 132 may be disposed on regions extending in the first direction and the second direction along the intersections C. there is.

For example, a first lower conductive line group 113 is defined by a predetermined number of first lower conductive lines 112 , and a first upper conductive line group 113 is defined by a predetermined number of first upper conductive lines 132 . A conductive line group 133 may be defined.

The second dummy pattern 155 is formed in a lattice space LA between a pair of adjacent first lower conductive line groups 113 and a pair of adjacent first upper conductive line groups 133 in the planar direction. can be placed. The second dummy pattern 155 may be arranged in a grid shape, for example, may have an island pattern shape physically and electrically spaced apart from the first lower conductive lines 112 in the grid space LA. there is.

In an embodiment, a plurality of second dummy patterns 155 may be disposed in one grid space LA.

As described above, the step difference of the digitizer can be reduced by including the dummy pattern in the lower conductive layer 110 having the dummy pattern having a relatively large thickness. For example, it may be inserted into the space between the first lower conductive lines 112 and the traces 60 and 80 to uniformize the thickness distribution of the lower conductive layer 110 as a whole.

Accordingly, it is possible to sufficiently increase the thickness of the lower conductive layer 110 to reduce the resistance of the digitizer 100 and to promote electromagnetic induction, while preventing mechanical and optical defects due to thickness deviation.

8 is a schematic cross-sectional view illustrating an image display apparatus according to example embodiments.

Referring to FIG. 8 , the image display apparatus may include the display panel 360 , the touch sensor 200 , and the digitizer 100 according to the above-described exemplary embodiments.

The digitizer 100 may be disposed under the display panel 360 . For example, the digitizer 100 may be disposed between the display panel 360 and the rear cover 380 .

The digitizer 100 includes relatively thick conductive lines for efficiency in generating a magnetic field using electromagnetic induction, and may include a plurality of conductive coils. Accordingly, the digitizer 100 may be disposed under the display panel 360 so as not to be recognized by a user of the image display apparatus.

As described above, by utilizing the structure of the digitizer 100 according to the exemplary embodiments to sufficiently increase the magnetic field strength, for example, energy transfer to the input pen in contact with the window substrate 230 of the image display device is efficiently transmitted. can be promoted to

The display panel 360 may include a pixel electrode 310 , a pixel defining layer 320 , a display layer 330 , a counter electrode 340 , and an encapsulation layer 350 disposed on the panel substrate 300 . can

A pixel circuit including a thin film transistor (TFT) may be formed on the panel substrate 300 , and an insulating layer covering the pixel circuit may be formed. The pixel electrode 310 may be electrically connected to, for example, a drain electrode of a TFT on the insulating layer.

The pixel defining layer 320 may be formed on the insulating layer to expose the pixel electrode 310 to define a pixel area. A display layer 330 is formed on the pixel electrode 310 , and the display layer 330 may include, for example, a liquid crystal layer or an organic light emitting layer.

A counter electrode 340 may be disposed on the pixel defining layer 320 and the display layer 330 . The opposing electrode 340 may be provided as a common electrode or a cathode of the image display device, for example. An encapsulation layer 350 for protecting the display panel 360 may be stacked on the opposite electrode 340 .

The touch sensor 200 may be stacked on the display panel 360 and disposed toward the window substrate 230 . The touch sensor 200 may generate capacitance by a user's touch input through the surface of the window substrate 230 . Accordingly, the touch sensor 200 may include a sensing electrode or sensing channels having a thickness smaller than that of the conductive layer included in the digitizer 100 so as not to be recognized by the user. For example, the thickness of the sensing electrode or the sensing channel may be less than 1 μm or less than 0.5 μm.

Each of the sensing electrodes or the sensing channels may be independently disposed in one single layer to interact with an adjacent sensing electrode or sensing channel to generate capacitance.

The touch sensor 200 may be coupled to the display panel 360 through the adhesive layer 260 .

The window substrate 230 includes, for example, a hard coating film and thin glass, and in an embodiment, a light blocking pattern 235 may be formed on a peripheral portion of one surface of the window substrate 230 . The light blocking pattern 235 may include, for example, a color printing pattern. A bezel portion or a non-display area of the image display device may be defined by the light blocking pattern 235 .

A polarization layer 210 may be disposed between the window substrate 230 and the touch sensor 200 . The polarizing layer 210 may include a coated polarizer or a polarizing plate.

The polarization layer 210 may be directly bonded to the one surface of the window substrate 230 or may be attached through the first adhesive layer 220 . The touch sensor 200 may be coupled to the polarization layer 210 through the second adhesive layer 225 .

As shown in FIG. 8 , the window substrate 230 , the polarization layer 210 , and the touch sensor 200 may be sequentially disposed from the user's viewing side. In this case, since the sensing electrodes of the touch sensor 200 are disposed under the polarization layer 210 , it is possible to more effectively prevent the sensing electrode from being viewed.

In an embodiment, the touch sensor 200 may be directly transferred onto the window substrate 230 or the polarization layer 210 . In an embodiment, the window substrate 230 , the touch sensor 200 , and the polarization layer 210 may be disposed in the order from the user's viewing side.

50: first conductive coil 60: first trace
70: second conductive coil 80: second trace
100: digitizer 105: base layer
110: lower conductive layer 112: first lower conductive line
114: second lower conductive line 120: interlayer insulating layer
130: upper conductive layer 132: first upper conductive line
134: second upper conductive line 135: first contact
137: second contact 140: passivation layer
150: first dummy pattern 155: second dummy pattern

Claims (18)

a base layer including an active region, a peripheral region surrounding the active region, and a circuit connection region;
a conductive coil disposed on the active region of the base layer and including a first conductive coil extending in a row direction and a second conductive coil extending in a column direction; and
Traces disposed on the active region of the substrate layer, extending to the circuit connection region allocated to one end of the substrate layer, and respectively connected to the first conductive coil and the second conductive coil,
at least one of the traces has a variable width that increases in width away from the circuit connection area. The digitizer of claim 1 , wherein the at least one trace includes an extension that increases in width in the row direction. The digitizer of claim 2 , wherein the at least one trace has a stepped shape in a planar direction. The digitizer of claim 2 , wherein the at least one trace includes a plurality of extensions, and the width of the extensions increases as the distance from the circuit connection area increases. The method according to claim 2, wherein a trace group is defined by the traces disposed adjacent to each other in the row direction among the traces,
The traces included in the trace group are arranged to sequentially increase in length along the row direction. The digitizer of claim 5 , wherein the number of extensions increases as the length of the traces included in the trace group increases. The method according to claim 1, wherein the first conductive coil includes first upper conductive lines extending in the row direction, second lower conductive lines extending in the column direction, and the second lower conductive lines and the first upper part first contacts electrically connecting the conductive lines;
The second conductive coil electrically connects first lower conductive lines extending in the column direction, second upper conductive lines extending in the row direction, and the first lower conductive lines and the second upper conductive lines A digitizer comprising second contacts for coupling. The method according to claim 7, further comprising an interlayer insulating layer formed on the base layer,
The first lower conductive lines and the second lower conductive lines are disposed on the upper surface of the base layer together with the traces;
The interlayer insulating layer is formed on the upper surface of the base layer to cover the first lower conductive lines, the second lower conductive lines, and the traces;
and the first upper conductive lines and the second upper conductive lines are disposed on a top surface of the interlayer insulating layer. The method according to claim 8, wherein a trace group is defined by the traces arranged adjacently in the row direction among the traces,
and a plurality of the trace groups are arranged to be spaced apart along the row direction. The digitizer of claim 9 , further comprising a first dummy pattern disposed between the trace groups on the upper surface of the base layer and separated from the traces. The method according to claim 8, wherein a plurality of the first conductive coils are arranged along the column direction, and a plurality of the second conductive coils are arranged along the row direction,
A digitizer, wherein lattice spaces are defined by the first conductive coils and the second conductive coils intersecting each other in a planar direction. The digitizer of claim 11 , further comprising second dummy patterns disposed in the lattice spaces on the upper surface of the base layer. The digitizer of claim 8 , wherein a thickness of the first lower conductive lines is greater than a thickness of the first upper conductive lines. The digitizer of claim 13 , wherein the base layer includes a bending region in a central portion. The digitizer of claim 14 , wherein a bending axis of the bending region intersects the first upper conductive lines and is parallel to the first lower conductive lines. display panel; and
An image display device comprising the digitizer according to claim 1 disposed below the display panel. The image display device of claim 16 , further comprising a touch sensor disposed on the display panel. The method according to claim 17, further comprising a rear cover and a window substrate,
The touch sensor is disposed between the window substrate and the display panel, and the digitizer is disposed between the display panel and the rear cover.

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