KR101980777B1 - Organic light emitting diode display device and driving method the same - Google Patents

Abstract

The present invention relates to an OLED display and a driving method thereof, wherein each of the plurality of pixels includes a light emitting element and a pixel driving circuit for driving the light emitting element; The pixel driving circuit includes a driving switching element connected in series between the high potential supply line and the low potential supply line together with the light emitting element; A first switching element for connecting a data line and a first node connected to a gate of the drive switching element in response to a scan signal; A second switching element for connecting the first node and a second node connected to the anode of the light emitting element in response to an initialization signal; A third switching element for connecting the high potential voltage supply line and a third node connected to the source of the drive switching element in response to the light emission signal; A first capacitor connected between the high potential voltage supply line and the third node; And a second capacitor connected between the first and third nodes.

Description

[0001] The present invention relates to an organic light emitting diode (OLED) display device,

The present invention relates to an OLED display and a driving method thereof.

Each of the plurality of pixels constituting the organic light emitting diode (OLED) display device includes an OLED composed of an organic light emitting layer between the anode and the cathode, and a pixel circuit independently driving the OLED. The pixel circuit includes a switching thin film transistor (hereinafter referred to as TFT), a driving TFT, and a capacitor. The switching TFT charges a data voltage in a capacitor in response to a scan pulse, and the driving TFT controls the amount of current supplied to the OLED in accordance with the data voltage charged in the capacitor to control the amount of light emitted from the OLED.

However, in the OLED display device, a deviation occurs due to the voltage drop of the high-potential voltage (VDD), and a difference in characteristics of the threshold voltage (Vth) and mobility of the driving TFT occurs between the pixels due to the process deviation . Therefore, the amount of current driving the OLED between the pixels differs between the pixels of the OLED display device, and a luminance deviation occurs. In general, the difference in characteristics between the initial driving TFTs generates spots and patterns on the screen, and a characteristic difference due to the deterioration of the driving TFTs generated by driving the OLEDs causes a problem that the life of the OLED display panel is reduced or after- have.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems and it is an object of the present invention to provide an OLED display device capable of compensating for a characteristic deviation of a driving TFT and compensating a voltage drop of a high potential voltage And a driving method thereof.

In order to achieve the above object, an OLED display according to an embodiment of the present invention includes a plurality of pixels each including a light emitting element and a pixel driving circuit for driving the light emitting element; The pixel driving circuit includes a driving switching element connected in series between the high potential supply line and the low potential supply line together with the light emitting element; A first switching element for connecting a data line and a first node connected to a gate of the drive switching element in response to a scan signal; A second switching element for connecting the first node and a second node connected to the anode of the light emitting element in response to an initialization signal; A third switching element for connecting the high potential voltage supply line and a third node connected to the source of the drive switching element in response to the light emission signal; A first capacitor connected between the high potential voltage supply line and the third node; And a second capacitor connected between the first and third nodes; Wherein the pixel driving circuit turns on the first and second switching elements to supply the reference voltage provided from the data line to the first and second nodes and turns off the third switching element, An initialization and sampling period for storing a threshold voltage of the drive switching device at three nodes; A writing period in which the data voltage is charged to the data line and the first switching element is turned on to supply the data voltage supplied from the data line to the first node; And a light emitting period in which the driving switching element supplies a driving current to the light emitting element by turning on the third switching element.

In the initialization and sampling period, when the voltage of the third node N3 is discharged through the drive switching element and becomes " Vref + Vth ", the drive TFT DT is turned off, . Here, Vref is the reference voltage and Vth is the threshold voltage of the driving switching element.

And in the writing period, the second capacitor couples the voltage of the third node in proportion to the voltage of the first node changing from the reference voltage to the data voltage.

And in the light emission period, the second capacitor couples the voltage of the first node to the third node as the high potential voltage is supplied to the third node through the third switching element.

A first switch for applying the data voltage provided from the analog-to-digital converter to the output channel in response to the first switching signal, at an output terminal of the data driver driving the data line; And a second switch for applying the reference voltage to the output channel in response to a second switching signal, wherein the first and second switching signals are alternately output.

A first switch for applying the data voltage supplied from the output channel of the data driver to the data line in response to a first switching signal, in a non-display area of the display panel having the plurality of pixels; And a second switch for applying the reference voltage to the data line in response to the second switching signal, wherein the first and second switching signals are alternately output to each other.

According to another aspect of the present invention, there is provided a method of driving an OLED display including a plurality of pixels each including a light emitting element and a pixel driving circuit for driving the light emitting element; The pixel driving circuit includes a driving switching element connected in series between the high potential supply line and the low potential supply line together with the light emitting element; A first switching element for connecting a data line and a first node connected to a gate of the drive switching element in response to a scan signal; A second switching element for connecting the first node and a second node connected to the anode of the light emitting element in response to an initialization signal; A third switching element for connecting the high potential voltage supply line and a third node connected to the source of the drive switching element in response to the light emission signal; A first capacitor connected between the high potential voltage supply line and the third node; And a second capacitor connected between the first node and the third node, the method comprising: turning on the first and second switching elements to turn on the reference voltage provided from the data line, And an initialization and sampling step of supplying the third node with the threshold voltage of the driving switching element by turning off the third switching element and supplying the third node with the threshold voltage of the driving switching element; A writing step of charging a data voltage to the data line and simultaneously turning on the first switching element to supply the data voltage supplied from the data line to the first node; And a light emitting step of turning on the third switching element to supply the driving current to the light emitting element by the driving switching element.

In the present invention, each pixel includes an OLED, four TFTs, and two capacitors to compensate for the characteristic deviation of the driving TFT and the voltage drop of the high potential voltage. By writing the reference voltage to each pixel through the data line, the aperture ratio is improved by deleting the reference voltage supply line.

1 is a configuration diagram of an OLED display device according to an embodiment of the present invention.
Fig. 2 is a driving waveform diagram of the pixel P shown in Fig.
3 is a circuit diagram of the pixel P shown in Fig.
4A to 4C are diagrams showing steps of driving the pixel P of the present invention.
5 is a circuit diagram illustrating a method of supplying the reference voltage Vref and the data voltage Vdata through the data line DL.

Hereinafter, an OLED display device and a driving method thereof according to embodiments of the present invention will be described in detail with reference to the accompanying drawings.

In the present invention, the TFT may be configured as a P type or an N type. In the following embodiments, a TFT is of a P type for ease of explanation. Thus, the gate high voltage VGH is a gate-off voltage for turning off the TFT, and the gate-low voltage VGL is a gate-on voltage for turning on the TFT. In describing a pulse-shaped signal, the gate high voltage (VGH) state is defined as "high state", and the gate low voltage (VGL) state is defined as "low state".

1 is a configuration diagram of an OLED display device according to an embodiment of the present invention.

The OLED display device shown in FIG. 1 includes a display panel 2 in which a plurality of gate lines GL and a plurality of data lines DL intersect to define pixels P, a plurality of gate lines GL, A data driver 6 for driving a plurality of data lines DL and an image data RGB inputted from the outside are arranged and supplied to the data driver 6, And a timing controller 8 for controlling the gate driver 4 and the data driver 6 by outputting a data control signal GCS and a data control signal DCS.

Each pixel P of the present invention includes a pixel driving circuit for independently driving an OLED including an OLED and a driving TFT DT for supplying a driving current to the OLED. The pixel drive circuit is configured to compensate for the characteristic deviation of the drive TFT (DT) and to compensate the voltage drop of the high potential voltage (VDD), thereby reducing the luminance deviation between each pixel (P). The pixel P of the present invention will be described later in detail with reference to Figs. 2 to 5. Fig.

The display panel 2 includes a plurality of gate lines GL and a plurality of data lines DL intersecting with each other and a plurality of pixels P are provided at intersections of the display lines GL and DL. Each pixel P has an OLED and a pixel driving circuit and is connected to a gate line GL, a data line DL, a high-potential voltage VDD supply line, and a low-potential voltage VSS supply line .

The gate driver 4 supplies a plurality of gate signals to the plurality of gate lines GL in accordance with a plurality of gate control signals GCS provided from the timing controller 8. [ The plurality of gate signals includes a scan signal SCAN, an initialization signal Init and an emission signal EM, and these signals are supplied to each pixel P through a plurality of gate lines GL. The high-potential voltage VDD has a voltage relatively higher than the low-potential voltage VSS. The low potential voltage VSS may be a ground voltage.

The data driver 6 outputs the digital image data RGB input from the timing controller 8 to the data voltage Vdata using the reference gamma voltage in accordance with the plurality of data control signals DCS provided from the timing controller 8 Conversion. And supplies the converted data voltage Vdata to the plurality of data lines DL. On the other hand, the data driver 6 outputs the data voltage Vdata only for the writing period t3 (see FIG. 2) of each pixel P, and outputs the reference voltage Vref for the remaining periods.

5, a data voltage Vdata provided from the analog-to-digital converter ADC is applied to the output channel Ch in response to the first switching signal SS1 at the output terminal of the data driver 6 And a second switch SW2 for applying the reference voltage Vref to the output channel Ch in response to the second switching signal SS2. In this case, as the first and second switching signals SS1 and SS2 are alternately outputted, the data driver 6 alternately outputs the data voltage Vdata and the reference voltage Vref. On the other hand, the first and second switches SW1 and SW2 may be incorporated in the data driver 6, but may be provided in a non-display area outside the display panel 2. [ In this case, the first and second switches SW1 and SW2 switch between the output channel Ch of the data driver 6 and the data line DL.

The timing controller 8 arranges image data (RGB) input from the outside in accordance with the size and resolution of the display panel 2 and supplies the image data to the data driver 6. The timing controller 8 generates a plurality of timing signals by using synchronizing signals SYNC input from the outside, for example, a dot clock DCLK, a data enable signal DE, a horizontal synchronizing signal Hsync, and a vertical synchronizing signal Vsync And the gate and data control signals GCS and DCS. And controls the gate driver 4 and the data driver 6 by supplying the generated gate and data control signals GCS and DCS to the gate driver 4 and the data driver 6, respectively.

Hereinafter, the pixel P of the present invention will be described in detail.

Fig. 2 is a driving waveform diagram of the pixel P shown in Fig. 3 is a circuit diagram of the pixel P shown in Fig.

2, the pixel P according to the present invention includes an initialization and sampling period t1, a writing period t2, and a light emission period (t2) in accordance with pulse timings of a plurality of gate signals supplied to the pixel P t3).

During the initialization and sampling period t1, the scan signal SCAN and the initialization signal Init are outputted in the low state and the light emission signal EM is outputted in the high state. During the writing period t2, the scan signal SCAN is outputted in a low state and the initialization signal Init and the light emission signal EM are outputted in a high state. In the light emission period t3, the light emission signal EM is outputted in the low state, and the scan signal SCAN and the initialization signal Init are outputted in the high state.

Referring to FIG. 3, the pixel P includes an OLED, four TFTs, and two capacitors to drive the OLED. Specifically, the pixel driving circuit includes a driving TFT DT, first to third TFTs T1 to T3, and first and second capacitors C1 and C2.

The driving TFT DT is connected in series between the high potential voltage supply line and the low potential voltage supply line VSS together with the OLED and supplies the driving current to the OLED in the light emission period t4.

The first TFT T1 is turned on in response to the scan signal SCAN and connects the data line DL and the first node N1 to each other. Here, the first node N1 is connected to the gate of the driving TFT DT. The first TFT T1 is turned on in the initialization and sampling period t1 to supply the reference voltage Vref provided from the data line DL to the first node N1. The first TFT T1 is turned on in the writing period t2 to supply the data voltage Vdata provided from the data line DL to the first node N1.

The second TFT T2 is turned on in response to the initialization signal Init and connects the first node N1 and the second node N2 to each other at turn-on. Here, the second node N2 is connected to the anode of the OLED. The second TFT T2 is turned on in the initialization and sampling period t1 to supply the reference voltage Vref supplied to the first node N1 to the second node N2.

The third TFT T3 is turned on in response to the emission signal EM and connects the third node N3 with the high potential voltage supply line VDD at the turn-on time. Here, the third node N3 is connected to the source of the driving TFT DT. The third TFT T3 is turned on in the light emission period t3 to supply the high potential voltage VDD to the third node N3.

The first capacitor C1 is connected between the high potential voltage supply line VDD and the third node N3. This first capacitor C1 stabilizes the voltage of the third node N3.

The second capacitor C2 is connected between the first node N1 and the third node N3. The voltage of the third node N3 is coupled when the voltage of the first node N1 is changed from the reference voltage Vref to the data voltage Vdata in the second capacitor C2 writing period t2. The second capacitor C2 couples the voltage of the first node N1 as the high potential voltage VDD is supplied to the third node N3 in the light emission period t3.

4A to 4C are diagrams showing steps of driving the pixel P of the present invention. Hereinafter, a driving method of the pixel P of the present invention will be described with reference to FIGS. 4A to 4C and FIG.

Referring to FIG. 4A, in the initialization and sampling period t1, the first and second TFTs T1 and T2 are turned on and the third TFT T3 is turned off. A reference voltage Vref is applied to the data line DL. Then, the reference voltage Vref applied to the data line DL is supplied to the first node N1 through the first TFT T1, and the reference voltage Vref supplied to the first node N1 is supplied to the data line DL 2 TFT (T2) to the second node (N2). Thus, the first and second nodes N1 and N2 are initialized to the reference voltage Vref. At this time, since the reference voltage Vref is set to be lower than the threshold voltage of the OLED, the OLED does not emit light.

On the other hand, in the initialization and sampling period t1, as the third TFT T3 is turned off, the third node N3 floats, and the voltage of the third node N3 floated becomes the driving TFT DT ≪ / RTI > When the voltage of the third node N3 becomes " Vref + Vth ", the driving TFT DT is turned off, so that the voltage of the third node N3 is no longer discharged at " Vref + Vth ". At this time, the voltage of the third node N3 is stored in the first and second capacitors C1 and C2.

Referring to FIG. 4B, in the writing period t2, the first TFT T1 is turned on and the second and third TFTs T2 and T3 are turned off. A data voltage Vdata is applied to the data line DL. Then, the first TFT (T1) supplies the data voltage (Vdata) provided from the data line (DL) to the first node (N1). As the voltage of the first node N1 changes from the reference voltage Vref to the data voltage Vdata, the second capacitor C2 changes the voltage of the third node N3 to the voltage of the first node N1 Coupled in proportion to the change. Accordingly, the voltage of the third node N3 becomes "Vref + Vth- (Vref-Vdata) (C2 / (C1 + C2))".

Referring to FIG. 4C, in the light emission period t3, the third TFT T3 is turned on and the first and second TFTs T1 and T2 are turned off. Then, the third TFT T3 supplies the high potential voltage VDD to the third node N3. As the voltage of the third node N3 changes from "Vref + Vth- (Vref-Vdata) (C2 / (C1 + C2))" to the high-potential voltage VDD, The voltage of one node N1 is coupled in proportion to the voltage change of the third node N3. Accordingly, the voltage of the first node N1 becomes "Vdata + {VDD-Vref + Vth- (Vref-Vdata) (C2 / (C1 + C2))}".

On the other hand, in the light emission period t3, the driving TFT DT supplies the driving current to the OLED according to the voltage of the first node N1. At this time, the formula of the driving current supplied from the driving TFT DT to the OLED becomes "(1/2) × K (2Vdata-2Vref) ² ". Here, K is a constant value determined by the mobility of the driving TFT DT and the parasitic capacitance. It can be seen from the above equation that the influence of the threshold voltage Vth and the high-potential voltage VDD of the driving TFT DT is excluded in the driving current of the OLED. Therefore, the pixel P of the present invention can compensate for the characteristic deviation of the driving TFT and the voltage drop of the high potential voltage (VDD), thereby reducing the luminance deviation between each pixel P.

As described above, in the present invention, each pixel P includes an OLED, four TFTs, and two capacitors to compensate for the characteristic deviation of the driving TFT and the voltage drop of the high potential voltage (VDD). By writing the reference voltage Vref to each pixel P through the data line DL, the aperture ratio is improved by deleting the reference voltage supply line.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. Will be clear to those who have knowledge of.

Init: initialization signal SCAN: scan signal
EM: emission signal Vref: reference voltage

Claims (7)

Each of the plurality of pixels includes a light emitting element and a pixel driving circuit for driving the light emitting element;
The pixel driving circuit
A drive switching element connected in series between the high potential supply line and the low potential supply line together with the light emitting element;
A first switching element for connecting a data line and a first node connected to a gate of the drive switching element in response to a scan signal;
A second switching element for connecting the first node and a second node connected to the anode of the light emitting element in response to an initialization signal;
A third switching element for connecting the high potential voltage supply line and a third node connected to the source of the drive switching element in response to the light emission signal;
A first capacitor connected between the high potential voltage supply line and the third node;
And a second capacitor connected between the first and third nodes;
The pixel driving circuit
The first and second switching elements are turned on to supply the reference voltage provided from the data line to the first and second nodes, and the third switching element is turned off, An initialization and sampling period in which a threshold voltage of the switching device is stored;
A writing period in which the data voltage is charged to the data line and the first switching element is turned on to supply the data voltage supplied from the data line to the first node;
Wherein the third switching element is turned on and the driving switching element supplies a driving current to the light emitting element. The method according to claim 1,
In the initialization and sampling period, when the voltage of the third node N3 is discharged through the drive switching element and becomes " Vref + Vth ", the drive TFT DT is turned off, Characterized by an OLED display.
Here, Vref is the reference voltage and Vth is the threshold voltage of the driving switching element. The method according to claim 1,
Wherein in the writing period, the second capacitor couples the voltage of the third node in proportion to the voltage of the first node changing from the reference voltage to the data voltage. The method according to claim 1,
And in the light emission period, the second capacitor couples the voltage of the first node as the high potential voltage is supplied to the third node through the third switching element. The method according to claim 1,
An output terminal of the data driver for driving the data line
A first switch for applying the data voltage provided from the analog digital converter to the output channel in response to the first switching signal;
And a second switch for applying the reference voltage to the output channel in response to the second switching signal,
Wherein the first and second switching signals are alternately outputted to each other. The method according to claim 1,
In the non-display area of the display panel provided with the plurality of pixels
A first switch for applying the data voltage provided from the output channel of the data driver to the data line in response to the first switching signal;
And a second switch for applying the reference voltage to the data line in response to the second switching signal,
Wherein the first and second switching signals are alternately outputted to each other. Each of the plurality of pixels includes a light emitting element and a pixel driving circuit for driving the light emitting element; The pixel driving circuit includes a driving switching element connected in series between the high potential supply line and the low potential supply line together with the light emitting element; A first switching element for connecting a data line and a first node connected to a gate of the drive switching element in response to a scan signal; A second switching element for connecting the first node and a second node connected to the anode of the light emitting element in response to an initialization signal; A third switching element for connecting the high potential voltage supply line and a third node connected to the source of the drive switching element in response to the light emission signal; A first capacitor connected between the high potential voltage supply line and the third node; And a second capacitor connected between the first and third nodes, the method comprising:
The first and second switching elements are turned on to supply the reference voltage provided from the data line to the first and second nodes, and the third switching element is turned off, An initialization and sampling step for causing a threshold voltage of the switching device to be stored;
A writing step of charging a data voltage to the data line and simultaneously turning on the first switching element to supply the data voltage supplied from the data line to the first node;
And turning on the third switching element so that the driving switching element supplies a driving current to the light emitting element.

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