KR101962176B1 - Single inductor multi output dc/dc converter - Google Patents

Abstract

The single inductor multi-output DC-DC converter according to the first aspect of the present invention includes: a single inductor multi-output DC-DC converter; A deviation voltage output unit for outputting a plurality of deviation voltages by comparing respective voltages of the multiple outputs of the conversion unit with a predetermined reference voltage; And when the deviation summed voltage is higher than the upper limit reference voltage, raising the upper limit reference current, and lowering the lower limit reference current when the deviation summed voltage is lower than the lower limit reference voltage And a switching control unit.
Accordingly, it is possible to simultaneously change the upper limit value and the lower limit value of the current flowing through the inductor in accordance with the change in the magnitude of the load current, so that the output ripple can be reduced and the current flowing in the inductor can be adjusted The number of output nodes can adaptively respond to the increase / decrease.

Description

[0001] SINGLE INDUCTOR MULTI OUTPUT DC / DC CONVERTER [0002]

The present invention relates to a single inductor multi-output DC / DC converter that transfers electric energy stored in a single inductor used in a power management system of an electronic device to a plurality of output nodes.

Modern electronics require long battery times and a variety of functions at the same time. Because of this demand, a single input multiple output (SIMO) DC / DC converter is preferred in electronic power management systems.

The SIMO DC / DC converter has only one inductor that receives current, unlike the conventional converter, which has as many inductors as the number of outputs to generate multiple outputs, thereby reducing the circuit area as much as possible.

For example, FIG. 1 is a circuit diagram of a SIMO DC / DC converter disclosed in Japanese Patent No. 1284976, which includes an output selector 110, a hysteresis comparator 120, a controller 130, a driver 140, and output nodes 150 .

The output selection unit 110, the hysteresis comparator 120, the control unit 130 and the driving unit 140 monitor the voltage level of the n-th first output node receiving the current voltage / current among the output nodes 150 do.

The output selection unit 110 is a 1: N multiplexer, for example, for delivering the current output voltage Vout_n of the first output node to the comparator 120, And transmits the reference voltage of the first output node to the comparator 120.

The comparator 120 determines whether the output voltage Vout_n of the first output node is higher than the reference voltage Vref_n of the first output node by a first threshold Vdh or higher. When Vout_n> Vref_n + Vdh, the driving unit 140 stops supplying current to the first output node under the control of the control unit 130. [ The comparator 120 also determines whether the Vout_n is lower than the second threshold Vdl by more than Vref_n.

According to the determination result, the controller 130 increases / decreases tos_n which is the maximum time at which the current supply is continuously performed to the first output node.

Registered Patent No. 1284976 Single Inductor Multiple-Output DC-DC Converter and Its Control Method Open Patent 2011-0104992 Issue Control of Multi-Level Feed Stage

"An Error-Based Controlled Single-Inductor 10-Output DC-DC Buck Converter with High Efficiency at Light Load Using Adaptive Pulse Modulation," IEEE International Solid-State Circuits Conference, May 2015. Min-yong Jung et al.

According to Japanese Patent No. 1284976, however, only the upper limit reference current changes while the lower limit reference current of the current flowing in the inductor changes, so that it is difficult to adaptively cope with a change in the magnitude of the load current. For example, when the sum of the load currents is smaller than the lower limit reference current because the load of the output stage is light because the lower limit reference current of the current flowing in the inductor is fixed, it can not be supplied to a light load. If the load is heavy, only the upper limit reference current is moved. Therefore, the interval between the lower limit reference current and the upper limit reference current is widened, so that the charging time and the discharging time become longer, so the response speed becomes slower and the output ripple becomes larger.

In addition, when the inductor current increases due to the inductor current being larger than the load current, it is necessary to lower the reference value current of the inductor. In addition, when the inductor current falls due to the inductor current being smaller than the load current, it is necessary to raise the reference value current of the inductor.

In addition, since it supplies the inductor current corresponding to the number of fixed output nodes, it is difficult to adaptively cope with increase or decrease in the number of output nodes.

SUMMARY OF THE INVENTION The present invention is intended to solve the problems of the prior art as described above.

The single inductor multi-output DC-DC converter according to the first aspect of the present invention includes: a single inductor multi-output DC-DC converter; A deviation voltage output unit for outputting a plurality of deviation voltages by comparing respective voltages of the multiple outputs of the conversion unit with a predetermined reference voltage; And when the deviation summed voltage is higher than the upper limit reference voltage, raises the upper limit reference current, and when the deviation summed voltage is lower than the lower limit reference voltage, the lower limit reference current is lowered And a switching control unit.

In addition, the switching control section generates a switching signal to discharge electric energy of the inductor to a load having a maximum deviation voltage among the plurality of deviation voltages.

The switching control unit may include: a maximum deviation voltage selection unit for selecting an output stage having a maximum deviation voltage among the plurality of deviation voltages; A first latch for temporarily storing and outputting the output stage information having the maximum deviation voltage; An adder for adding the plurality of deviation voltages to output a deviation summed voltage; A reference current regulator which raises the upper limit reference current when the deviation summed voltage is higher than the upper limit reference voltage and lower the lower limit reference current when the deviation summed voltage is lower than the lower limit reference voltage; A second latch for temporarily storing the upper limit current or the lower limit reference current; A reference current storage unit for storing the upper limit reference current and the lower limit reference current output from the second latch; And a switching unit for comparing the inductor current IL flowing through the inductor with the upper reference current or the lower reference current based on the output of the first latch and generating a switching signal for charging and discharging the inductor.

The maximum deviation voltage selection unit may include a deviation voltage comparison unit comparing two different deviation voltages with respect to all of the plurality of deviation voltages output from the deviation voltage output unit and outputting a deviation comparison value; And a maximum deviation voltage determination unit for determining an output stage having a maximum deviation voltage by logically multiplying the deviation comparison value.

Further, the adder adds a plurality of deviation voltages input in parallel to the non-inverting terminal of the operational amplifier to output a deviation summed voltage.

The reference current controller may further include an upper limit value comparator for comparing the deviation summed voltage and the upper limit reference voltage, and a lower limit comparator for comparing the deviation summed voltage and the lower limit reference voltage. A range determining unit that receives the output of the upper limit value comparator and the output of the lower limit value comparator and determines in which voltage range the deviation summed voltage is in; And a reference current calibrator for adjusting the level of the reference current according to the output of the range determination unit.

The switching control section generates a switching signal for discharging the electric energy of the inductor to a plurality of loads having a maximum deviation voltage among the plurality of deviation voltages during one discharge interval for discharging the inductor.

Also, the single inductor multi-output DC-DC converter according to the second invention of the present application may include: a single inductor multi-output DC-DC converter; A deviation voltage output unit for outputting a plurality of deviation voltages by comparing respective voltages of the multiple outputs of the conversion unit with a predetermined reference voltage; And generating a deviation summed voltage by summing the plurality of deviation voltages, and if the deviation summed voltage is higher than the first upper limit reference voltage or the predetermined deviation voltage among the plurality of deviation voltages is higher than the second upper limit reference voltage, And lowering the lower limit reference current when the deviation summed voltage is lower than the first lower limit reference voltage or when the predetermined deviation voltage is lower than the second lower limit reference voltage.

The reference current controller may further include a first upper limit comparator for comparing the deviation summed voltage and the first upper limit reference voltage, and a lower sum comparator for comparing the deviation summed voltage and the first lower limit reference voltage, A comparator; A second upper limit comparator for comparing the predetermined deviation voltage with the second upper limit reference voltage and a lower limit comparator comparing the predetermined difference voltage with the second lower limit reference voltage; A range determining unit that receives the outputs of the first and second upper limit value comparators and the outputs of the first and second lower limit value comparators to determine which voltage range the deviation sum voltage or the predetermined deviation voltage is in; And a reference current calibrator for adjusting the level of the reference current according to the output of the range determination unit.

Further, the single inductor multi-output DC-DC converter according to the third invention of the present application comprises: a single inductor multi-output DC-DC converter; A deviation voltage output unit for outputting a plurality of deviation voltages by comparing respective voltages of the multiple outputs of the conversion unit with a predetermined reference voltage; And a switching controller for increasing the upper limit reference current when the predetermined deviation voltage among the plurality of deviation voltages is higher than the upper reference voltage and lowering the lower reference current when the predetermined deviation voltage is lower than the lower reference voltage.

Also, the single inductor multi-output DC-DC converter according to the fourth invention of the present application may include: a single inductor multi-output DC-DC converter; A deviation voltage output unit for outputting a plurality of deviation voltages by comparing respective voltages of the multiple outputs of the conversion unit with a predetermined reference voltage; And generating a deviation summed voltage by summing the plurality of deviation voltages, and increasing the PWM duty ratio when the deviation summed voltage is higher than the upper limit reference voltage, and decreasing the PWM duty ratio when the summed deviation summed voltage is lower than the reference voltage And a PWM control unit.

The PWM control unit may further include: a maximum deviation voltage selection unit for selecting an output terminal of a maximum deviation voltage among the plurality of deviation voltages; A first latch for temporarily storing and outputting output terminal information of the maximum deviation voltage; An adder for adding the plurality of deviation voltages to output a deviation summed voltage; A PWM duty ratio controller for increasing the PWM duty ratio if the deviation summed voltage is higher than the upper limit reference voltage and decreasing the PWM duty ratio if the deviation summed voltage is lower than the lower limit reference voltage; A second latch for temporarily storing and outputting the PWM duty; A PWM duty ratio storage unit for storing a PWM duty ratio output from the second latch; A digital PWM generator for generating a PWM signal having a digital value according to the PWM duty ratio; And a switching signal generator for applying the switching signal to the switch connected to the output terminal of the maximum deviation voltage output from the first latch using the digital value PWM signal.

The PWM duty ratio controller may further include: a deviation summing voltage comparator that compares the deviation summed voltage with the upper and lower reference voltages; A range determining unit that determines the range of the deviation summed voltage using the output of the deviation summed voltage comparing unit; And a duty ratio calibrator for adjusting the PWM duty ratio according to the output of the range determination unit.

The PWM duty ratio controller may further include a deviation summing voltage comparator that compares the deviation summed voltage with a first upper limit reference voltage; A heavy load comparator for comparing the heavy load deviation voltage, which is the deviation voltage of the load selected as the most important load among the plurality of loads, with the second upper and lower limit reference voltage; A range determining unit that determines a range of the deviation summed voltage using the deviation summed voltage comparing unit and the output of the heavy load comparison unit; And a duty ratio calibrator for adjusting the PWM duty ratio according to an output of the range determination unit.

According to the present invention, since the upper limit value and the lower limit value of the current flowing in the inductor can be simultaneously changed corresponding to the change in the magnitude of the load current, the output ripple can be reduced.

Further, according to the present invention, since the current flowing in the inductor can be adjusted in accordance with the increase and decrease of the sum of deviation of multiple loads, the number of output nodes can adaptively cope with increase and decrease.

1 is a circuit diagram of a conventional SIMO DC / DC converter,
2 is a circuit diagram of a SIMO DC / DC converter according to an embodiment of the present invention,
FIG. 3A is a switching waveform diagram according to an embodiment of the present invention,
FIG. 3B is a switching waveform diagram according to another embodiment of the present invention,
3C is a switching waveform diagram according to another embodiment of the present invention,
FIG. 3D is a switching waveform diagram according to another embodiment of the present invention,
4 is a specific circuit diagram of a subtracting unit according to an embodiment of the present invention,
5 is a specific circuit diagram of a maximum deviation voltage selection unit according to an embodiment of the present invention,
6 is a specific circuit diagram of an adding unit according to an embodiment of the present invention,
7 is a specific circuit diagram of a reference current regulator according to an embodiment of the present invention,
8 is a specific circuit diagram of a reference current controller according to another embodiment of the present invention,
9 is a circuit diagram of a SIMO DC / DC converter according to another embodiment of the present invention,
10 is a specific circuit diagram of a PWM duty ratio adjusting unit according to an embodiment of the present invention,
11 is a specific circuit diagram of a PWM duty ratio adjusting unit according to another embodiment of the present invention, and Fig.
12 is an inductor current waveform diagram when the PWM duty ratio is different according to an embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, terms and words used in the present specification and claims should not be construed as limited to ordinary or dictionary terms, and the inventor should appropriately interpret the concepts of the terms appropriately It should be interpreted in accordance with the meaning and concept consistent with the technical idea of the present invention based on the principle that it can be defined. Therefore, the embodiments described in this specification and the configurations shown in the drawings are merely the most preferred embodiments of the present invention and do not represent all the technical ideas of the present invention. Therefore, It is to be understood that equivalents and modifications are possible.

A SIMO DC / DC converter according to an embodiment of the present invention includes a single inductor multi-output DC-DC converter, a deviation voltage output unit for outputting a plurality of deviation voltages with respect to a predetermined reference voltage, respectively, And a switching control section for lowering the lower limit reference current when the deviation summed voltage is higher than the upper limit reference voltage and raises the upper limit reference current when the summed deviation voltage is lower than the lower limit reference voltage do.

Also, the SIMO DC / DC converter according to another embodiment of the present invention includes a single inductor multi-output DC-DC converting unit, a deviation voltage output unit for outputting a plurality of deviation voltages, And a switching control section for detecting the maximum deviation voltage among the plurality of deviation voltages, raising the upper limit reference current when the maximum deviation voltage is higher than the upper limit reference voltage, and lowering the lower limit reference current when the maximum deviation voltage is lower than the lower limit reference voltage do.

In addition, the switching control unit of the SIMO DC / DC converter according to another embodiment of the present invention detects the maximum deviation voltage among a plurality of deviation voltages, and discharges the electric energy of the inductor to a load having the maximum deviation voltage.

In addition, the switching controller of the SIMO DC / DC converter according to another embodiment of the present invention raises the upper limit reference current when the most important load among the loads connected to the multiple outputs is determined as a heavy load. Here, the term "heavy load" means a load in the case where the electric energy used by the load is larger than the electric energy transmitted from the power source side to the load side.

2 is a circuit diagram of a SIMO DC / DC converter according to an embodiment of the present invention.

The SIMO DC / DC converter according to an embodiment of the present invention includes a DC power source 210, an inductor charging part 220, a plurality of output terminals 230, a subtractor 240, a maximum deviation voltage selector 245, 1 latch 250, an adding unit 255, a reference current adjusting unit 260, a second latch 265, a reference current storing unit 270, a switching unit 275, and a current sensor 280 .

When the switches 1 (SW1) and 3 (SW3) in the inductor charging part 220 are turned on and the switch 2 (SW2) is turned off, electric energy is charged to the inductor do.

When at least one of the switches of the plurality of output stages 230 is turned on and the switch 2 (SW2) is turned on and the switch 1 (SW1) and the switch 3 (SW3) are turned off, Energy is discharged.

The plurality of output stages 230 can provide different output currents and output voltages, as shown in FIG. The divided voltages Vd1, Vd2, Vd3, Vd4, and Vd5 of 1.2 volts can be output when the voltage dividing resistances of the plurality of output stages 230: 231, 232, 233, 234, and 235 are appropriately adjusted.

The subtractor 240 subtracts the divided voltages of the plurality of output stages 230 from the predetermined reference voltage Vref to output the deviation voltages Verror1, ..., Verror5.

The maximum deviation voltage selection unit 245 selects and outputs the maximum deviation voltage among the plurality of deviation voltages Verror1, ..., Verror5 output from the subtraction unit 240. [

The first latch 250 temporarily stores the output terminal of the maximum deviation voltage output from the maximum deviation voltage selector 245 and outputs data stored in synchronization with the enable signal En1. Here, the enable signal En occurs when the inductor current is switched from charge to discharge. That is, the first latch 250 temporarily stores the output stage having the largest deviation voltage among the plurality of output stages, and outputs the output stage information having the largest deviation voltage so that the inductor current flows to the corresponding output stage.

The adder 255 adds the deviation voltage (Verror1, ..., Verror5) output from the subtracter 240 to the deviation sum voltage

).

The reference current regulator 260 raises the upper limit reference current Irefh when the deviation summed voltage output from the adder 255 is higher than the upper limit reference voltage Vu and raises the upper limit reference current Irefh when the deviation summed voltage is lower than the lower limit reference voltage Vl The lower limit reference current Irefl is lowered. That is, when the deviation sum voltage is higher than the upper limit reference voltage, it means that the power consumed at the load side is larger than the reference value and the output terminal becomes lower than the reference voltage. Therefore, at this time, the upper limit reference current is raised.

The second latch 265 temporarily stores the upper limit current or the lower limit reference current output from the reference current adjuster 260 and outputs data stored in synchronization with the enable signal En. That is, the second latch 265 stores and outputs an upper limit value and a lower limit value information of the inductor current flowing in the corresponding output terminal.

The reference current storage unit 270 stores the upper limit reference current and the lower limit reference current output from the second latch 265. The reference current storage unit 270 may be implemented using a resistor.

The switching unit 275 generates a switching signal for charging and discharging the inductor by comparing the inductor current IL output from the current sensor 280 with the upper limit current or the lower limit reference current output from the reference current storage unit 270 And generates a switching signal for switching the output stage switch of the maximum deviation voltage output from the first latch 250.

A, B, A, A, C, and D are used to divide the load of the output stage into A, B, C, D, and E, , A, A, .., to generate a switching signal to selectively supply current to a load having a maximum deviation voltage among a plurality of output stages.

3B is a switching waveform diagram according to another embodiment of the present invention, in which the maximum deviation voltage is lower than the lower limit reference voltage and the lower limit reference current Irefl is lowered to the second lower limit reference current Irefl2. At this time, if the difference between the first upper limit reference current Irefh1 and the first lower limit reference current Irefl1 is? (E.g., Irefh1 - Irefl1 =?), The second upper limit reference current Irefh2 is also the second lower limit reference current Irefl2 ) And an interval of?.

3C is a switching waveform diagram according to another embodiment of the present invention in which the maximum deviation voltage is higher than the upper limit reference voltage and the upper limit reference current Irefh is raised to the third upper limit reference current Irefh3. At this time, similarly, the third lower limit reference current Irefl3 is raised so as to maintain the interval by the third upper limit reference current Irefh3 and?.

FIG. 3D is a switching waveform diagram according to another embodiment of the present invention. When the load of the output stage is divided into A, B, C, D, and E, the switching controller 275, after charging the inductor once, The switching signal can be generated to selectively switch the switches at the output stage to supply current to the load having the maximum deviation voltage.

4 is a specific circuit diagram of a subtraction unit according to an embodiment of the present invention.

The subtractor 240 uses a plurality of operational amplifiers (OP-Amp) 410, ..., and 450 according to an embodiment of the present invention. For example, the first operational amplifier 410 supplies a predetermined reference voltage (Vref, 1.2V) to the non-inverting terminal (+) and the divided voltages Vd1, Vd2, Vd3, Vd4, Vd5) and outputs the difference between the reference voltage and the divided voltage as the first deviation voltage Verror1.

5 is a specific circuit diagram of the maximum deviation voltage selector 245 according to an embodiment of the present invention.

The maximum deviation voltage selection unit 245 according to an embodiment of the present invention includes a deviation voltage comparator 510 and a maximum deviation voltage determination unit 520. [

The deviation voltage comparator 510 compares two different deviation voltages with respect to the total deviation voltage output from the subtraction unit 240 and outputs a deviation comparison value. For example, if the deviation voltage is 5, 10 comparators are used.

The maximum deviation voltage determining unit 520 logically multiplies the deviation comparison value output from the deviation voltage comparing unit 510 to determine and output the maximum deviation voltage. For example, when the divided voltage Vd1 is the lowest and the deviation is the largest, the AND gate 1 AND1 outputs the "H" level signal.

6 is a specific circuit diagram of the adder 255 according to an embodiment of the present invention.

The adder 255 according to an embodiment of the present invention includes first to fifth differential voltages Verror1 to Verror5 that are input in parallel to the non-inverting terminal (+) of the operational amplifier using an operational amplifier, To add the deviation sum voltage (

).

7 is a specific circuit diagram of a reference current regulator 260 according to an embodiment of the present invention.

The reference current regulator 260 according to an embodiment of the present invention includes a deviation sum voltage comparing unit 710, a range determining unit 720, and a reference current calibrator 730.

The deviation summed voltage comparator 710 includes an upper limit comparator 711 for comparing the deviation summed voltage and the upper limit reference voltage Vu and a lower limit comparator 713 for comparing the summed deviation voltage and the lower limit reference voltage Vl .

The range determination unit 720 receives the output of the upper limit value comparator 711 and the output of the lower limit value comparator 713 and determines in which voltage range the deviation summed voltage is. For example, when the output of the upper limit value comparator 711 is "L" and the output of the lower limit value comparator 713 is "H", the first output output1 is outputted as "H". If both the output of the upper limit comparator 711 and the output of the lower limit comparator 713 are "H ", the second output (output2) is output as" H ". And outputs the third output (output3) as "H" if the output of the upper limit value comparator 711 and the output of the lower limit value comparator 713 are both "L ". Here, the range determination unit 720 can be variously implemented by using a plurality of logic elements, and it is a design matter that is obvious to a person having ordinary skill in the art, so a concrete circuit will be omitted.

The reference current calibrator 730 can maintain, raise, or lower the level of the reference current in accordance with the output of the range determination unit 720. For example, if the first output (output1) of the range determination unit 720 is "H ", the levels of the upper limit reference current Irefh and the lower limit reference current Irefl are maintained as they are, The level of the upper limit reference current Irefh and the level of the lower limit reference current Irefl are raised by one step x and when the third output output3 is at the H level, ) By one level (x).

The reference current regulator 260 according to another embodiment of the present invention may apply the heavy load deviation voltage instead of the deviation sum voltage. That is, the load determined to be the most important by the user can be selected as the heavy load, and the level of the reference current can be adjusted by comparing the heavy load deviation voltage (e.g., Verror1) with the upper limit voltage and the lower limit reference voltage. In this case, the output of the subtractor 240 may be directly used instead of the adder 255 in FIG.

8 is a specific circuit diagram of the reference current regulator 260 according to another embodiment of the present invention.

According to another embodiment of the present invention, the level of the reference current can be adjusted according to the deviation sum voltage or the level of the reference current can be adjusted according to the heavy load deviation voltage. For example, the reference current controller 260 according to another embodiment of the present invention includes a deviation summing voltage comparator 810, a heavy load comparator 820, a range determining unit 830, and a reference current calibrator 840 ).

The deviation summed voltage comparator 810 includes a first upper limit comparator 811 for comparing the deviation summed voltage and the first upper limit reference voltage Vu1 and a lower limit comparator 811 for comparing the deviation summed voltage and the first lower limit reference voltage Vl1, (813).

The heavy load voltage comparator 820 includes a second upper limit comparator 821 for comparing the heavy load deviation voltage Verror1 and the second upper limit reference voltage Vu2 and a second upper limit comparator 821 for comparing the heavy load difference voltage Verror1 and the second lower limit reference voltage Vu2, And a lower limit comparator 823 for comparing the output voltage Vl2. Here, the first upper limit reference voltage and the second upper limit reference voltage may be at the same level or at different levels. Also, the first lower limit reference voltage and the second lower limit reference voltage may be at the same level or at different levels.

The range determining unit 830 receives the outputs of the first and second upper limit value comparators 811 and 821 and the outputs of the first and second lower limit value comparators 813 and 823, As shown in Fig. For example, when the output of the first or second upper limit value comparator 811 or 821 is "L" and the output of the first and second lower limit value comparators 813, 823 is "H", the first output " H ". And outputs the second output (output2) as "H" if both the outputs of the first and second upper limit value comparators 811 and 821 and the outputs of the first and second lower limit value comparators 813 and 823 are "H ". When the outputs of the first and second upper limit value comparators 811 and 821 and the outputs of the first and second lower limit value comparators 813 and 823 are both "L ", the third output output 3 is outputted as" H ". Here, the range determination unit 830 can be variously implemented by using a plurality of logic elements, and it is a design matter that is obvious to a person having ordinary skill in the art, so a specific circuit will be omitted.

The reference current calibrator 840 can maintain, raise, or lower the level of the reference current according to the output of the range determination unit 830. [ For example, if the first output (output1) of the range determination unit 830 is "H ", the levels of the upper limit reference current Irefh and the lower limit reference current Irefl are maintained as they are, The level of the upper limit reference current Irefh and the level of the lower limit reference current Irefl are raised by one step x and when the third output output3 is at the H level, ) By one level (x).

9 is a circuit diagram of a SIMO DC / DC converter according to another embodiment of the present invention.

The SIMO DC / DC converter according to another embodiment of the present invention includes a DC power source 910, an inductor charging part 920, a plurality of output terminals 930, a subtractor 940, a maximum deviation voltage selector 945, 1 latch 950, an adding unit 955, a duty ratio adjusting unit 960, a second latch 965, a duty ratio storing unit 970, a digital PWM generating unit 975, and a switching signal generating unit 980 ).

When the switches 1 (SW1) and 3 (SW3) are turned on and the switch 2 (SW2) is turned off in the inductor charging part 920, all the switches of the plurality of output terminals 930 are turned off, do.

When at least one of the switches of the plurality of output terminals 930 is turned on and the switch 2 (SW2) is turned on and the switch 1 (SW1) and the switch 3 (SW3) are turned off, Energy is discharged.

The plurality of output stages 930 can provide different output currents and output voltages, as shown in FIG. It is possible to output the divided voltages Vd1, Vd2, Vd3, Vd4 and Vd5 of 1.2 volts by appropriately adjusting the voltage dividing resistances of the plurality of output stages 930: 931, 932, 933, 934 and 935.

The subtractor 940 subtracts the divided voltages of the plurality of output terminals 930 from the predetermined reference voltage Vref to output the deviation voltages Verror1, ..., Verror5.

The maximum deviation voltage selection unit 945 selects and outputs the maximum deviation voltage among the plurality of deviation voltages Verror1, ..., Verror5 output from the subtraction unit 940. [

The first latch 950 temporarily stores the output terminal of the maximum deviation voltage output from the maximum deviation voltage selection unit 945 and outputs the data being stored in synchronization with the enable signal En1. Here, the enable signal En1 occurs when the inductor current is switched from charge to discharge.

The adder 255 adds the deviation voltage (Verror1, ..., Verror5) output from the subtracter 240 to the deviation sum voltage

).

The duty ratio adjusting unit 960 increases the PWM duty ratio when the deviation summed voltage output from the adder 955 is higher than the upper limit reference voltage Vu and increases the PWM duty ratio if the deviation summed voltage is lower than the lower limit reference voltage Vl. Reduce the ratio. That is, when the deviation sum voltage is higher than the upper limit reference voltage, it means that the power consumed at the load side is larger than the reference value and the output terminal becomes lower than the reference voltage. Therefore, at this time, the PWM duty ratio is increased.

The second latch 965 temporarily stores the PWM duty ratio outputted from the PWM duty ratio adjusting unit 960 and outputs the PWM duty ratio stored in synchronization with the enable signal 2 (En2). Here, the enable signal 2 (En2) may be generated once, for example, every time the enable signal 1 (En1) is generated ten times. It should be understood by those skilled in the art that a counter can be implemented inside or outside the switching signal generator 980, so that detailed description thereof will be omitted.

The duty ratio storage unit 970 stores the PWM duty ratio output from the second latch 965. The duty ratio storage unit 970 can be implemented using a register.

The digital PWM generator 975 generates a PWM signal having a digital value according to the PWM duty ratio output from the duty ratio storage unit 970.

The switching signal generator 980 generates a switching signal using the PWM signal of the digital value and applies the generated switching signal to the output stage switch of the maximum deviation voltage output from the first latch 950.

10 is a specific circuit diagram of a PWM duty ratio adjusting unit according to an embodiment of the present invention.

The PWM duty ratio adjusting unit 960 according to an embodiment of the present invention includes a deviation summing voltage comparator 1010, a range determining unit 1020, and a PWM duty ratio calibrator 1030.

The deviation summed voltage comparison section 1010 includes an upper limit value comparator 1011 for comparing the deviation summed voltage and the upper limit reference voltage Vu and a lower limit value comparator 1013 for comparing the deviation summed voltage and the lower limit reference voltage Vl .

The range determining unit 1020 receives the output of the upper limit value comparator 1011 and the output of the lower limit value comparator 1013 and determines in which voltage range the deviation summed voltage is. For example, when the output of the upper limit value comparator 1011 is "L" and the output of the lower limit value comparator 1013 is "H", the first output output1 is output as "H". When both the output of the upper limit value comparator 1011 and the output of the lower limit value comparator 1013 are "H ", the second output (output2) is outputted as" H ". And outputs the third output (output3) as "H" when the output of the upper limit value comparator 1011 and the output of the lower limit value comparator 1013 are both "L ". Here, the range determination unit 1020 can be implemented in various ways using a plurality of logic elements, and it is a design matter that is obvious to a person having ordinary skill in the art, so a concrete circuit will be omitted.

The duty ratio calibrator 1030 can maintain, increase, or decrease the PWM duty ratio in accordance with the output of the range determination unit 1020. [ For example, if the first output (output1) of the range determination unit 1020 is "H ", the PWM duty ratio RD is maintained as it is and when the second output (output2) , And decreases the PWM duty ratio RD by a predetermined ratio (x) when the third output (output3) is "H ".

The PWM duty ratio adjusting unit 960 according to another embodiment of the present invention may apply the heavy load deviation voltage instead of the deviation voltage sum value. That is, the load determined to be the most important by the user can be selected as a heavy load, and the PWM duty ratio can be adjusted by comparing the heavy load deviation voltage (for example, Verror 1) with the upper limit voltage and the lower limit reference voltage. In this case, the output of the subtractor 940 may be directly used instead of the adder 955 in FIG.

11 is a specific circuit diagram of a PWM duty ratio adjusting unit according to another embodiment of the present invention.

According to another embodiment of the present invention, the PWM duty ratio can be adjusted according to the deviation sum voltage or the PWM duty ratio can be adjusted according to the heavy load deviation voltage. For example, the PWM duty ratio 960 according to another embodiment of the present invention includes a deviation summed voltage comparator 1110, a heavy load comparator 1120, a range determining unit 1130, and a PWM duty ratio calibrator 1140 ).

The deviation summed voltage comparator 1110 includes a first upper limit comparator 1111 that compares the deviation summed voltage and the first upper limit reference voltage Vu1 and a lower limit comparator 1111 that compares the summed deviation voltage and the first lower limit reference voltage Vl1, (1113).

The heavy load voltage comparator 1120 includes a second upper limit comparator 1121 for comparing the heavy load deviation Verror1 and the second upper limit reference voltage Vu2 and a second upper limit comparator 1121 for comparing the heavy load difference voltage Verror1 and the second lower limit reference voltage Vu2, And a lower limit comparator 1123 for comparing the voltage Vl2. Here, the first upper limit reference voltage and the second upper limit reference voltage may be at the same level or at different levels. Also, the first lower limit reference voltage and the second lower limit reference voltage may be at the same level or at different levels.

The range determining unit 1130 receives the outputs of the first and second upper limit value comparators 1111 and 1121 and the outputs of the first and second lower limit value comparators 1113 and 1123 and outputs a deviation summed voltage or a heavy load voltage, As shown in Fig. For example, when the output of the first or second upper limit value comparator 1111 or 1121 is "L" and the output of the first and second lower limit value comparators 1113, 1123 is "H", the first output " H ". H "when the outputs of the first and second upper limit value comparators 1111 and 1121 and the outputs of the first and second lower limit value comparators 1113 and 1123 are both" H ". And outputs the third output (output3) as "H" when the outputs of the first and second upper limit value comparators 1111 and 1121 and the outputs of the first and second lower limit value comparators 1113 and 1123 are both "L ". Here, the range determination unit 1130 can be variously implemented using a plurality of logic elements, and it is a design matter that is obvious to a person having ordinary skill in the art, so a detailed circuit will be omitted.

The PWM duty ratio calibrator 1140 can maintain, increase, or decrease the PWM duty ratio according to the output of the range determination unit 1130. [ For example, if the first output (output1) of the range determination unit 1130 is "H ", the PWM duty ratio is maintained as it is and if the second output (output2) And decreases the PWM duty ratio by a predetermined ratio (x) when the third output (output3) is "H ".

12 is an inductor current waveform when the PWM duty ratio is different according to an embodiment of the present invention. RD1 is a current waveform flowing in the inductor when the PWM duty ratio is 80%, and RD2 is a current waveform when the PWM duty ratio is 82% Current waveform.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. It is to be understood that various changes and modifications may be made without departing from the scope of the appended claims.

210: DC power source
220: Inductor charging part
230: a plurality of output terminals
240:
245: maximum deviation voltage selection unit
250: first latch
255:
260: Reference current regulator
265: Second latch
270: Reference current storage section
275:
280: Current sensor

Claims (23)

A single inductor multi-output DC-DC converter;
A deviation voltage output unit for outputting a plurality of deviation voltages by comparing respective voltages of the multiple outputs of the conversion unit with a predetermined reference voltage; And
And a lower limit reference current is lowered when the deviation summed voltage is lower than the lower limit reference voltage, and when the deviation summed voltage is higher than the upper limit reference voltage, And a control unit,
Wherein the switching control unit comprises:
A maximum deviation voltage selection unit for selecting an output stage having a maximum deviation voltage among the plurality of deviation voltages;
A first latch for temporarily storing and outputting the output stage information having the maximum deviation voltage;
An adder for adding the plurality of deviation voltages to output a deviation summed voltage;
A reference current regulator which raises the upper limit reference current when the deviation summed voltage is higher than the upper limit reference voltage and lower the lower limit reference current when the deviation summed voltage is lower than the lower limit reference voltage;
A second latch for temporarily storing the upper limit current or the lower limit reference current;
A reference current storage unit for storing the upper limit reference current and the lower limit reference current output from the second latch; And
A switching unit for comparing the inductor current IL flowing through the inductor with the upper reference current or the lower reference current based on the output of the first latch and generating a switching signal for charging / discharging the inductor,
A single inductor multi-output DC-DC converter.
delete delete The apparatus of claim 1, wherein the maximum deviation voltage selector comprises:
A deviation voltage comparing unit comparing two different deviation voltages with respect to all of the plurality of deviation voltages output from the deviation voltage output unit and outputting a deviation comparison value; And
A maximum deviation voltage determining section for determining an output stage having a maximum deviation voltage by logically multiplying the deviation comparison value by a logical sum;
A single inductor multi-output DC-DC converter.
The method according to claim 1,
Wherein the adder adds a plurality of deviation voltages input in parallel to the non-inverting terminal of the operational amplifier to output a deviation summed voltage.
The apparatus of claim 1, wherein the reference current controller comprises:
An upper limit value comparator for comparing the deviation summed voltage and the upper limit reference voltage, and a lower limit value comparator for comparing the deviation summed voltage and the lower limit reference voltage;
A range determining unit that receives the output of the upper limit value comparator and the output of the lower limit value comparator and determines in which voltage range the deviation summed voltage is in; And
A reference current calibrator for adjusting a level of a reference current according to an output of the range determining unit,
A single inductor multi-output DC-DC converter.
The method according to claim 1,
Wherein the switching controller generates a switching signal to discharge the electric energy of the inductor to a plurality of loads having a maximum deviation voltage among the plurality of deviation voltages during one discharge interval for discharging the inductor. DC to DC converters.
A single inductor multi-output DC-DC converter;
A deviation voltage output unit for outputting a plurality of deviation voltages by comparing respective voltages of the multiple outputs of the conversion unit with a predetermined reference voltage; And
And when the deviation summed voltage is higher than the first upper limit reference voltage or when the predetermined deviation voltage among the plurality of deviation voltages is higher than the second upper limit reference voltage, the upper limit reference current is increased And a switching control unit for lowering the lower limit reference current when the deviation summed voltage is lower than the first lower limit reference voltage or when the predetermined deviation voltage is lower than the second lower limit reference voltage,
Wherein the switching control unit comprises:
A maximum deviation voltage selector for selecting an output terminal of a maximum deviation voltage among the plurality of deviation voltages;
A first latch for temporarily storing and outputting output terminal information of the maximum deviation voltage;
An adder for adding the plurality of deviation voltages to output a deviation summed voltage;
A reference current regulator which raises the upper limit reference current if the deviation summed voltage is higher than the first upper limit reference voltage and lower the lower limit reference current if the deviation summed voltage is lower than the first lower limit reference voltage;
A second latch for temporarily storing and outputting the upper limit reference current or the lower limit reference current;
A reference current storage unit for storing the upper limit reference current and the lower limit reference current output from the second latch; And
And generates a switching signal for charging and discharging the inductor by comparing an inductor current (IL) flowing through the inductor with the upper reference current or the lower reference current based on the output of the first latch, A switching unit for generating a switching signal for switching
A single inductor multi-output DC-DC converter.
delete delete The apparatus as claimed in claim 8, wherein the maximum deviation voltage selector comprises:
A deviation voltage comparing unit for comparing two different deviation voltages with respect to a plurality of deviation voltages output from the deviation voltage output unit and outputting a deviation comparison value; And
And a maximum deviation voltage determining section for determining the maximum deviation voltage by logically multiplying the deviation comparison value by a logical sum
A single inductor multi-output DC-DC converter.
9. The method of claim 8,
Wherein the adder adds a plurality of deviation voltages input in parallel to the non-inverting terminal of the operational amplifier to output a deviation summed voltage.
The apparatus of claim 8, wherein the reference current controller comprises:
A first upper limit comparator for comparing the deviation summed voltage with the first upper limit reference voltage, and a lower limit comparator comparing the deviation summed voltage with the first lower limit reference voltage;
A second upper limit comparator for comparing the predetermined deviation voltage with the second upper limit reference voltage and a lower limit comparator comparing the predetermined difference voltage with the second lower limit reference voltage;
A range determining unit that receives the outputs of the first and second upper limit value comparators and the outputs of the first and second lower limit value comparators to determine which voltage range the deviation sum voltage or the predetermined deviation voltage is in; And
A reference current calibrator for adjusting a level of a reference current according to an output of the range determining unit,
A single inductor multi-output DC-DC converter.
9. The method of claim 8,
Wherein the switching controller generates a switching signal to discharge the electric energy of the inductor to a plurality of loads having a maximum deviation voltage among the plurality of deviation voltages during one discharge interval for discharging the inductor. DC to DC converters.
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