KR101823216B1 - Silicon carbide single crystal wafer and method of manufacturing a silicon carbide single crystal ingot - Google Patents

Abstract

A SiC single crystal wafer produced from a SiC single crystal ingot grown by a sublimation recrystallization method and capable of realizing a high device performance and a device fabrication yield in the case of a wafer for device fabrication.
Cm 2 or less, the penetration spiral dislocation density is 500 pieces / cm 2 or less, and the Raman shift value is 0.2 or less. The SiC single crystal wafer is characterized in that the SiC single crystal wafer has a surface bottom dislocation density of 1000 pieces / Crystal ingot while controlling the temperature distribution of the single crystal ingot while suppressing the change in the temperature distribution of the single crystal ingot.

Description

TECHNICAL FIELD [0001] The present invention relates to a silicon carbide single crystal wafer and a method for manufacturing the silicon carbide single crystal ingot. BACKGROUND ART [0002] Silicon carbide single crystal wafers,

The present invention relates to a silicon carbide single crystal wafer having a low crystal density and a low Raman index while having low basal dislocation and penetrating spiral dislocation density, and a method for producing a silicon carbide single crystal ingot which can obtain the same.

BACKGROUND ART Silicon carbide (SiC) is a wide bandgap semiconductor having a large thickness of 2.2 to 3.3 eV and has been studied and developed as an environmentally resistant semiconductor material from its excellent physical and chemical properties. Especially recently, SiC has been attracting attention as a material for short wavelength optical devices, high frequency electronic devices, and high breakdown voltage and high output electronic devices extending from blue to the outside, and research and development has been actively performed. However, SiC has been difficult to manufacture high-quality large-diameter single crystals and has hitherto hindered practical use of SiC devices.

Conventionally, in the scale of a laboratory, a SiC single crystal having a size capable of producing a semiconductor device has been obtained by, for example, a sublimation recrystallization method (Lelie method). However, in this method, the area of the obtained single crystal is small, and the dimensions, shape, and further control of the crystal polymorphism (polytype) and the impurity carrier concentration are not easy. On the other hand, a cubic SiC single crystal is grown by heteroepitaxial growth on a different substrate such as silicon (Si) by using chemical vapor deposition (CVD). In this method, although a large-area single crystal can be obtained, only a SiC single crystal including a large number of defects (~ 10 ⁷ / cm 2) can be grown because of the fact that the lattice mismatch between SiC and Si is about 20% Single crystals are not obtained.

Therefore, in order to solve these problems, an improved type of Reli method has been proposed in which sublimation and recrystallization are performed using SiC single crystal wafers as seed crystals (see Non-Patent Document 1). By using this modified Relye method, the SiC single crystal can be grown while controlling the crystal polymorphism (6H type, 4H type, 15R type, etc.), shape, carrier type and concentration of the SiC single crystal. SiC has a crystal polymorphism (polytype) of 200 or more. However, 4H polytype is the most excellent from the viewpoint of crystal productivity and electronic device performance, and commercially produced SiC single crystal is often 4H. In addition, the conductivity is most likely to be grown with n-type conductivity because the single crystal ingot is easy to handle with nitrogen as a dopant. However, in a communication device application, a crystal having a high resistivity which does not substantially contain a dopant element is also produced.

At present, SiC single crystal wafers having a diameter of 51 mm (2 inches) to 100 mm are cut out from SiC single crystals produced by the modified Lelie process, and they are provided for device fabrication in the fields of power electronics and the like. In addition, development of a 150 mm wafer has been reported (see Non-Patent Document 2), and full-scale practical use of a device using 100 mm or 150 mm wafer is expected. In this situation, the quality of wafers represented by indices such as dislocation densities has become very important in recent years because they greatly affect the performance of the device and the yield at the time of mass production.

In the improved type Lelie process, unavoidable internal stress is generated in the single crystal ingot during growth, and it remains in the form of elastic deformation or dislocation (plastic deformation) inside the finally obtained single crystal wafer. SiC wafer on the market, the basal plane dislocation (hereinafter, BPD) is 2 × 10 ³ to 2 × 10 ⁴ (pieces / ㎠), the through-helix potential (hereinafter, TSD) is 8 × 10 ² to 10 ³ (particles / (Hereinafter referred to as TED) is 5 x 10 ³ to 2 x 10 ⁴ (number / cm 2) (see Non-Patent Document 3).

In recent years, it has been reported from the investigation of crystal defects and devices that BPD causes an oxide film failure of the device and causes dielectric breakdown (see Non-Patent Document 4). In addition, it has been reported that a stacking fault occurs from a BPD in a bipolar device or the like, and it is known that this causes deterioration of device characteristics (see Non-Patent Document 5). In addition, TSD is a cause of a leakage current of a device (see Non-Patent Document 6), and it has also been reported that the lifetime of a gate oxide film is lowered (see Non-Patent Document 7). Therefore, in order to fabricate a high-performance SiC device, a SiC single crystal having a low BPD and TSD is required.

Here, there are a plurality of reporting examples of the dislocation density reduction technique. For example, in epitaxial growth of a SiC thin film by a chemical vapor deposition method (CVD method), BPD is converted into TED by a mirror image force (see Non-Patent Document 8) (See Non-Patent Document 9) have been reported. As a reporting example in the sublimation recrystallization method, Otani et al. Reported that TED converts to BPD (see Non-Patent Document 10). However, in these prior arts, no control method, conditions, and the like for reducing the structure conversion and reduction of the BPD in the industrial production of the SiC single crystal have been described at all.

On the other hand, in the sublimation recrystallization method, a SiC single crystal as an initial growth layer is grown at a predetermined growth pressure and a substrate temperature, and then crystal growth is performed while gradually decreasing the substrate temperature and pressure. (See Patent Document 1). However, considering the application to a high-performance SiC device, the TSD density of the SiC single crystal obtained by this method is 10 ³ to 10 ⁴ (number of pieces / cm 2) (refer to the specification of Patent Document 1 [Effect of the Invention] Reduction of TSD is needed again.

Further, by growing the SiC single crystal as an initial growth layer by a predetermined growth pressure and a substrate temperature, and maintaining the substrate temperature as it is, and by reducing the pressure and increasing the growth rate to grow crystals, generation of micropipes is suppressed, Have been reported (see Patent Document 2). However, even with this method, the reduction effect of TSD is insufficient.

Patent Document 3 discloses a method of growing a SiC single crystal in a sublimation recrystallization method using seed crystals, cutting the seed crystal out of the SiC single crystal, performing crystal growth again, repeating this several times, , A technique of obtaining a SiC single crystal wafer having a low mosaic property has been reported.

This technique utilizes the property that the small-diameter grain boundary, which is an aggregate of dislocations, propagates perpendicularly to the growth surface. By making the grown crystal have a convex shape with respect to the growth direction, the small- So that a region having a small diameter grain boundary density, that is, a region having a low dislocation density, is formed at the center portion.

Generally, in the modified Raley process, a temperature gradient is formed in the crystal growth direction so that the temperature on the side closer to the final crystal is lower than that on the side of the SiC crystal powder as a raw material for the growth crystal, and the shape of the growth surface of the growing single crystal is , And by controlling the temperature distribution in the vicinity of the growth surface. That is, since the growth surface is formed along the isothermal surface, for example, as in Patent Document 3, in order to make the growth crystal shape to have a convex shape with respect to the growth direction, The temperature t _p of the point and the difference (Δt = t _p -t _c ) between the temperature of the ingot and the temperature t _c of the ingot center portion having the same distance from the seed crystal are positive It is necessary to form an appropriate convex shape isotherm. It is known that the crystal growth while forming such an isotherm is also important from the object of controlling the generation of polycrystals and stably growing the desired polytype and producing a high quality single polytype SiC single crystal ingot. However, in the conventional technique, when a single crystal ingot is produced by a growth process in which a temperature difference? T in a plane perpendicular to the growth direction increases, there is a risk that a large stress is formed inside the single crystal.

On the other hand, if the crystal orientation of the wafer surface deviates due to the large elastic deformation of the wafer, it causes a problem such as a step flow abnormality in the epitaxial growth process, which greatly affects device characteristics. Also, a large elastic deformation sometimes causes a large warpage of the wafer. The deflection of the wafer causes defocusing in the lithography process and problems such as the rounding of the raw material gas in the backside of the epitaxial growth process. In addition, in addition to being capable of handling handling such as transfer of wafers in the beginning, the risk of breakage by the chuck should also be considered.

Patent Document 4 discloses a growth technique for alleviating the internal stress of a single crystal ingot. In Patent Document 4, a temperature gradient control member disposed around a seed crystal or a single crystal to be grown thereon and a temperature gradient control member disposed between the seed crystal or the single crystal and the temperature gradient control member And a local temperature gradient relaxation member. However, the object of this technique is to reduce the maximum value of the temperature gradient generated in the single crystal growing just above the termination definition to suppress cracking and propagation in the growing crystal, and the growing conditions of the part to be wafers in the growing ingot are It is essentially unchanged. Therefore, the internal stress and the dislocation density of the wafer are not reduced by the patented technology.

In addition, the following method has been reported as means for reducing warpage of wafers due to relaxation of elastic deformation. Patent Document 5 discloses that SiC single crystal ingots or wafers are annealed in a noncorrosive gas atmosphere containing carbon and hydrogen or an atmosphere in which these noncorrosive gases are mixed with argon or helium at a temperature higher than 2000 ° C and lower than 2800 ° C, Techniques for reducing the internal stress of an ingot or a wafer and preventing breakage or cracking during ingot processing or in a device process of a wafer have been reported. Patent Document 6 discloses a technique in which a wafer cut from a SiC single crystal ingot is heat-treated at 800 占 폚 or more and 2400 占 폚 while pressurizing the wafer at 10 MPa or more and 0.5 MPa or less to make the radius of curvature of the wafer 35 m or more.

These methods are considered to be effective in reducing the elastic deformation of the wafer. However, when the SiC single crystal is externally subjected to a thermal load exceeding 2000 ° C to reposition the atoms, it involves a temperature raising and cooling process, And a temperature distribution is formed, and a strong stress field is generated in the crystal due to the temperature unbalance, resulting in a new dislocation. The dislocation density increase of the crystal after annealing in the example of Patent Document 6 shows the phenomenon.

Japanese Patent Laid-Open No. 2002-284599 Japanese Patent Application Laid-Open No. 2007-119273 Japanese Patent Application Laid-Open No. 2001-294499 Japanese Patent Application Laid-Open No. 2013-139347 Japanese Patent Application Laid-Open No. 2006-290705 Japanese Patent Application Laid-Open No. 2005-93519

Yu.M.Tairov and V. F. Tsvetkov, Journal of Crystal Growth, vol. 52 (1981) pp.146-150 A. A. Burk et al, Mater. Sci. Forum, 717-720, (2012) pp75-80 Otani Noboru, SiC and Related Wide-gap Semiconductor Research Association 17th Lecture Notice, 2008, p8 J.Senzaki et al., Mater. Sci. Forum, 661, (200S) pp661-664 R. E. Stahlbush et al., Journal of Electronic Materials, 31, (2002), 370-375 Bando et al., SiC and related wide gap semiconductor research meeting 19th seminar preliminary report, 2010, p140-141 Yamamoto et al., SiC and related wide gap semiconductor research meeting 19th lecture preliminary report house, 2010, p11-12 S. Ha et al, Journal of Crystal Growth, 244, (2002), 257-266 K. Kamei et al., Journal of Crystal Growth, 311, (2009), 855-858 N. Ohtani et al., Journal of Crystal Growth, 286, (2006), 55-60

As described above, a manufacturing method for reducing the dislocation density of wafers and the like is performed. However, the yield of the device is not improved in a wafer where the dislocation density of the wafer is low, or a good epitaxial thin film is formed on the wafer It can not be found.

An object of the present invention is to provide a SiC single crystal wafer which is low in dislocation density and small in elastic deformation, and which is obtained by solving the above problems, and a process for producing silicon carbide single crystal ingots which can obtain the same.

As described above, in order to improve the performance of the SiC device and the yield at the time of mass production, it is important to lower the BPD density and the TSD density of the wafer. However, in a wafer having a low dislocation density, a good epitaxial thin film is formed on the wafer Can not be formed, and as a result, the yield and performance of the device can not be improved. The present inventors have conducted various tests and studies to solve the problems as described above. As a result, by realizing a SiC single crystal wafer having a small BPD density and TSD density of the SiC single crystal wafer and a small elastic deformation in the wafer, I thought that the performance and yield of these devices would improve significantly.

However, in the conventional manufacturing technique using the sublimation recrystallization method, a large internal stress necessarily occurs during the growth of the single crystal, and even if a step such as annealing is added after the growth, the dislocation (plastic deformation) or the elastic deformation Type. That is, in the prior art, it is not possible to mass-produce wafers compatible with low dislocation density and low elastic deformation on an industrial scale. As a result of intensive studies, the inventors of the present invention have found an innovative single crystal manufacturing technique that combines a low dislocation density and a low elastic deformation on the basis of new knowledge on internal stress, and has completed the present invention.

Further, the silicon carbide single crystal wafer of the present invention means a circular plate obtained by cutting silicon carbide single crystal ingots and mirror-finished.

The present invention includes the following configuration.

(1) A silicon carbide single crystal wafer having a base surface dislocation density of the surface of not more than 1000 / cm 2, a penetrating spiral dislocation density of not more than 500 / cm 2, and a Raman index of not more than 0.2.

(2) A silicon carbide single crystal wafer having a base surface dislocation density of the surface of not more than 500 / cm 2, a penetrating spiral dislocation density of not more than 300 / cm 2, and a Raman index of not more than 0.15.

(3) The silicon carbide single crystal wafer according to (1), wherein the Raman index is 0.15 or less.

(4) The silicon carbide single crystal wafer according to (1) or (2), wherein the Raman index is 0.1 or less.

(5) The silicon carbide single crystal wafer according to (1), wherein the basal plane dislocation density of the surface is 500 / cm 2 or less.

(6) The silicon carbide single crystal wafer according to any one of (1) to (4), wherein the basal plane dislocation density of the surface is 300 / cm 2 or less.

(7) The silicon carbide single crystal wafer according to any one of (1) to (4), wherein the basal plane dislocation density of the surface is 100 / cm 2 or less.

(8) The silicon carbide single crystal wafer according to any one of (1) to (7), wherein the through-spiral dislocation density is 300 pcs / cm2 or less.

(9) The silicon carbide single crystal wafer according to any one of (1) to (7), wherein the through spiral dislocation density is 200 / cm 2 or less.

(10) The silicon carbide single crystal wafer according to any one of (1) to (7), wherein the through spiral dislocation density is 100 / cm 2 or less.

(1) to (10), wherein the sum of the basal plane dislocation density and the penetrating helical dislocation density of the surface of the silicon carbide substrate 11 is 1000 pieces / cm2 or less.

(1) to (10), wherein the sum of the basal plane dislocation density and the penetrating spiral dislocation density of the surface of the silicon carbide substrate (12) is 500 / cm2 or less.

(1) to (10), wherein the sum of the basal plane dislocation density and the through-spiral dislocation density on the surface of the silicon carbide substrate (13) is 300 / cm2 or less.

(14) A method for producing a silicon carbide single crystal ingot for producing a silicon carbide single crystal wafer according to any one of (1) to (13), wherein a silicon carbide single crystal is grown by sublimation recrystallization in a seed crystal accommodated in a crucible Wherein the ingot from the side surface of the single crystal ingot is controlled during single crystal growth to cause crystal growth while suppressing a change in the temperature distribution of the single crystal ingot.

(15) A process for producing a silicon carbide single crystal ingot according to (14), wherein the graphite felt subjected to a high-temperature heat treatment at a temperature of 2250 캜 or higher is used as a heat insulating material disposed around a crucible used for crystal growth.

(16) The method for producing a silicon carbide single crystal ingot according to (15), wherein the temperature of the high temperature heat treatment is not lower than 2450 ° C.

(17) A heat flux control member having a relationship of a room temperature thermal conductivity? ₂ at room temperature thermal conductivity? ₁ of 1.1 x? ₁ ?? ₂ to a room temperature thermal conductivity? ₁ of a member forming a longitudinal crystal attaching region of a crucible lid on which seed crystals are provided, The method of producing a silicon carbide single crystal ingot according to (14), wherein the ingot is provided along the periphery of the mounting region.

18. The method for producing the silicon carbide single crystal ingot according to (17) satisfy a relationship of a room temperature thermal conductivity λ ₂ of heat flux control member is 1.2 × λ ₁ ≤λ _2.

(19) The silicon carbide single crystal ingot according to any one of (15) to (18), wherein the atmospheric gas in the surrounding space surrounding the surrounding crucible for crystal formation contains 10 vol% or more of He gas Gt;

(20) The method for producing a silicon carbide single crystal ingot according to (19), wherein the atmospheric gas in the peripheral space contains 20 vol% or more of He gas.

Since the SiC single crystal wafer of the present invention has a low dislocation density and a small elastic deformation, it is possible to realize a high yield and a favorable device characteristic in device fabrication and the like in the field of power electronics. For example, the focal point can be accurately connected in the lithography process, and in the epitaxial growth process, high-quality step flow growth can be realized. Further, since the dislocation density is low, the structural defects of the device can be alleviated, contributing to the improvement of the performance and the yield of the device. Particularly, in the present invention, since a SiC single crystal wafer of such quality is realized by a large diameter wafer having a diameter of 100 mm or more, its practicality is extremely high.

1 is an example of a Raman scattering light spectrum of a SiC wafer.
2 is an example of the etch pit observation.
3 is a view showing an etch pit measuring position in the wafer.
4 is a schematic diagram showing a crystal growing apparatus used in the present invention.
5 is a schematic diagram showing a crucible structure used in an embodiment of the present invention.
6 is a schematic diagram showing a crucible structure used in an embodiment of the present invention.
7 is a schematic diagram showing a crucible structure used in an embodiment of the present invention.
8 is a schematic diagram showing a crucible structure used in an embodiment of the present invention.

Hereinafter, the present invention will be described in detail.

First, since the SiC single crystal wafer of the present invention has a diameter of 100 mm or more, its BPD density and TSD density are low, and its elastic deformation is small, it is possible to manufacture a high performance device, A high yield can be obtained. The density of the BPD of the SiC single crystal wafer in the present invention is 1000 pieces / cm 2 or less when the wafer diameter is 150 mm or more and 500 pieces / cm 2 or less when the wafer diameter is 100 mm or more. When the TSD density is 150 mm or more 500 pieces / cm 2 or less, and when the diameter is 100 mm or more, the number is 300 pieces / cm 2 or less.

On the other hand, as an evaluation method for the elastic deformation, there are several methods other than the precise measurement of the lattice constant by, for example, X-ray. However, in the conventional measuring method, since the elastic deformation is represented by a vector, a high-level analytical technique is also required to evaluate the degree of influence on the device, and there is also a problem that the measurement itself requires time or functions . Therefore, the present inventors have developed an optimum evaluation method of elastic deformation that affects the device yield. As a result, 1. it is an evaluation index irrespective of the size of the wafer. 2. The elastic deformation of a vector can be represented by scalar simplification. 3. In terms of short measurement time, evaluating the reciprocal of the wavelength of the Raman scattering light peak of SiC with the difference value (that is, Raman exponent) between the values measured at the center and the periphery of the wafer, I found something effective. Therefore, in the present invention, this is adopted as an evaluation method of elastic deformation.

The light source of the Raman measurement used in the present invention is a green laser of 532 nm, which is irradiated to a spot of 2 mu m in diameter on the surface of the sample SiC single crystal wafer. For one measurement point, the above-mentioned measurement light was irradiated at 72 points in a total of 8 rows and 9 columns in a spot interval of 10 占 퐉, and the average value was used as scattered light data of the measurement point. The center of one measurement point is the center of the wafer and the center of another measurement point is located at a position spaced by 2 mm from the edge (outer circumference) of the wafer (2 mm from the edge toward the center of the wafer The wavelength of the Raman scattering light was measured at two places. Then, the difference (the value of the center - the value of 2 mm of the outer circumference) of the wave number (the reciprocal of the wavelength) is taken as the Raman index.

Fig. 1 shows an example of measurement of Raman scattering light. The peak of Raman shift 816 cm ^-1 of the Ne lamp was used for calibration of the scattered light measurement. The larger the positive sign of the Raman exponent, the greater the elastic deformation of the wafer. Elastic deformation of the wafer is a cause of scattering in the stepwise direction and height of the surface of the wafer and is undesirable because it deteriorates the quality of the epitaxial thin film formed on the surface of the wafer. The Raman exponent of the SiC single crystal wafer of the present invention is 0.2 or less, preferably 0.15 or less, more preferably 0.1 or less for wafers having a diameter of 150 mm or more and 0.15 or less, preferably 0.1 Or less. The Raman index is usually a positive value, but it may be negative when manufactured under special manufacturing conditions. It is generally difficult to take a large absolute value on the minus side, but if it is smaller than -0.2, it is also undesirable because it affects device fabrication.

When the BPD density is lower than the above value, higher device performance and yield can be realized. Therefore, it is preferable that the BPD is 500 pieces / cm 2 or less for a wafer having a diameter of 150 mm or more, Cm 2 / cm 2 or less, more preferably 100 / cm 2 or less. The TSD density of the wafer having a diameter of 150 mm or more is preferably 300 pieces / cm 2 or less, more preferably 200 pieces / cm 2 or less, more preferably 100 pieces / cm 2 or less . If both the BPD and the TSD are lowered to a level below 100 pcs / cm 2, it is considered that the adverse effect on the device will be substantially eliminated.

As described above, wafers having a diameter of 150 mm or more and wafers having a diameter of 100 mm or more are set differently. In many cases, wafers having a diameter of 150 mm or more are used in mass production and production of low- This is because it is used for manufacturing a high-performance device, and therefore, a higher quality is required. As described above, the BPD and the TSD are both obstacles to practical use of the device. Therefore, remarkable improvements in device performance and yield can be expected when the number density of BPD and TSD is 1000 pieces / cm2 or less. Preferably, the total number of these pieces is 500 pieces / cm2 or less, more preferably 300 pieces / Or less. A wafer having a diameter of 100 mm or more refers to a SiC single crystal wafer having a diameter of 100 mm or more and 300 mm or less in consideration of existing products and the like, and includes, for example, a so-called 100 mm wafer or 125 mm wafer. A wafer having a diameter of 150 mm or more refers to a SiC single crystal wafer having a diameter of 150 mm or more and 300 mm or less and includes a so-called 150 mm wafer. The diameter of the wafer is preferably as large as possible from the viewpoint of the productivity of the device and there is no upper limit in the meaning of the productivity of the device. However, in the present technology, when the diameter exceeds 300 mm, the temperature difference inside the crystal during sublimation recrystallization becomes excessive, The difference in the physical property values in the case of the present invention becomes remarkable. That is, as the bore becomes larger, the internal stress tends to increase, and it tends to be difficult to obtain a high-quality wafer. Therefore, the upper limit is practically 300 mm.

As a method for producing such a SiC single crystal wafer as described above, there has been a mainstream method in which the SiC single crystal ingot is grown in an environment where the temperature gradient has been minimized as much as possible and the stress on the growth surface is reduced. However, in order to stably grow the SiC single crystal ingot by the sublimation recrystallization method as described above, it is essential to impart a temperature gradient in the growth space. If the temperature gradient is unreasonably reduced, the success rate or the growth rate of the single- It is adversely affected industrially because productivity is deteriorated. Incidentally, from the industrial viewpoint, it is considered that the height of the ingot is about 30 mm or more.

The inventors of the present invention have conducted research and development over a long period of time for a production method for obtaining SiC single crystal wafers of low BPD, low TSD and low elastic deformation in production on an industrial scale. As a result, it was surprisingly found that the internal stress of the SiC single crystal ingot finally formed by dislocation and elastic deformation of the wafer not only occurred during growth at the growth surface, but also remarkably increased by the temperature distribution change of the crystal after growth. Hereinafter, this idea will be described in detail.

During the growth, the SiC single crystal ingot at a certain point of time is in a state where internal stress is generated by the temperature distribution at that point, and a part of the internal stress is already converted to the potential. If the growth is completed while maintaining the temperature distribution at this time, a SiC single crystal wafer having dislocation density and elastic deformation reflecting the temperature distribution described above can be produced. However, under actual manufacturing conditions, the temperature distribution changes due to several reasons for crystal growth, and new stress is generated in the SiC single crystal ingot. By this newly generated stress, the BPD is surely proliferated. Further, the atomic arrangement on the growth surface also changes, which causes TSD to be generated. Further, the elastic deformation of the wafer is also increased, and as a result, it becomes difficult to manufacture a high-quality device. Here, when the temperature distribution described above makes a change such that the gradient becomes small, a phenomenon that the elastic deformation of the finally fabricated wafer becomes small can occur. In this case, however, a potential is generated by applying a new stress to the ingot in a stressfully equilibrium state under the original temperature distribution by application of a temperature field which is not equilibrium in a stress state, Can not be manufactured.

Therefore, the inventors of the present invention have found that by controlling the heat input from the single crystal ingot side during single crystal growth, it is possible to suppress the change in the temperature distribution of the ingot during the crystal growth, suppress the growth of BPD and TSD during growth, did. However, in actual SiC single crystal growth, it is impossible to actually measure the temperature of the crystal. Therefore, the present inventors analyzed the temperature and internal stress in a single crystal ingot or crucible by using a finite element method, and actually performed crystal growth. As a result of repeated evaluation of the quality of the obtained crystal, And succeeded in developing the SiC single crystal wafer of the present invention.

First, one of the causes of the temperature distribution change is the fluctuation of heat input from the single crystal ingot side due to the deterioration of the characteristics of the heat insulating material disposed outside the crucible for crystal growth. As a heat insulating material used in the production of SiC single crystal by the sublimation recrystallization method, a felt or a graphite molding insulating material is often used. As the manufacturing conditions, the most common heat treatment temperature is 1000 占 폚 or less, and the treatment temperature is 2000 占 폚 even in a high temperature treatment product. The temperature of the crucible for SiC single crystal reaches not less than 2400 캜 at the maximum and is higher than the treatment temperature of the above-mentioned heat insulating material, so that a reaction such as graphitization of the heat insulating material occurs during crystal growth and the heat insulating property is deteriorated. In addition, a sublimated gas component leaks from the inside of the crucible, and the component causes a thermochemical reaction with the heat insulating material to deteriorate the graphite material, thereby deteriorating the heat insulating property. With the deterioration of the heat insulating material, the current fed into the coil increases due to the temperature feedback in the device control at the time of actually manufacturing the SiC single crystal ingot (because the crucible temperature is judged to be lowered due to deterioration of the heat insulating property). As a result, the temperature of the deteriorated crucible portion of the heat insulator is lowered, but the temperature of the portion where the deterioration is hardened may be increased inversely. Therefore, the change in the temperature gradient of the single crystal ingot is not uniform. In any case, the temperature distribution of the single crystal ingot is changed, and new internal stress is surely generated.

Therefore, if the heat treatment is performed on the heat insulating material at a temperature of 2250 占 폚 or higher, preferably 2450 占 폚 or higher prior to the crystal growth, the change of the material properties due to exposure to high temperature during growth and the reactivity of the sublimated gas component have. The mechanism by which the reactivity with the sublimated gas is suppressed is not clear, but it is considered that the graphite of the graphite fiber has a high degree of effect. As a method of heat treatment of the heat insulating material, there is a method in which one lot of the heat insulating material is integrated and treated in an inert atmosphere, or a heat treatment is performed using an induction heating furnace for crystal growth in a state where the heat insulating member processed for growth is assembled with a crucible , But there is no particular limitation. Although the upper limit of the treatment temperature is not particularly limited, sublimation of the graphite itself occurs in an ultra-high temperature environment, and the cost is also disadvantageously lowered to about 3000 ° C.

Another major cause of the change in the temperature distribution of the ingot during crystal growth is that it passes through the graphite member forming the crucible from the high temperature raw material side to the low temperature SiC single crystal side, . Generally, in the single crystal growth of SiC, the temperature of the crucible is not constant and involves a change. There are cases such as active temperature control for growth rate control and passive variation due to a state change in the crucible accompanying growth, but in any case, the temperature change is inevitable. With this temperature change, the amount of heat incident on the ingot side also changes, and as a result, the temperature distribution inside the ingot also changes. Further, even if the temperature is kept constant, the side surface area of the ingot increases with the growth of the SiC single crystal. Therefore, the amount of heat incident from the single crystal ingot side also changes, and the temperature distribution inside the ingot changes.

In order to suppress this temperature change, a member having a higher thermal conductivity (hereinafter referred to as a heat flux control member) than the member forming the longitudinally-set mounting region of the crucible cap on which the seed crystal is provided (hereinafter referred to as a heat flux control member) It is effective to reduce the heat flux from the crucible to the seed crystal mounting region from the ingot and the ingot by increasing the heat flux flowing from the crucible to the heat flux control member. At this time, the thermal conductivity of each member is effective when the relationship between the room temperature thermal conductivity of the member forming the longitudinal crystal setting area =? ₁ and the room temperature thermal conductivity of the heat flux control member = ₂ is 1.1 x? ₁ ?? ₂ . As a more preferable condition, the aforementioned room temperature thermal conductivity is in a relationship of 1.2 x? ₁ ?? ₂ . Although the upper limit value of the value of? ₂ is not specially set, if the ratio of the room temperature thermal conductivity to? ₁ exceeds 1.8, the temperature distribution on the growth surface also changes greatly and stable growth becomes difficult. In order to control the heat input from the side of the ingot and suppress the change in the temperature distribution of the ingot during the crystal growth, it is more effective to arrange the heat flux control member on the outer side of the longitudinally arranged mounting area where the seed crystals are provided. The heat flux flowing from the crucible to the heat flux control member may be increased to control the heat input to the side of the ingot even if the heat flux control member is arranged so as to partially overlap the outer periphery of the region.

Another method of suppressing the temperature change of the ingot is to increase the thermal conductivity of the atmospheric gas in the surrounding space surrounding the crucible for crystal growth, which is provided in the double quartz tube, and to increase the amount of heat dissipated from the crucible into the atmosphere. Hydrogen is generally known as a gas component of high thermal conductivity, but hydrogen is undesirable because it affects graphite and SiC. As the gas species in this case, helium is optimum, an intended effect is generated when the atmosphere contains 10 vol% or more of helium, and a larger effect is obtained when the helium is 20 vol% or more. The upper limit value of helium is inevitably determined from the relationship between the cost and the electric conductivity required for the wafer (that is, the dopant concentration in the atmosphere). However, when the concentration of the helium gas is 50 vol% or more, So that stable growth becomes difficult, which is also undesirable.

Example

Hereinafter, the present invention will be described in detail based on examples and comparative examples.

Fig. 4 is a device for growing a single crystal by an improved type Lelie process, which is used for manufacturing an SiC single crystal ingot for producing SiC single crystal wafers according to Examples and Comparative Examples of the present invention. Crystal growth is performed by sublimation of the sublimation raw material 3 by induction heating and recrystallization on the seed crystal 1. The seed crystal 1 is provided on the inner surface of a graphite lid (crucible lid) 6, and the sublimation raw material 3 is filled in the graphite crucible 4. [ The graphite crucible 4 and the graphite lid 6 are coated with a heat insulating material 5 for heat shielding and are installed on the graphite support pedestal 7 inside the double quartz tube 8. The interior of the quartz tube 8 is evacuated to less than 1.0 x 10 <" ⁴ > Pa by using a vacuum evacuation device and a pressure control device 12 and then a high purity Ar gas with a purity of 99.9999% A high frequency current is supplied to the work coil 9 while the pressure in the quartz tube is maintained at 80 kPa by using the vacuum exhaust device and the pressure control device 12 to control the flow of the graphite crucible lower portion Temperature to 2400 占 폚. Nitrogen gas (N ₂ ) was similarly introduced into the mass flow controller 11 through the pipe 10 to control the nitrogen partial pressure in the atmospheric gas to adjust the concentration of the nitrogen element introduced into the SiC crystal. The measurement of the crucible temperature is performed by the radiation thermometers 13a and 13b by providing an optical path with a diameter of 2 to 15 mm in the heat insulating material 5 at the top and bottom of the crucible. The crucible upper temperature was set to the seed crystal temperature, and the crucible lower temperature was set to the raw material temperature. Thereafter, the pressure in the quartz tube was reduced to 0.8 kPa to 3.9 kPa, which is a growth pressure, over about 15 minutes, and this state was maintained for a predetermined time to perform crystal growth.

(Example 1)

First, a crucible in which raw materials and seed crystals were not loaded, and a commercially available graphite felt which was heat-treated at 2000 ° C were prepared, and the graphite felt was heat-treated prior to crystal growth. Thereafter, the crucible and the heat insulating material were assembled in the same manner as in the growth, and were placed inside a quartz tube as in the above-described preparation for growth, and vacuum evacuation was performed. Subsequently, a high-purity Ar gas was introduced into the quartz tube while being controlled by a mass flow controller through a pipe, and a high-frequency current was supplied to the work coil while the pressure in the quartz tube was maintained at 80 kPa so that the lower and upper portions of the graphite crucible reached the target temperature And this state was maintained for 12 hours to complete the heat treatment. The heat treatment temperature of the graphite-made felt of Example 1 was 2300 占 폚 and heat treatment was performed in a high-purity argon atmosphere for 12 hours.

Next, the crystal growth of Example 1 using the crucible and the felt described above will be described. As the seed crystal 1, a SiC single crystal wafer composed of a single polytype of 4H having a (0001) plane as the principal plane and a <0001> axis oriented 4 ° in the <11-20> direction and having a diameter of 101 mm was used. The growth pressure is 1.33 kPa, and the partial pressure of nitrogen gas is 180 Pa to 90 Pa. The nitrogen partial pressure was varied to maintain optimal conductivity throughout the ingot. Here, compared with general graphite felts, the felt subjected to the high-temperature heat treatment as in the present embodiment is less susceptible to deterioration and can suppress the heat input fluctuation from the side of the single crystal ingot, so that the SiC single crystal wafer having low dislocation density and low elastic deformation Manufacturing becomes possible.

The SiC single crystal ingot thus obtained had a diameter of 106.8 mm and a height of 34.8 mm. Thus, a SiC single crystal ingot for manufacturing a 100 mm-diameter wafer of Example 1 was produced.

The obtained ingot was processed by a known processing technique into 8 mirror-finished wafers having a (0001) plane with an off angle of 4 degrees and a thickness of 0.4 mm to evaluate the quality. The wafer numbers 11 to 18 are counted in order starting from the final position. Here, the relative positions of the wafers 11 to 18 with respect to the ingot height are 0.2 to 0.9 and 0.1 to 0.1, respectively. That is, the relative position 0 corresponds to the seed crystal surface, and 1.0 corresponds to the height of the ingot.

Raman shift was measured by the above-described method using the Raman spectrometer (NRS-7100, manufactured by Nippon Bunko Co., Ltd., resolution: 0.05 cm ^{& lt} ; ^-1 &gt; Thereafter, the melted KOH etching was performed, and the BPD density and the TSD density were measured by an optical microscope. Here, according to the method described in J.Takahashi et al., Journal of Crystal Growth, 135, (1994), 61-70, a sample is immersed in molten KOH at 530 캜 for 10 minutes, and the shell- BPD, and middle / large hexagonal pits were TSD, and dislocation defects were classified from the etch pit shape. An example of observation of etch pits is shown in Fig. As the calculation method of the dislocation density, as shown in Fig. 3, the pit size is large for the TSD so that the point is the center of the measurement area at 52 points symmetrical in the up and down and left and right directions in the figure, And the etch pits were counted in a measurement area of 663 mu m x 525 mu m for TSD other than TSD, and the average value was determined as the dislocation density of the wafer. The value of d shown in the figure is 3.25 mm for 100 mm wafers and 4.8 mm for 150 mm wafers. However, by selecting an appropriate d for the diameters other than the above, the dislocation density can be accurately Can be evaluated.

Table 1 shows the above evaluation results. 18 wafers had a BPD density of 500 pieces / cm 2 or less, and a total density of BPD and TSD of less than 1,000 pieces / cm 2, and thus had the characteristics of the scope of the present invention.

(Example 2)

Next, a second embodiment will be described. Also in Example 2, one commercially available graphite felt heat-treated at 2000 占 폚 was prepared in the same manner as in Example 1, and the graphite felt was heat-treated prior to crystal growth. The heat treatment temperature of the graphite-made felt of Example 2 was 2500 占 폚, and the treatment was carried out in the same manner as in Example 1 except for this point.

The crystal growth method of Example 2 using the crucible and the felt described above is the same as that of the first embodiment. Although the SiC single crystal wafer of low dislocation density and low elastic deformation can be produced for the same reason as in Example 1 in Example 2, it is possible to produce a SiC single crystal wafer having a low dislocation density and low elastic deformation by using the graphite- The excessive deterioration is suppressed, and this is effective for reducing the BPD in particular.

Thus, an ingot of SiC single crystal for manufacturing a wafer having a diameter of 105.7 mm and a height of 37.9 mm and having a diameter of 100 mm was produced.

The obtained ingot was processed into 8 mirror-finished wafers having relative positions in the same ingot as in Example 1 (21 to 28 times in order from the end, and the quality was evaluated). The evaluation results are shown in Table 2. The wafers Nos. 27 to 28 had the BPD density, the BPD and TSD total densities of the inventive range.

(Example 3)

Next, the method for producing crystals of Example 3 will be described. In Example 3, graphite crucible 24 having the structure shown in the schematic diagram of Fig. 5 was used for crystal growth. In this graphite crucible 24, the seed crystals 21 are provided on the inner surface side of the crucible cover 26. The crucible cover 26 is made of a high thermal conductivity graphite material The heat flux control member 27 of the first embodiment is disposed. Here, the seed crystal 21, the room temperature of the crucible cover (26) forming a seed crystal installation area, which is installed a thermal conductivity λ = ₁ and a room temperature thermal conductivity of the heat flux = λ ₂ of the control member 27 is 1.15 × λ ₁ ≤λ ₂ . In this Example 3, the graphite-form felt was also subjected to heat treatment at 2300 占 폚 in the same manner as in Example 1, prior to crystal growth. The crystal growth conditions other than the structure of the crucible including the heat flux control member 27 were the same as in Example 1 to produce a single crystal ingot. The crucible structure of Example 3 is a structure in which the heat flux is not excessively incident on the ingot under the condition that the heat flux along the side surface of the single crystal ingot is increased. This crucible structure makes it possible to manufacture SiC single crystal wafers of low dislocation density and low elastic deformation because the heat input fluctuation from the single crystal ingot side can be suppressed.

In the third embodiment, a crucible having the above-described heat flux control member 27 is used, and the heat insulating material is heat-treated in the same manner as in the first embodiment. The SiC single crystal ingot thus obtained had a diameter of 105.5 mm and a height of 37.8 mm.

The obtained ingot was processed into 8 mirror-finished wafers having a relative position in the same ingot as in Example 1 (31 to 38 times in order from the end, and the quality was evaluated). The evaluation results are shown in Table 3. Thirty-third to thirty-eighth wafers have the characteristics in the scope of the present invention. Particularly, the wafers 34 to 38 are inferior to the total density of BPD and TSD by less than 500 pieces / cm &lt; 2 &gt;

(Example 4)

Next, the method for producing crystals of Example 4 will be described. In Example 4, graphite crucible 24 having the structure shown in the schematic diagram of Fig. 6 was used for crystal growth. In the graphite crucible 24, the seed crystals 21 are provided on the inner surface side of the crucible cover 26 and surround the periphery of the crucible cover 26 while contacting with the outer circumferential side of the crucible cover 26, And a heat flux control member 27 made of a high thermal conductivity graphite material is disposed so as to extend from the outer side of the sidewall of the crucible. Here, the seed crystal 21 has a thermal conductivity at room temperature of the crucible cover (26) forming a seed crystal installation area to be installed = λ ₁ and λ ₂ of the room temperature thermal conductivity = heat flux control member 27 is 1.3 × λ ₁ ≤λ ₂ . In Example 4, heat treatment of the graphite felt was also performed prior to crystal growth. That is, for Example 4, heat treatment of graphite felt was carried out at 2500 ° C under the same condition as in Example 2. The crystal growth conditions other than the structure of the crucible including the heat flux control member 27 were the same as in Example 1 to produce a single crystal ingot.

In the fourth embodiment, a crucible designed for the same purpose as in the third embodiment is used, and the heat insulating material is heat-treated in the same manner as in the second embodiment. As a result, the heat input fluctuation from the side of the single crystal ingot is more effectively suppressed, so that a SiC single crystal wafer with a lower dislocation density and a lower elastic deformation than the above-mentioned embodiment can be manufactured. The SiC single crystal ingot thus obtained had a diameter of 105.7 mm and a height of 39.6 mm.

The obtained ingot was processed into 8 mirror-finished wafers having relative positions in an ingot similar to that of Example 1 (41 to 48 times in order from the end of the final stage), and the quality was evaluated. The evaluation results are shown in Table 4. All the wafers have the characteristics of the present invention, and in particular, the wafers 44 to 48 are inferior to the total density of BPD and TSD by less than 300 / cm &lt; 2 &gt;.

(Example 5)

Next, Embodiment 5 will be described. In Example 5, a wafer having a diameter of 150 mm was produced. For the crystal preparation of Example 5, a crucible and a heat insulating material of a size corresponding to an ingot for a 150 mm diameter wafer were used, but the basic structure thereof is as shown in Fig. In the graphite crucible 24, a seed crystal 21 is provided at a substantially central portion on the inner surface side of the crucible cover 26, and a seed crystal is provided on the outside of the crucible cover 26, A heat flux control member 27 made of a high thermal conductive graphite material is disposed so as to surround the heat flux control member 27. [ Here, the crucible cover (26) at least a seed crystal (21) has a thermal conductivity at room temperature of forming the seed crystals installation area to be installed member = λ ₁ and a heat flux is a room temperature thermal conductivity = λ ₂ of the control member (27), Example 4 and likewise on the 1.3 × λ ₁ ≤λ ₂ relationship. In Example 5, heat treatment of the graphite felt was also performed prior to crystal growth. With respect to Example 5, heat treatment of graphite felt was carried out at 2500 占 폚 under the same condition as in Example 2. [

As the seed crystals of Example 5, a SiC single crystal wafer composed of a single polytype of 4H having a (0001) plane as the principal plane and a <0001> axis oriented 4 ° in the <11-20> direction and having a diameter of 154 mm Used. The crystal growth conditions other than the structure of the crucible including the termination definition size and the heat flux control member 27 were the same as those in Example 1, and single crystal ingots were produced.

Example 5 is a production example of a single crystal ingot for manufacturing a wafer having a diameter of 150 mm, but the manufacturing method is basically the same as that of Example 4, and even when the ingot is different in diameter, the low dislocation density and the low elasticity A modified SiC single crystal wafer can be manufactured. Thus, a SiC single crystal ingot for manufacturing a 150 mm-diameter wafer of Example 5 was produced. The obtained SiC single crystal ingot had a diameter of 158.1 mm and a height of 42.6 mm.

The obtained ingot was processed into 8 mirror-finished wafers having relative positions in the same ingot as in Example 1 (51 to 58 times in order from the end of the termination), and the quality was evaluated. The evaluation results are shown in Table 5. All the wafers have the characteristics in the scope of the present invention. Particularly, the wafers 55 to 58 are very good because the total density of BPD and TSD is less than 300 pieces / cm &lt; 2 &gt;.

Homo-epitaxial growth was performed on the Si surface of the wafer No. 58. The epitaxial growth conditions were as follows: the growth temperature was 1550 ° C, the flow rates of silane (SiH ₄ ), propane (C ₃ H ₈ ) and hydrogen (H ₂ ) were 32 cc / min, 21 cc / min and 150 L / The active layer having a thickness of about 5 탆 was grown at a flow rate at which the carrier concentration in the active layer was 1 x 10 ¹⁶ cm ^-3 . It can be seen that the surface of the epitaxial film is formed to have a good epitaxial thin film over the entire surface, which is very flat and has very few epitaxial defects such as caret. Further, a MOSFET structure was fabricated on this epitaxial wafer, and the breakdown voltage of the gate insulating film was measured, which was about 820V.

(Example 6)

Next, the method for producing crystals of Example 6 will be described. In Example 6, a graphite crucible having the structure shown in the schematic diagram of Fig. 8 was used for crystal growth. In the graphite crucible 24, the seed crystals 21 are provided on the inner surface side of the crucible cover 26, and a part of the sidewall of the graphite crucible is provided on the outer circumferential side of the crucible cover 26, A heat flux control member 27 is disposed. Here, the room temperature thermal conductivity of the crucible cover 26 forming the longitudinal crystal mounting area where the seed crystals 21 are provided = ₁ and the room temperature thermal conductivity of the heat flux control member 27 = ₂ is 1.4 x? ₁ ? ₂ &lt; / RTI &gt; Further, in Example 6, heat treatment of the graphite felt was also performed prior to crystal growth. With respect to Example 4, heat treatment of graphite felt was carried out at 2500 ° C under the same condition as in Example 2. [

In this Example 6, the crystal growth conditions were the same as in Example 1, but He gas was mixed into the atmosphere gas in the surrounding space surrounding the periphery of the graphite crucible provided in the quartz tube 8. The content of He gas is 16 vol%. In Example 6, a crucible designed for the same purpose as in Example 4 and a graphite felt heat-treated under the same conditions as in Example 4 are used. Further, the atmosphere gas is converted into high thermal conductivity, thereby further reducing the temperature gradient. The SiC single crystal ingot thus obtained had a diameter of 108.7 mm and a height of 56.3 mm.

The obtained ingot was processed into 8 mirror-finished wafers having relative positions in the same ingot as in Example 1 (61 to 68 times in order from the end, and the quality was evaluated). The evaluation results are shown in Table 6. The wafers No. 63 to No. 68 are characterized by the BPD density and the total density of BPD and TSD in the range of the present invention. Among them, the wafers No. 66 to No. 68 are less than 500 pieces / cm 2 in the total density of BPD and TSD , Very good. Compared with Example 4, a slightly dislocation density was found to be high, but a wafer with extremely small elastic deformation could be produced as indicated by the Raman exponent. It is considered that SiC single crystal wafers with low dislocation density and low elastic deformation can be produced by optimizing the crucible structure, gas composition, and crystal growth conditions in combination.

(Comparative Example 1)

Next, Comparative Example 1 will be described. In Comparative Example 1, growth was carried out by using one type of commercially available graphite felt heat-treated at 2000 占 폚. The structure of the crucible is the same as that of the first embodiment. The crystal growth method of Comparative Example 1 is also substantially the same as that of Embodiment 1. In Comparative Example 1, since general graphite felt and graphite crucible are used, the heat input fluctuation from the single crystal ingot side is not suppressed, and a SiC single crystal wafer can not be produced which satisfies both low dislocation density and low elastic strain. The SiC single crystal ingot thus obtained had a diameter of 107.4 mm and a height of 35.2 mm.

The obtained ingot was processed into 8 mirror-finished wafers having relative positions in an ingot similar to that of Example 1 (71 to 78 times in order from the end, and the quality was evaluated). The evaluation results are shown in Table 7. When the properties of the wafers are evaluated for each evaluation item, the Raman index has a value in the range of the present invention, except for 71 wafers. However, the dislocation density is high in all wafers, and particularly the BPD density is high. As a result, even one wafer having the characteristics in the scope of the present invention can not be obtained.

Homo-epitaxial growth was then performed on the Si surface of the wafer No. 78 under the same conditions as in Example 6 to grow an active layer having a thickness of about 5 占 퐉. Surface morphology disorder such as punching was observed on the surface of the epitaxial film, and many epitaxial defects such as carats were observed. The MOSFET structure was fabricated on the epitaxial wafer, and the breakdown voltage of the gate insulating film was measured.

(Comparative Example 2)

Next, Comparative Example 2 will be described. In Comparative Example 2, growth was carried out by using one type of commercially available graphite felt heat-treated at 2000 占 폚. The outline of the structure of the crucible is the same as that of the first embodiment. The crystal growth of Comparative Example 2 was carried out in substantially the same manner as in Example 1, and the obtained SiC single crystal ingot had a diameter of 103.1 mm and a height of 16.5 mm. Comparative Example 2 is also the same as Comparative Example 1, and since general graphite felt and graphite crucible are used, heat input fluctuation from the single crystal ingot side surface is not suppressed. Either the low dislocation density or the low elastic deformation may partially be realized due to the difference in the growth conditions, but a SiC single crystal wafer compatible with them can not be produced.

Since the ingot obtained was low in height, it was difficult to manufacture wafers corresponding to No. 81 and No. 88. For this reason, six mirror-finished wafers having relative positions 82 to 87 were processed to evaluate the quality. The evaluation results are shown in Table 8. In Table 8, the wafers Nos. 84 to 87 have baseline dislocation densities in the range of the present invention. However, the Raman exponent is high in all the wafers, so that even one wafer having the characteristics in the scope of the present invention can not be obtained.

Homo-epitaxial growth was then carried out on the Si surface of the 87th wafer under the same conditions as in Example 6 to grow an active layer having a thickness of about 5 mu m. On the surface of the epitaxial film, epitaxial defects such as carat were more abundant than the wafer No. 58 in Example 5, but significantly fewer in comparison with the wafer No. 78 in Comparative Example 1. However, surface morphology disorder such as punching was observed at high density. This is thought to be caused by the fact that the surface step state of the wafer is disturbed by the elastic deformation. The MOSFET structure was fabricated on this epitaxial wafer, and the breakdown voltage of the gate insulating film was measured.

(Comparative Example 3)

Next, Comparative Example 3 will be described. In Comparative Example 3, a commercially available graphite felt heat-treated at 2000 占 폚 was used to prepare a wafer having a diameter of 150 mm. The structure of the crucible and the heat insulator used for the growth of the ingot for a 150 mm diameter wafer is a topology of the crucible and the heat insulator used in Example 1 and has a size corresponding to an ingot having a diameter of 150 mm. The crystal growth method of Comparative Example 3 is also substantially the same as that of the first embodiment. Since the general graphite felt and the graphite crucible are used in Comparative Example 3, the heat input fluctuation from the single crystal ingot side is not suppressed, and a SiC single crystal wafer can not be produced which satisfies both low dislocation density and low elastic strain. The SiC single crystal ingot thus obtained had a diameter of 158.5 mm and a height of 33.2 mm.

The obtained ingot was processed into 8 mirror-finished wafers having relative positions in the same ingot as in Example 1 (91 to 98 times in order from the end of the termination), and the quality was evaluated. The evaluation results are shown in Table 9. When the properties of the wafers are evaluated for each evaluation item, the TSD has a value within the scope of the present invention. However, the BPD is high for all wafers and the Raman index is also usually high. As a result, it can be seen that even one wafer having the characteristics of the present invention can not be obtained.

1: seed crystal (SiC single crystal)
2: SiC monocrystalline ingot
3: Sublimation raw material (SiC powder raw material)
4: Graphite crucible
5: Insulation
6: Graphite cover (crucible cover)
7: graphite support base (crucible support and shaft)
8: Double quartz tube
9: Work coil
10: Piping
11: Mass flow controller
12: Vacuum exhaust system and pressure control system
13a: Radiation thermometer (for crucible upper part)
13b: Radiation thermometer (for crucible bottom)
21: seed crystal (SiC single crystal)
22: SiC single crystal ingot
23: Sublimation raw material (SiC powder raw material)
24: graphite crucible
25: Insulation
26: Graphite cover (crucible cover)
27: Heat flux control member

Claims (20)

delete delete delete delete delete delete delete delete delete delete delete delete delete Wherein a silicon carbide single crystal is grown on a seed crystal accommodated in a crucible by a sublimation recrystallization method to form a silicon carbide single crystal having a base surface dislocation density of not more than 1000 / cm 2, a penetration spiral dislocation density of not more than 500 / cm 2, A method of producing a silicon carbide single crystal ingot for producing a silicon carbide single crystal wafer having a size of 150 mm or more and which is used as a heat insulating material disposed around a crucible used for crystal growth, A method of manufacturing a silicon carbide single crystal ingot characterized by preventing heat input from a single crystal ingot side face during growth and crystal growth while suppressing a change in the temperature distribution of the single crystal ingot. Wherein a silicon carbide single crystal is grown on a seed crystal accommodated in a crucible by a sublimation recrystallization method to form a silicon carbide single crystal having a surface bottom density of 500 or less / cm 2, a through helix dislocation density of 300 / cm 2 or less and a Raman index of 0.15 or less A method for producing a silicon carbide single crystal ingot for producing a silicon carbide single crystal wafer of 100 mm or more, which is used as a heat insulating material disposed around a crucible used for crystal growth, comprising a graphite felt subjected to a high temperature heat treatment at a temperature of 2250 캜 or higher, A method of manufacturing a silicon carbide single crystal ingot characterized by preventing heat input from a single crystal ingot side face during growth and crystal growth while suppressing a change in the temperature distribution of the single crystal ingot. 16. The method of producing a silicon carbide single crystal ingot according to claim 14 or 15, wherein the temperature of the high temperature heat treatment is 2450 DEG C or more. Claim 14 or claim 15, wherein with respect to the room temperature thermal conductivity λ ₁ of the member forming a seed crystal installation region of the crucible cover to be a seed crystal is provided, the room temperature thermal conductivity λ ₂ having the relationship 1.1 × λ ₁ ≤λ ₂ Wherein the heat flux control member is provided along an outer periphery of the longitudinal crystal mounting region. The method of manufacturing a silicon carbide single crystal ingot according to claim 17, wherein the room temperature thermal conductivity? ₂ of the heat flux control member satisfies a relationship of 1.2 x? ₁ ?? ₂ . 16. The method of producing a silicon carbide single crystal ingot according to claim 14 or 15, wherein the atmospheric gas in the surrounding space surrounding the surrounding crucible for crystal growth contains 10 vol% or more of He gas. The method of manufacturing a silicon carbide single crystal ingot according to claim 19, wherein the atmospheric gas in the peripheral space contains 20 vol% or more of He gas.

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