KR101812490B1 - Designs and methods to implement surface mounting structures of SIW - Google Patents

Abstract

The present invention relates to a design and a structure of a high-frequency component used in a wireless communication system using a millimeter wave. Especially, it is to improve the electrical characteristics and miniaturization of a wireless communication system, by making a millimeter wave device designed by using a substrate integrated waveguide have a shape suitable for surface mounting and an integrated circuit. The high-frequency component includes a multilayer substrate; an input/output terminal; via holes; a via pad; a substrate integrated waveguide; and a co-planar waveguide (CPW) line.

Description

TECHNICAL FIELD [0001] The present invention relates to a surface mounting structure for a substrate integrated waveguide,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a structure of a substrate integrated waveguide for a high frequency used in a wireless communication system using a millimeter wave.

Mobile traffic is expected to double every year due to the entry of hyper connections and the emergence of big data due to the evolution of new paradigm of mobile smart devices and services. The existing 4G mobile communication system with limited additional frequency can not accommodate the exponential increase in capacity due to the explosion of mobile traffic. Therefore, the 5G mobile communication technology is expected to use the millimeter wave band which can secure the wide bandwidth.

In order to develop this fifth generation mobile communication technology, development of related high-frequency devices using millimeter wave must follow. However, in a wireless communication system using a millimeter wave, it is expected that key elements such as a circulator or a filter will have a great difficulty in miniaturization and cost reduction. Particularly, in the case of components designed using lumped elements such as L, C, and R, the design of the elements in the millimeter wave band is impossible due to the frequency limit of each lumped element.

In the case of the millimeter wave band, a passive element can be designed using a waveguide as shown in FIG. Since the waveguide itself has a high quality factor (Q factor), it is possible to design the device with excellent electrical characteristics. However, it is not suitable for mass production of a system using the device because the size of the device is large and complicated and the manufacturing cost is relatively high.

Passive devices such as filters and couplers can be designed in the form of planar transmission lines such as microstrip in the millimeter wave band but have a low quality factor (Q factor) and high radiation It is difficult to obtain excellent performance owing to a radiation loss or the like.

In order to develop and commercialize the 5th generation mobile communication technology, it is necessary to develop a millimeter wave device having excellent electrical characteristics that can be implemented at a competitive price. Particularly, in the case of a circulator having difficulty in modularization with adjacent components due to a strong internal magnetic field, a high manufacturing cost due to current technical limitations may have a great influence on the evolution of commercialization of the fifth generation mobile communication.

It is desirable to have a small size surface mount (SMD) structure in order to use a millimeter-wave high-frequency device in large quantities in commercial mobile communications. However, the waveguide structure as shown in FIG. 4 is difficult to be miniaturized and can not be converted to the SMD structure. The structure of the microstrip type as shown in FIG. 5 not only has a high radiation loss upon switching to the SMD structure, It is difficult to avoid deterioration of the electrical characteristics due to the electrical loss characteristic.

That is, in order to use a high-frequency component in a mobile communication system using a millimeter-wave band, the following conditions must be satisfied.

- Excellent electrical characteristics.

- Suitable for mass production

- The manufacturing cost should be low.

If a high-frequency device is designed using a waveguide having relatively good electrical characteristics and can be converted into an SMD structure suitable for mass production, two of the above conditions can be satisfied. In addition, when the waveguide is designed, the fabrication cost of the waveguide can be remarkably reduced by using the substrate integrated waveguide (SIW) technology.

The substrate integrated waveguide (SIW) refers to an integrated implementation of a rectangular waveguide on a printed circuit board. The upper ground plane and the lower ground plane of the printed circuit board constitute a broad wall of the waveguide, and the series of via holes connecting the upper and lower surfaces constitute a narrow wall. FIG. 5 is an example of a substrate integrated waveguide (SIW) implemented on a printed circuit board, and FIG. 6 is an example of a common waveguide for comparison with FIG. As shown in FIG. 5, the substrate integrated waveguide (SIW) is different from a general waveguide in that a transition into a transmission line having a planar structure such as a microstrip or a coplanar waveguide (CPW) This is easy. Therefore, by using the substrate integrated waveguide (SIW), it is possible to fabricate a filter or passive device requiring a high quality factor (Q) on a printed circuit board with a substrate integrated waveguide (SIW) (Active Devices) or other passive components can be implemented in SMD structures on planar transmission lines. The quality factor that can be obtained with a substrate integrated waveguide (SIW) is somewhat less than a general waveguide, but is much better than a quality factor that can be obtained from a planar transmission line such as a microstrip. Generally, in the millimeter wave frequency band of 28 GHz, the quality factor (Q) of the substrate integrated waveguide is 5 to 20 times better than the microstrip quality factor.

That is, fabrication of a millimeter wave device using a substrate integrated waveguide (SIW) can remarkably reduce manufacturing cost compared to a conventional waveguide, and can realize a device having an excellent electrical characteristic as compared with a conventional planar transmission line structure .

Such a substrate integrated waveguide (SIW) requires conversion to a planar transmission line for connection to other elements on a printed circuit board. In general, a microstrip is used as a planar transmission line connected to a substrate integrated waveguide. This is because the design of the transition structure using the microstrip is easier and simpler than the design of the transition structure using the other transmission line.

7 is an example of a substrate integrated waveguide. The two metal conductive layers 710 and 730 and the substrate 720 having a dielectric constant and the series of via holes 741 and 742 passing through the metal conductive layers 710 and 730 and the dielectric substrate 720 constitute a waveguide , The waveguide can deliver electromagnetic waves to frequencies above the cutoff frequency (f _{c, m n} ). The cutoff frequency of a rectangular waveguide is defined by the following formula.

( _m ? / a) ² + (n? / b) ² ) ( ² )

In the above formula, a is defined as the effective interval between a series of via holes, and b is defined by the thickness of the dielectric substrate 720. Also, the dielectric constant epsilon and the magnetic permeability mu are material constants of the dielectric substrate 720. In the substrate integrated waveguide, the two metal conductive layers 710 and 730 constitute a broad wall of a waveguide, and the series of via holes 7 constitute a narrow wall of the waveguide.

The electric field of the electromagnetic wave in the substrate integrated type waveguide through which the electric signal of the TE10 mode flows is the maximum at the center thereof and becomes minimum at the interface of the series of via holes 741 and 742. [ Therefore, when a quasi-TEM mode microstrip is connected to the center of the substrate integrated waveguide, the transition of the high frequency energy due to the electric field between the substrate integrated waveguide and the microstrip can be obtained.

8 is an example of a transition structure using a microstrip. The transition structure 820 is positioned between the substrate integrated waveguide 810 and the microstrip 830 for efficient transition. In general, such a transition structure has a quarter length (quarter wavelength) physical length at a center frequency to be used, and for matching different impedances of a microstrip and a substrate integrated waveguide (SIW) (820) controls the line width of the portion connected to the substrate integrated waveguide (SIW).

Transition from such a substrate integrated waveguide (SIW) 830 to the microstrip 810 is easy and simple, but in the millimeter wave band, the microstrip structure causes a high radiation loss. Therefore, a planar transmission line of the CPW (Co-Planar Waveguide) structure can be used to minimize the radiation loss.

When the CPW structure is used as a planar transmission line, it is possible to design a transition structure by exciting a magnetic field inside a substrate integrated waveguide. 9 shows a transition structure 920 from a CPW line 910 to a substrate integrated waveguide 930 using a single post 940. FIG. The transition structure 920 has a physical length of about 1/4 wavelength or half wavelength at a center frequency of a desired frequency band, and at the end of the transition structure, an upper surface and a lower surface of the substrate integrated waveguide A single post 940 is provided to completely or partially connect the first and second posts 940 and 940 to generate a magnetic field in the substrate integrated waveguide.

However, the transition structure from such a substrate integrated waveguide (SIW) 910 to the CPW 930 is difficult to design reliably because its electrical characteristics are sensitive to the precision of the product dimensions.

In order to obtain an efficient transition structure from a CPW structure with low radiation loss to a substrate integrated waveguide (SIW), it is possible to design a transition structure that compromises the CPW structure and the microstrip structure. Fig. 10 shows an example of the excel-type structure. The open spacing on both sides of the CPW line 1010 is designed to have a transition structure 1020 in the form of a funnel-like opening toward the substrate integrated waveguide (SIW) 1030 so that the impedance of the waveguide and the CPW The funnel shape is adjusted so that the impedances of the CPW lines are matched with each other, and the funnel-shaped CPW line is designed to have a length of 1/4 wavelength.

On the other hand, in general, in order for an electronic part to be used in a commercial mobile communication system, its external shape must be suitable for mass production. Currently, the most suitable structure for electronic components is a structure using Surface Mount Technology. Ultimately, millimeter-wave high-frequency components that use substrate-integrated waveguide (SIW) technology should also have a form suitable for SMT. In the SMD structure, since the electrical signal is basically transmitted in the TEM or quasi-TEM mode, the signal of the TE mode in the substrate integrated waveguide must be transited to the TEM or quasi-TEM mode. Such a transition must include a constant physical length transition structure for impedance transformation as mentioned above, which increases the size of the part. In addition, the transition structure using the planar transmission line causes a high radiation loss in the millimeter wave band, thereby increasing the insertion loss of the entire high frequency component.

SUMMARY OF THE INVENTION The present invention is directed to simplifying and minimizing the transition structure from the substrate integrated waveguide to the planar transmission line so that the high frequency component fabricated using the substrate integrated waveguide technology can be used in a system using surface mount components or surface mount components will be. Thereby improving its electrical characteristics and reducing its size.

According to one aspect of the present invention, the lower conductive layer 150, the second dielectric substrate 140, the intermediate conductive layer 130, the first dielectric substrate 120, and the upper conductive layer 110, which are sequentially stacked, A multilayer substrate; An input / output terminal 151 formed on the lower conductive layer 150; A plurality of first via holes (162 to 167) penetrating from the upper conductive layer (110) to the lower conductive layer (150); A second via hole 161 penetrating from the upper conductive layer 110 to the input / output terminal 151; A third via hole 168 or 169 extending from the intermediate conductive layer 130 to the lower conductive layer 150 so that a signal transmitted through the input and output terminal 151 and the second via hole 161 is transmitted to the lower conductive layer 150, The third via hole (168, 169) disposed at a position to prevent propagation through the dielectric substrate (140); A via pad 131 formed in the intermediate conductive layer 130, the via pad 131 being electrically connected to the second via hole 161; A substrate integrated waveguide (SIW) provided by the upper conductive layer 110, the intermediate conductive layer 130, and the plurality of first via holes 162 to 167; And a CPW (Co-planar waveguide) line 111 formed at one end of the substrate integrated waveguide and electrically connected to the second via hole 161. [ have.

Assuming that the length of the CPW line 111 is a first length when the impedance of the substrate integrated waveguide is matched to the impedance of the CPW line 111, The length of the CPW line 111 may be shorter than the first length.

The impedance of the substrate integrated waveguide may be matched to the impedance of the coupling structure of the CPW line 111, the second via hole 161, and the via pad 131, The open spacings 112 and 113 formed on both sides of the CPW line 111 may have a shape that is opened from one end of the CPW line 111 toward the integrated circuit waveguide.

In this case, the dimensions of the second via hole 161, the dimensions of the CPW line 111, and the dimensions of the via pad 131 are (1) the impedance of the substrate integrated waveguide is (2) The second via hole 161, and the via pad 131. In this case,

According to another aspect of the present invention, there is provided a multilayer substrate including a sequentially stacked lower conductive layer 150, a first dielectric substrate 120, and an upper conductive layer 110; An input / output terminal 151 formed on the lower conductive layer 150; A plurality of first via holes (162 to 167) penetrating from the upper conductive layer (110) to the lower conductive layer (150); A second via hole 161 penetrating from the upper conductive layer 110 to the input / output terminal 151; A substrate integrated waveguide (SIW) provided by the upper conductive layer 110, the lower conductive layer 150, and the plurality of first via holes 162 to 167; And a CPW (Co-planar waveguide) line 111 formed at one end of the substrate integrated waveguide and electrically connected to the second via hole 161 .

Assuming that the length of the CPW line 111 is a first length when the impedance of the substrate integrated waveguide is matched to the impedance of the CPW line 111, The length of the CPW line 111 may be shorter than the first length.

The CPW line 111 and the second via hole 161 may be formed in the same manner as the CPW line 111 so that the impedance of the substrate integrated waveguide can be matched to the impedance of the coupling structure of the CPW line 111 and the second via hole 161, The open spacings 112 and 113 formed on both sides may have a shape that is opened at one end of the CPW line 111 toward the substrate integrated waveguide.

The dimension of the second via hole 161 and the dimensions of the CPW line 111 are set so that the impedance of the CPW line 111 and the second via hole 161 To match the impedance due to the coupling structure of the input / output terminal.

According to one aspect of the present invention, there can be provided a method of manufacturing a high frequency electric device, which comprises the above-described second dielectric substrate 140 and the intermediate conductive layer 130. This method includes the step of forming the third via holes 168 and 169 on the first substrate including the lower conductive layer 150, the second dielectric substrate 140, and the intermediate conductive layer 130 sequentially stacked A first step of forming; And forming the multilayer substrate by laminating the first dielectric substrate (120) and the upper conductive layer (110) on the first substrate after the first step, And a second step of forming the via holes 162 to 167 and the second via hole 161.

According to the present invention, it is possible to simplify the transition structure from the substrate integrated waveguide to the planar transmission line so that the high-frequency component manufactured using the substrate integrated waveguide technology can be used in a system using a surface-mounted component or a surface- By minimizing it, it is possible to improve its electrical characteristics and reduce its size.

1 is an exploded perspective view showing a structure of a surface mount type substrate integrated type waveguide according to an embodiment of the present invention.
2 is a perspective view of the surface mount type substrate integrated type waveguide shown in FIG. 1 viewed from above.
3 is a perspective view of the surface mount type substrate integrated type waveguide shown in Fig. 1 viewed from the lower side.
4 shows a waveguide-type circulator according to the prior art.
Fig. 5 shows an example of a SIW implemented on a printed circuit board.
Fig. 6 shows an example of a general waveguide for comparison with Fig.
7 shows an example of a substrate integrated waveguide according to the prior art.
8 is an example of a transition structure using a microstrip.
9 shows a transition structure from a CPW line to a substrate integrated waveguide using a single post.
Fig. 10 shows a transition structure in which the CPW structure and the microstrip structure are made up.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein, but may be implemented in various other forms. The terminology used herein is for the purpose of understanding the embodiments and is not intended to limit the scope of the present invention. Also, the singular forms as used below include plural forms unless the phrases expressly have the opposite meaning.

1 is an exploded perspective view showing a structure of a surface mount type substrate integrated type waveguide according to an embodiment of the present invention.

2 is a perspective view of the surface mount type substrate integrated type waveguide shown in FIG. 1 viewed from above.

3 is a perspective view of the surface mount type substrate integrated type waveguide shown in Fig. 1 viewed from the lower side.

1 to 3 together.

FIG. 1 shows a transition structure of a substrate integrated waveguide according to an embodiment of the present invention from a surface mounting structure to a substrate integrated waveguide (SIW).

The surface mount type substrate integrated waveguide according to an embodiment of the present invention includes a first dielectric substrate 120, a second dielectric substrate 140, an upper conductive layer 110, an intermediate conductive layer 130, 150, a series of via holes 162, 163, 164, 165, 166 and 167, an input / output terminal 151, a via hole 161, a CPW line 111, a via pad 131, 112 and 113, a substrate integrated waveguide (SIW), and via holes 168 and 169.

The via holes 161, 162, 163, 164, 165, 166, 167 may be referred to as a first via hole or a waveguide via hole and the via hole 161 may be referred to as a second via hole or an input / May be referred to as a third via hole or an isolation via hole.

The upper conductive layer 110, the intermediate conductive layer 130, and the lower conductive layer 150 are located on the upper and lower sides of the first dielectric substrate 120 and the second dielectric substrate 140, respectively. The first dielectric substrate 120, the upper conductive layer 110 and the intermediate conductive layer 130 and the series of via holes 162, 163, 164, 165, 166 and 167 constitute a substrate integrated waveguide (SIW) And an input / output terminal 151 for surface mounting is formed on the lower conductive layer 150.

 The high frequency signal inputted from the transmission line of the printed circuit board on which the substrate integrated waveguide (SIW) is mounted is inputted to the input / output terminal 151 located on the lower conductive layer 150 of the substrate integrated waveguide (SIW) And is transmitted to the upper conductive layer 110 through which the CPW line 111 is printed through the via hole 161.

At this time, the via hole 161 has a relatively high impedance and can be interpreted as a serial inductance in a circuit.

The via pad 131 located in the intermediate conductive layer 130 in the intermediate path of the via hole 161 has a relatively low impedance and can be interpreted as a parallel capacitance in the circuit.

The signal transmitted from the input / output terminal 151 of the lower conductive layer 150 to the CPW line 111 printed on the upper conductive layer 110 through the via hole 161 is transmitted to the substrate integrated waveguide SIW.

At this time, the open spacings 112 and 113 of the CPW line 111 extend in a direction perpendicular to the signal transmission direction of the CPW transmission line, and the lengths of the extended open intervals 112 and 113 are Integrated width type waveguide (SIW) defined by the distance between the via holes 162 and 163. The open spacing 112, 113 may be understood as an open slot in which a portion of the top conductive layer 110 is removed.

Since the impedance of the CPW line 111 printed on the upper conductive layer 110 is different from the impedance of the substrate integrated waveguide SIW, impedance matching is required. In order to minimize the physical length of the transition structure for impedance matching, in one embodiment of the present invention, the inductance of the via hole 161 passing through the lower conductive layer 150 to the upper conductive layer 110 may be intermediate The magnitude of the capacitance of the via pad 131 located in the conductive layer 130 is adjusted to perform the impedance matching. The impedance matching means impedance matching from the input / output terminal 151 formed in the lower conductor layer 150 to the end of the substrate integrated waveguide SIW formed in FIG. 1, and additionally, It is possible to optimize the impedance matching by optimizing the width of the open spaces 112 and 113 bent at right angles from the signal transmission direction and the width of the CPW line 111 and the like.

The transition structure including a series of impedance matching enables the surface mount component of the substrate integrated waveguide (SIW) device to be miniaturized while minimizing the physical length required for a general transition structure.

In the surface mount structure of the substrate integrated waveguide (SIW), the via holes 168 and 169 connected from the lower conductive layer 150 to the intermediate conductive layer 130 through the second dielectric substrate 140 are connected to the input / Wave signal transmitted to the first dielectric substrate 151 is prevented from propagating through the second dielectric substrate 140. The via holes 162, 163, 164, 165, 166 and 167 connected from the lower conductive layer 150 to the upper conductive layer 110 connect the upper and lower sides of the peripheral ground plane of the CPW line 111 .

A high-frequency electric device provided according to an embodiment of the present invention will be described with reference to Figs. 1 to 3. Fig. The high frequency electric device includes a lower conductive layer 150, a second dielectric substrate 140, an intermediate conductive layer 130, a first dielectric substrate 120, and an upper conductive layer 110 which are sequentially stacked A multilayer substrate; An input / output terminal 151 formed on the lower conductive layer 150; A plurality of first via holes (162 to 167) penetrating from the upper conductive layer (110) to the lower conductive layer (150); A second via hole 161 penetrating from the upper conductive layer 110 to the input / output terminal 151; A third via hole 168 or 169 extending from the intermediate conductive layer 130 to the lower conductive layer 150 so that a signal transmitted through the input and output terminal 151 and the second via hole 161 is transmitted to the lower conductive layer 150, The third via hole (168, 169) disposed at a position to prevent propagation through the dielectric substrate (140); A via pad 131 formed in the intermediate conductive layer 130, the via pad 131 being electrically connected to the second via hole 161; A substrate integrated waveguide (SIW) provided by the upper conductive layer 110, the intermediate conductive layer 130, and the plurality of first via holes 162 to 167; And a coplanar waveguide (CPW) line 111 formed on one end of the substrate integrated waveguide and electrically connected to the second via hole 161. [

In this case, when the substrate integrated waveguide and the CPW line are separately analyzed, assuming that the impedance of the substrate integrated waveguide is matched to the impedance of the CPW line 111, It can be assumed that the length is the first length. At this time, the length of the CPW line 111 actually formed in the upper conductive layer 110 may be shorter than the first length.

At this time, (1) the first impedance of the substrate integrated waveguide is matched to the second impedance due to the coupling structure of (2) the CPW line 111, the second via hole 161 and the via pad 131 The open spacings 112 and 113 formed on both sides of the CPW line 111 may have a shape widened from the one end of the CPW line 111 toward the integrated circuit waveguide.

The dimensions of the second via hole 161, the dimensions of the CPW line 111 and the dimension of the via pad 131 are (1) the first impedance of the substrate integrated waveguide is (2) May be sized to match the second impedance due to the coupling structure of the CPW line (111), the second via hole (161), and the via pad (131). Here, the 'dimension' may be a physical concept including the thickness, shape, width, length, and the like of the structure.

A high frequency electric device provided according to another embodiment of the present invention includes a multilayer substrate including a sequentially stacked lower conductive layer 150, a first dielectric substrate 120, and an upper conductive layer 110; An input / output terminal 151 formed on the lower conductive layer 150; A plurality of first via holes (162 to 167) penetrating from the upper conductive layer (110) to the lower conductive layer (150); A second via hole 161 penetrating from the upper conductive layer 110 to the input / output terminal 151; A substrate integrated waveguide (SIW) provided by the upper conductive layer 110, the lower conductive layer 150, and the plurality of first via holes 162 to 167; And a coplanar waveguide (CPW) line 111 formed at one end of the substrate integrated waveguide and electrically connected to the second via hole 161. [

In this case, when the substrate integrated waveguide and the CPW line are separately analyzed, assuming that the impedance of the substrate integrated waveguide is matched to the impedance of the CPW line 111, It can be assumed that the length is the first length. At this time, the length of the CPW line 111 actually formed in the upper conductive layer 110 may be shorter than the first length.

The CPW line 111 and the second via hole 161 may be formed so that the first impedance of the substrate integrated waveguide is matched to the second impedance of the coupling structure of the CPW line 111 and the second via hole 161, The open spacings 112 and 113 formed on both sides of the CPW line 111 may have a shape that is opened at one end of the CPW line 111 toward the substrate integrated waveguide.

The dimension of the second via hole 161 and the dimensions of the CPW line 111 are set so that the impedance of the CPW line 111 and the second via hole 161 To match the impedance due to the coupling structure of the input / output terminal.

According to another embodiment of the present invention, there can be provided a method of manufacturing a high frequency electric device, which comprises the second dielectric substrate 140 and the intermediate conductive layer 130 described above. This method includes the step of forming the third via holes 168 and 169 on the first substrate including the lower conductive layer 150, the second dielectric substrate 140, and the intermediate conductive layer 130 sequentially stacked A first step of forming; And forming the multilayer substrate by laminating the first dielectric substrate (120) and the upper conductive layer (110) on the first substrate after the first step, And a second step of forming the via holes 162 to 167 and the second via hole 161.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the essential characteristics thereof. The contents of each claim in the claims may be combined with other claims without departing from the scope of the claims.

110: upper conductive layer
111: CPW line
112, 113: Open Spacing
120: first dielectric substrate
130: intermediate conductive layer
131: via pad
140: second dielectric substrate
150: lower conductive layer
151: I / O terminal
161: Via hole
162, 163, 164, 165, 166, 167:
168, 169:

Claims (9)

A multilayer substrate including a sequentially stacked lower conductive layer, a second dielectric substrate, an intermediate conductive layer, a first dielectric substrate, and an upper conductive layer;
An input / output terminal formed on the lower conductive layer;
A plurality of first via holes passing from the upper conductive layer to the lower conductive layer;
A second via hole penetrating from the upper conductive layer to the input / output terminal;
And a third via hole penetrating from the intermediate conductive layer to the lower conductive layer, the third via hole being disposed at a position to prevent a signal transmitted through the input / output terminal and the second via hole from propagating through the second dielectric substrate, 3 via holes;
A via pad formed in the intermediate conductive layer, the via pad being electrically connected to the second via hole;
A substrate integrated waveguide provided by the upper conductive layer, the intermediate conductive layer, and the plurality of first via holes; And
A coplanar waveguide (CPW) line formed at one end of the substrate integrated waveguide and electrically connected to the second via hole;
/ RTI >
High frequency electric device. The method according to claim 1,
Assuming that the length of the CPW line when the impedance of the substrate integrated waveguide is matched to the impedance of the CPW line is a first length,
And the length of the CPW line formed in the upper conductive layer is shorter than the first length.
High frequency electric device. The method according to claim 1,
(1) the openings formed on both sides of the CPW line are arranged such that the impedance of the substrate integrated waveguide is matched to the impedance due to the coupling structure of the CPW line, the second via hole and the via pad, Integrated waveguide at a first end of the CPW line,
High frequency electric device. The method according to claim 1,
The dimension of the second via hole, the dimension of the CPW line, and the dimension of the via pad are, respectively,
(1) the impedance of the substrate integrated waveguide is matched to (2) the impedance due to the coupling structure of the CPW line, the second via hole, and the via pad.
High frequency electric device. A multilayer substrate including a sequentially stacked lower conductive layer, a second dielectric substrate, an intermediate conductive layer, a first dielectric substrate, and an upper conductive layer;
An input / output terminal formed on the lower conductive layer;
A plurality of first via holes passing from the upper conductive layer to the lower conductive layer;
A second via hole penetrating from the upper conductive layer to the input / output terminal;
And a third via hole penetrating from the intermediate conductive layer to the lower conductive layer, the third via hole being disposed at a position to prevent a signal transmitted through the input / output terminal and the second via hole from propagating through the second dielectric substrate, 3 via holes;
A via pad formed in the intermediate conductive layer, the via pad being electrically connected to the second via hole;
A substrate integrated waveguide provided by the upper conductive layer, the intermediate conductive layer, and the plurality of first via holes; And
A microstrip line formed at one end of the substrate integrated waveguide and electrically connected to the second via hole;
/ RTI >
High frequency electric device. delete delete delete delete

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