KR101696480B1 - Liquid crystal display device and its manufacturing method - Google Patents

Abstract

The present invention discloses a liquid crystal display capable of bidirectional display without adding a process as well as improving image quality.
A liquid crystal display panel including a plurality of gate lines and data lines intersecting with each other and an inverted signal line formed at a left outer edge of a data line at the time of forming a data line; And a timing controller for supplying the inverted control signal to the inverted signal line via the data driver and the data driver for supplying the data signal to the data line.

Description

TECHNICAL FIELD [0001] The present invention relates to a liquid crystal display (LCD)

The present invention relates to a liquid crystal display device and a method of manufacturing the same, and more particularly, to a liquid crystal display device capable of improving bidirectional display without adding a process, and a manufacturing method thereof.

A CRT (cathode ray tube), which is one of the widely used display devices, is mainly used for monitors such as a TV, a measurement device, and an information terminal device. However, due to the weight and size of the CRT itself, Could not respond positively to the response of

Therefore, in the trend of miniaturization and lightening of various electronic products, CRT has a certain limit in terms of weight and size, and is expected to be replaced with a liquid crystal display (LCD) using an electric field optical effect, a gas discharge A plasma display panel (PDP) using an electroluminescent effect, and an EL display device (ELD) using an electroluminescent effect. Among them, researches on a liquid crystal display device are being actively carried out.

Liquid crystal display devices are becoming more and more widespread due to features such as lightness, thinness, and low power consumption driving. Accordingly, the liquid crystal display device is proceeding in the direction of large-sized, thin, and low power consumption in response to the demand of the user.

1 is a schematic view of a general liquid crystal display device.

As shown in FIG. 1, a typical liquid crystal display device includes a liquid crystal display panel 10 in which liquid crystal is injected between two transparent substrates bonded together with a predetermined space, and a gate line G1- A gate driver 30 for supplying a scan signal to the data lines D1 to Dn and a data driver 20 for supplying a data signal to the data lines D1 to Dn.

The liquid crystal display panel 10 includes a plurality of gate lines G1 to Gm arranged at regular intervals on any one of two substrates and a plurality of data lines D1 to Dn crossing the gate lines G1 to Gm ) And a thin film transistor (TFT) formed in a crossing region of the gate lines G1 to Gm and the data lines D1 to Dn.

In a typical liquid crystal display device, a pixel is defined by intersecting the gate lines G1 to Gm and the data lines D1 to Dn, and the pixel includes the thin film transistor TFT, the liquid crystal cell Clc, (Cst) and the common electrode (Vcom) are formed.

The thin film transistor TFT is an on / off switch element, and pixels are turned on / off according to a scan signal input to the gate lines G1 to Gm.

As described above, in general liquid crystal display devices, the resistance and the capacitance load of the data lines increase as the size of the liquid crystal display progressively increases, so that the time to charge the image signal to the pixels becomes short, and insufficient charging of the pixels results in deterioration .

An object of the present invention is to provide a liquid crystal display device capable of improving bidirectional display without adding a process as well as improving image quality, and a manufacturing method thereof.

According to an embodiment of the present invention,

A liquid crystal display panel including a plurality of gate lines and data lines intersecting with each other and an inverted signal line formed at a left outer edge of the data line at the time of forming the data line; First and second gate drivers provided on both sides of the liquid crystal display panel; A data driver for supplying a data signal to the data line; And a timing controller for supplying an inverted control signal to the inverted signal line via the data driver.

According to another aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device,

Forming a gate electrode and a gate line on the substrate; Forming a gate insulating film on the substrate including the gate electrode and the gate line; Forming a semiconductor pattern on the gate electrode; Forming a source / drain electrode on the semiconductor pattern; And forming a data line and an inverted signal line at the same time when the source / drain electrode is formed, wherein the inverted signal line is formed in parallel with the data line along the left outer edge of the data line.

The liquid crystal display according to an embodiment of the present invention includes first and second gate drivers on both sides of a liquid crystal display panel to supply a scan signal for driving odd-numbered and even-numbered liquid crystal cells, And has a function of improving image quality degradation due to the line resistance of the device.

In addition, since the inversion signal line for supplying the inversion control signal is formed in the region corresponding to the dummy pixels formed on the outer edge of the liquid crystal display panel at the time of forming the data line, the present invention can improve the image quality, This has the advantage.

1 is a schematic view of a general liquid crystal display device.
2 is a view illustrating a liquid crystal display device according to an embodiment of the present invention.
3 is a plan view showing pixels of a liquid crystal display device according to an embodiment of the present invention.
4 is a cross-sectional view of a pixel of a liquid crystal display cut along a line I-I 'in FIG.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the accompanying drawings, embodiments of the present invention will be described in detail.

FIG. 2 is a view illustrating a liquid crystal display device according to an embodiment of the present invention, and FIG. 3 is a plan view illustrating pixels of a liquid crystal display device according to an embodiment of the present invention.

2 and 3, in the liquid crystal display according to the embodiment of the present invention, the gate lines G1 to Gm and the data lines D1 to Dn are intersected with each other, A liquid crystal display panel 110 in which a thin film transistor (TFT) is formed for driving the liquid crystal display panel Clc, a gate for supplying a scan signal to the gate lines G1 to Gm of the liquid crystal display panel 110, A driver 120 and a data driver 120 for supplying data signals to the data lines D1 to Dn of the liquid crystal display panel 110. The first and second gate drivers 131 and 133, And a timing controller 150 for controlling the controller 120.

The liquid crystal display further includes a backlight unit (not shown) for providing light to the liquid crystal display panel 110 in accordance with a control signal from the timing controller 150. [

Although not shown in the figure, the liquid crystal display further includes a common voltage generator (not shown) for generating a common voltage Vcom and a power supply unit (not shown) for supplying a power supply voltage to each of the components.

The liquid crystal display panel 110 includes a thin film transistor TFT formed in each pixel region defined by a plurality of gate lines G1 through Gm and a plurality of data lines D1 through Dn, And a liquid crystal capacitor Clc connected to the liquid crystal capacitor Clc. The liquid crystal capacitor Clc is composed of a pixel electrode 121 connected to a thin film transistor TFT and a common electrode 123 formed adjacent to the pixel electrode 121. [ The thin film transistor TFT supplies a data signal from the data lines D1 to Dn to the pixel electrode 121 in response to a scan signal from the gate lines G1 to Gm. The liquid crystal capacitor Clc charges the difference voltage between the data signal supplied to the pixel electrode 121 and the common voltage Vcom supplied to the common electrode 123 and varies the arrangement of the liquid crystal molecules according to the difference voltage, The gradation is realized by adjusting the transmittance. The storage capacitor Cst is connected in parallel with the liquid crystal capacitor Clc to maintain the voltage charged in the liquid crystal capacitor Clc until the next data signal is supplied.

Here, the common electrode 123 is connected to the common voltage line 125 to supply the common voltage Vcom.

The first and second gate drivers 131 and 133 are provided on both sides of the liquid crystal display panel 110 and sequentially generate scan pulses according to a gate drive control signal supplied from the timing controller 150, G1 to Gm).

Although not shown in detail in the drawings, the first and second gate drivers 131 and 133 of the present invention include a gate-on-glass type including a shift register, a level shifter, and an output buffer and having a plurality of switching elements formed on a substrate .

The first and second gate drivers 131 and 133 simultaneously supply the scan signals to the adjacent gate lines G1 to Gm. Specifically, the scan signal of the first gate driver 131 controls ON / OFF of the thin film transistor connected to the odd-numbered liquid crystal cell, and the scan signal of the second gate driver 133 controls ON / OFF of the thin film transistor connected to the odd- / Off.

That is, the liquid crystal display of the present invention is provided with first and second gate drivers 131 and 133 on both sides of the liquid crystal display panel 110 to supply scan signals for driving the odd and even liquid crystal cells, respectively, And has a function of improving image quality deterioration due to line resistance of a large-sized liquid crystal display device.

The data driver 120 supplies a data signal to the data lines D1 to Dn in response to a data driving control signal supplied from the timing controller 150. [ The data driver 120 samples and latches the image data input from the timing controller 150 and then latches the gamma reference voltage supplied from the gamma reference voltage generator (not shown) through a gamma reference voltage selector (not shown) Into analog data voltages capable of expressing the gradation in the liquid crystal cell of the liquid crystal display panel 110 and supplies them to the data lines D1 to Dn.

The liquid crystal display device of the present invention further includes an inversion signal line (R) formed at the time of forming the data lines (D1 to Dn).

The liquid crystal display of the present invention is capable of bidirectional display in accordance with an inversion control signal input to the inversion signal line R at the time of image display in the up and down direction.

The inverted signal line R is formed horizontally with the first data line D1 and is formed in an area corresponding to the dummy pixels where no image is displayed. That is, the inverted signal line R is formed on the left outer edge of the image display region of the liquid crystal display panel 110.

The inverted signal line R is not formed as a separate additional process but is simultaneously formed in the process of forming the data lines D1 to Dn of the liquid crystal display panel 110. [

The inverted signal line R is supplied with a control signal whose image display is inverted in the vertical direction with respect to the gate lines G1 to Gm.

The inversion signal line R is supplied with an inversion control signal from the timing controller 150 and is electrically connected to the first and second gate drivers 131 and 133 via the data driver 120.

The inverted signal line R is connected to the lowermost end of the first and second gate drivers 131 and 133 so that an image can be displayed in the vertical direction of the liquid crystal display device.

For example, when a high inversion control signal is input to the inversion signal line R, the first and second gate drivers 131 and 133 are turned on from the first gate line G1 to the mth gate line Gm To sequentially scan signals to display an image in the first direction.

On the other hand, when a low inversion control signal is input to the inversion signal line R, the first and second gate drivers 131 and 133 are turned from the m-th gate line Gm to the first gate line G1 A scan signal is sequentially supplied to display an image in the second direction.

In the bidirectional display implementation, a wiring for supplying a separate inversion control signal can be formed on the outer periphery of the liquid crystal display panel. Here, since the common voltage line 125 and the first and second gate drivers 131 and 133 are formed on the outer periphery of the liquid crystal display panel, the layout area is increased or the common voltage The line resistance resulting from the reduction of the line width of the line 125 may cause a problem of image quality deterioration.

The present invention can improve the image quality by forming the inverted signal line R to be supplied with the inverted control signal in a region corresponding to dummy pixels formed on the outer periphery of the liquid crystal display panel 110 without any additional process But it also has the advantage of being able to implement bi-directional display.

4 is a cross-sectional view of a pixel of a liquid crystal display cut along a line I-I 'in FIG.

4, the liquid crystal display according to the embodiment of the present invention has the inverted signal line R formed on the outer periphery of the liquid crystal display panel adjacent to the first data line (D1 in FIG. 2).

The thin film transistor TFT connected to the first gate line G1 includes a gate electrode 111 formed on the base substrate 100, a gate insulating film 112 formed on the gate electrode 111 and the base substrate 100, A semiconductor pattern 113 formed on the gate insulating layer 112 and source / drain electrodes 114 and 115 formed on the semiconductor pattern 113.

Here, the first gate line G1 is formed at the same time when the gate electrode 111 is formed.

A protective layer 116 is formed on the gate insulating layer 112 including the source / drain layers 114 and 115 and the drain electrode 115 is electrically connected to the pixel electrode 121 by a contact hole 117 .

The inverted signal line G of the present invention is formed at the same time when the source / drain electrodes 114 and 115 are formed.

That is, the inversion signal line R is formed on the gate insulating film 112, and the protective layer 116 is formed on the gate insulating film 112 and the inversion signal line R. [

In the method of manufacturing a thin film transistor substrate of a liquid crystal display panel of the present invention, a metal layer is deposited on a base substrate 100 and a gate electrode 111 is formed through a photolithography process using a mask.

Here, the metal layer may be a single metal such as aluminum (Al), aluminum alloy (AlNd), tungsten (W), chromium (Cr), molybdenum (Mo), aluminum (Al) , And the like. Although not shown in the drawing, the gate electrode 111 is formed on the base substrate 100, and the gate line G1 is formed.

A gate insulating film 112 is formed on the base substrate 100 including the gate electrode 111 and the gate line G1.

A semiconductor pattern 113 is formed on the gate electrode 111 through a photolithography process using a mask and source / drain electrodes 114 and 115 are formed on the semiconductor pattern 113 do. In the present invention, the semiconductor pattern 113 and the source / drain electrodes 114 and 115 are formed and an inverted signal line R and a data line (not shown) are formed.

A passivation film 116 is formed on the semiconductor pattern 113, the source / drain electrodes 114 and 115 and the data line, and the passivation film 116 is formed on the drain line 115 through a photolithography process using a mask. A metal layer is deposited on the protective layer 116 including the contact hole 117 and a pixel electrode 121 is formed through a photolithography process using a mask .

As described above, the inverted signal line R of the present invention is formed at the same time that the source / drain electrodes 114 and 115 and the data line are formed without a separate additional process.

The present invention can improve the image quality by forming the inversion signal line R for supplying the inversion control signal in the area corresponding to the dummy pixels formed in the outer edge of the liquid crystal display panel at the time of forming the data line, It has the advantage that implementation is possible.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

131: first gate driver 133: second gate driver
R: inverted signal line

Claims (13)

A liquid crystal display panel including a plurality of gate lines and data lines intersecting with each other and an inverted signal line formed at a left outer edge of the data line at the time of forming the data line;
First and second gate drivers provided on both sides of the liquid crystal display panel;
A data driver for supplying a data signal to the data line; And
And a timing controller for supplying an inverted control signal to the inverted signal line via the data driver, wherein the inverted signal line and the data line are disposed in a gate insulating film disposed on the gate line Device. The method according to claim 1,
And the inverted signal line is formed in a region corresponding to a dummy pattern formed on an outer periphery of the liquid crystal display panel. The method according to claim 1,
And the inverted signal line is connected to the lowermost end of the first and second gate drivers. The method according to claim 1,
And wherein either one of the up and down directions is selected with respect to the gate lines according to an inversion control signal supplied to the inversion signal line. The method according to claim 1,
And the inverted signal line is formed in parallel with the data line. The method according to claim 1,
Wherein the first and second gate drivers include a shift register, a level shifter, and an output buffer, and are gate-on-glass type in which a plurality of switching elements are formed on a substrate. The method according to claim 6,
Wherein the first gate driver drives the liquid crystal cell of the odd-numbered pixel, and the second gate driver drives the liquid crystal cell of the odd-numbered pixel. Forming a gate electrode and a gate line on the substrate;
Forming a gate insulating film on the substrate including the gate electrode and the gate line;
Forming a semiconductor pattern on the gate electrode;
Forming a source / drain electrode on the semiconductor pattern; And
And simultaneously forming a data line and an inverted signal line in the gate insulating film at the time of forming the source / drain electrode,
Wherein the inverted signal line is formed parallel to the data line along the left outer edge of the data line. 9. The method of claim 8,
Wherein the inverted signal line is formed in a region corresponding to a dummy pattern formed on the outer periphery of the liquid crystal display panel. 9. The method of claim 8,
And a common voltage line is formed along an outer periphery of the gate line and the data line. 9. The method of claim 8,
And the first and second gate drivers are formed on both sides of the outer periphery of the data line. 12. The method of claim 11,
Wherein the inverted signal line is connected to the lowermost end of the first and second gate drivers via a data driver. 9. The method of claim 8,
And wherein either one of an up direction and a down direction is selected with respect to the gate lines according to an inversion control signal supplied to the inversion signal line.

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