KR101294503B1 - The light emitting device package and the method for manufacturing the same - Google Patents

Abstract

The present invention relates to a light emitting device package, the package is a light emitting structure, a device pad on the lower surface of the light emitting structure, a protrusion on the device pad, a solder ball on the protrusion, covering the protrusion and the solder ball to expose the top surface of the solder ball And an insulating substrate and a substrate pad covering the upper surface of the solder ball on the insulating substrate. Therefore, by further forming a solder protrusion, it is possible to maintain the height difference between the solder and the light emitting structure to prevent the solder flowing through the light emitting structure during soldering.

Description

The light emitting device package and the method for manufacturing the same

The present invention relates to a light emitting device package and a method of manufacturing the same.

A light emitting diode (LED) may form a light emitting source using compound semiconductor materials such as GaAs series, AlGaAs series, GaN series, InGaN series, and InGaAlP series.

Such a light emitting diode is packaged and used as a light emitting device that emits a variety of colors, and the light emitting device is used as a light source in various fields such as a lighting indicator for displaying a color, a character display, and an image display.

1 is a cross-sectional view of a conventional light emitting device package.

Referring to FIG. 1, a conventional light emitting device package 10 forms a pad 3 on a light emitting structure 2 formed on a substrate 1 and prints the conductive solder ball 4 on the pad 3. It is electrically bonded to the pad 6 of the circuit board.

In this case, an insulating material 5 is embedded between the light emitting structure and the pads 3 and 6 of the printed circuit board to form a supporting member.

In the light emitting device package 10 of FIG. 1, when the conductive solder ball 4 is soldered, the solder may spread to the light emitting structure 2, and a short may occur.

The embodiment provides a light emitting device package having a new structure and a method of manufacturing the same.

The embodiment provides a light emitting device package having improved reliability and a method of manufacturing the same.

Embodiments include a light emitting structure, a device pad on a bottom surface of the light emitting structure, a protrusion on the device pad, a solder ball on the protrusion, an insulating substrate covering the protrusion and the solder ball and exposing an upper surface of the solder ball, and the solder ball on the insulating substrate. It includes a substrate pad covering the upper surface of the.

On the other hand, the embodiment is a step of forming a light emitting structure having an active layer between the first and second conductivity-type semiconductor layer on the substrate, forming a device pad on the light emitting structure, forming a protrusion on the device pad, Applying a solder paste on the protrusion and soldering a metal ball, applying an insulating material on the light emitting structure to expose the top surface of the metal ball, and forming a substrate pad on the metal ball.

According to the present invention, the height difference between the solder and the light emitting structure can be maintained by forming a pad on the light emitting structure and further forming a solder protrusion on the pad. Therefore, it is possible to prevent the solder from flowing through the light emitting structure during the soldering process to prevent electrical sorting.

1 is a cross-sectional view of a conventional light emitting device package.
2 is a cross-sectional view of a light emitting device package according to the present invention.
3 to 12 are process diagrams illustrating a method of manufacturing the light emitting device package illustrated in FIG. 2.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

Throughout the specification, when a part is said to "include" a certain component, it means that it can further include other components, without excluding other components unless specifically stated otherwise.

In order to clearly illustrate the present invention in the drawings, thicknesses are enlarged in order to clearly illustrate various layers and regions, and parts not related to the description are omitted, and like parts are denoted by similar reference numerals throughout the specification .

Whenever a portion of a layer, film, region, plate, or the like is referred to as being "on" another portion, it includes not only the case where it is "directly on" another portion, but also the case where there is another portion in between. Conversely, when a part is "directly over" another part, it means that there is no other part in the middle.

Hereinafter, the light emitting device package 100 according to the present invention will be described with reference to FIG. 2.

Referring to FIG. 2, the light emitting device package 100 includes a light emitting structure 50 and a printed circuit board electrically connected to the light emitting structure 50 under the light emitting structure 50.

The light emitting structure 50 is flip chip bonded to the printed circuit board and is disposed in a top-view manner to emit light upward.

The light emitting structure 50 has a layered structure of the first conductive semiconductor layer 120, the active layer 130, and the second conductive semiconductor layer 140, and the first conductive semiconductor layer 120 is disposed thereon. do.

The lower second conductive semiconductor layer 140 may be formed of at least one of a group III-V compound semiconductor, for example, GaN, InN, AlN, InGaN, AlGaN, InAlGaN, or AlInN. The second conductive semiconductor layer 140 may be doped with a second conductive dopant, and the second conductive dopant is a p-type dopant and includes Mg, Zn, Ca, Sr, and Ba.

 The second conductive semiconductor layer 140 may be formed of a p-type GaN layer having a predetermined thickness by supplying a gas including a p-type dopant such as NH 3, TMGa (or TEGa), and Mg.

 The second conductive semiconductor layer 140 includes a current spreading structure in a predetermined region. The current spreading structure includes semiconductor layers in which the current spreading speed in the horizontal direction is higher than the current spreading speed in the vertical direction.

The second conductivity-type semiconductor layer 140 may supply a carrier diffused in a uniform distribution to another layer, for example, the active layer 130 thereon.

 The active layer 130 is formed on the second conductive semiconductor layer 140. The active layer 130 may be formed in a single quantum well or multiple quantum well (MQW) structure. One period of the active layer 130 may optionally include a period of InGaN / GaN, a period of AlGaN / InGaN, a period of InGaN / InGaN, or a period of AlGaN / GaN.

 A second conductive cladding layer (not shown) may be formed between the second conductive semiconductor layer 140 and the active layer 130. The second conductive cladding layer may be formed of a p-type GaN-based semiconductor. The second conductivity type clad layer may be formed of a material having a band gap higher than that of the well layer.

 The first conductivity type semiconductor layer 120 is formed on the active layer 130. The first conductive semiconductor layer 120 may be implemented as an n-type semiconductor layer doped with a first conductive dopant. The n-type semiconductor layer may be formed of any one of compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, and the like. The first conductivity type dopant is an n-type dopant, and at least one of Si, Ge, Sn, Se, Te, and the like may be added.

 The first conductive semiconductor layer 120 may supply a gas including an n-type dopant such as NH 3, TMGa (or TEGa), and Si to form an n-type GaN layer having a predetermined thickness.

In addition, the second conductivity-type semiconductor layer 140 may be implemented as a p-type semiconductor layer, and the first conductivity-type semiconductor layer 120 may be implemented as an n-type semiconductor layer. The light emitting structure 50 may be implemented as any one of an n-p junction structure, a p-n junction structure, an n-p-n junction structure, and a p-n-p junction structure. Hereinafter, for the purpose of description, the first conductive semiconductor layer will be described as an example of the uppermost layer of the semiconductor layer.

Meanwhile, a step in which a portion of the first conductive semiconductor layer 120 is exposed by etching a region from the surface of the second conductive semiconductor layer 140 is formed under the light emitting structure 50. Accordingly, the lower portion of the light emitting structure 50 includes a first upper surface through which the second conductive semiconductor layer 140 is exposed and a second upper surface through which the first conductive semiconductor layer 120 is exposed.

The device pad 160 is formed on the first upper surface of the second conductive semiconductor layer 140 and the second upper surface of the first conductive semiconductor layer 120.

The device pad 160 may be formed of a single layer, but may have a plurality of layered structures as shown in FIG. 2.

When the device pad 160 has a plurality of layered structures, first to third layers 161 to 163 may have a pattern having the same area from the surfaces of the semiconductor layers 120 and 140.

The first layer 161 formed on the first and second upper surfaces of the semiconductor layers 120 and 140 of the device pad 160 may be an alloy layer including titanium, and is formed on the first layer 161. The second layer 162 may be an alloy layer including copper, and the third layer 163 formed on the second layer 162 may be a nickel layer including nickel.

In this case, the heights of the device pads 160 on the first conductive semiconductor layer 120 and the device pads 160 on the second conductive semiconductor layer 140 may be different from each other.

That is, in order to compensate for the height difference between the first and second conductivity-type semiconductor layers 120 and 140, the first to the second pads forming the device pads 160 on the first conductivity-type semiconductor layer 120. The thickness of the three layers 161-163 may be greater than the first to third layers 161-163 of the device pad 160 on the second conductive semiconductor layer 140.

Preferably, the device pad 160 on the second conductivity-type semiconductor layer 140 is about 100 μm of a titanium alloy as the first layer 161, about 500 μm of a copper alloy as the second layer 162, and a third layer ( The nickel alloy 163 may be formed to have a thickness of about 100 μm, and the device pad 160 on the first conductive semiconductor layer 120 may be formed thicker than this.

The protrusion 170 is formed on the third layer 163 of the device pad 160.

The protrusion 170 may be formed in a single layer or a plurality of layered structures.

When the protrusions 170 are formed in a plurality of layered structures, a first protrusion surface 171 formed on the third layer 163 and a second protrusion surface 172 formed on the first protrusion surface 171. ) May be included.

The first protrusion surface 171 may be formed of an alloy containing nickel, and the second protrusion surface 172 may be formed of an alloy containing gold.

The first protrusion surface 171 of the first upper surface may be formed to have a thickness of about 300 μm and the second protrusion surface is about 500 μm. In this case, the thickness of the protrusion 170 on the first conductive semiconductor layer 120 may be greater than the thickness of the protrusion 170 on the second conductive semiconductor layer 140.

The protrusion 170 is selectively formed only in an area to be soldered on the device pad 160.

A solder paste 181 is formed on the protrusion 170, and a metal ball 180 is formed on the solder paste 181.

The final heights of the metal balls 180 on the first conductive semiconductor layer 120 and the second conductive semiconductor layer 140 are the same.

An insulating substrate 185 is formed to expose the top surface of the metal ball 180 and cover the lower portion of the light emitting structure 50.

The insulating substrate 185 may include an epoxy insulating resin, or alternatively, may include a polyimide resin.

A substrate pad 186 is formed on the metal ball 180 on an exposed surface of the insulating substrate 185.

The substrate pad 186 is formed of a conductive material and may be formed by simultaneously patterning a copper foil layer.

A solder resist 190 may be formed on the substrate pad 186 to protect the printed circuit board.

A protective layer may be further formed on the upper portion of the light emitting device package 100 of FIG. 2 and on the light emitting surface of the light emitting structure 50, and the protective layer may be formed of a light-transmitting insulating layer.

As described above, in the case of forming the printed circuit board after forming the light emitting device, the protrusion 170 is formed on the light emitting device to secure the distance between the metal ball 180 and the semiconductor layers 120 and 140. The influence of the semiconductor layers 120 and 140 due to the melting of the metal balls 180 and the solder paste 181 may be minimized.

Hereinafter, a method of manufacturing the light emitting device package 100 of FIG. 2 will be described with reference to FIGS. 3 to 12.

First, as shown in FIG. 3, the light emitting structure 50 is formed on the substrate 110.

The substrate 110 may use at least one of sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, preferably a sapphire substrate 110. .

The first conductivity type semiconductor layer 120 may be formed on the substrate 110.

The first conductive semiconductor layer 120 may be formed in a multi-layered structure, and an undoped semiconductor layer (such as undoped GaN) is formed on the lower layer, and the first conductive semiconductor layer 120 is formed on the upper layer. Can be.

The first conductivity type semiconductor material having a composition formula of the semiconductor layer 120 is _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0 ≤y≤1, 0≤x + y≤1), For example, it may include at least one of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN.

In addition, when the first conductivity-type semiconductor layer 120 is an n-type semiconductor layer, the first conductivity-type semiconductor layers 120 and 130 are doped with n-type dopants such as Si, Ge, Sn, Se, and Te. Can be.

The active layer 130 is formed on the first conductive semiconductor layer 120, and the active layer 130 has a single quantum well structure, a multi quantum well structure (MQW), and a quantum wire (Quantum-Wire). It may be formed of at least one of the structure, or the quantum dot (Quantum Dot) structure.

A clad layer (not shown) doped with an n-type or p-type dopant may be formed on and / or under the active layer 130, and the clad layer (not shown) may be implemented as an AlGaN layer or an InAlGaN layer. have.

The second conductivity type semiconductor layer 140 is formed on the active layer 130. The second conductivity-type semiconductor layer 140 may be implemented, for example, as a p-type semiconductor layer, wherein the p-type semiconductor layer is In _x Al _y Ga _{1 -x- y} N (0≤x≤1, 0 Semiconductor material having a composition formula of? P-type dopants such as Ba may be doped.

Meanwhile, p-type and n-type dopants may be doped into the first conductivity-type semiconductor layer 120 and the second conductivity-type semiconductor layer 140, but embodiments are not limited thereto. Although not shown, a third conductive semiconductor layer (not shown) may be formed on the second conductive semiconductor layer 140. Therefore, the light emitting structure may be formed of any one of pn, np, pnp, and npn junction structures.

The first conductive semiconductor layer 120, the active layer 130, and the second conductive semiconductor layer 140 may be formed of metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), Plasma-Enhanced Chemical Vapor Deposition (PECVD), Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), or the like.

Next, as shown in FIG. 3, the first conductive semiconductor layer 120 is etched to a part of the height of the first conductive semiconductor layer 120 to expose the first conductive semiconductor layer 120.

Accordingly, the light emitting structure 50 on the substrate 110 may be formed of the first conductive semiconductor layer 120 having a step from the first upper surface and the first upper surface formed of the second conductive semiconductor layer 140. It has two top faces.

Next, as shown in FIG. 4, the device pads 160 are formed on the first and second surfaces, respectively.

The device pad 160 may be formed to have a plurality of layered structures, and may be formed of a titanium alloy, a copper alloy, or a nickel alloy of the first to third layers 161 to 163.

In this case, the device pad 160 on the second conductivity-type semiconductor layer 140 is 100 μm of a titanium alloy, which is the first layer 161, and a copper alloy of 500 μm, and the third layer 163, of the second layer 162. The nickel alloy may be formed to have a thickness of 100 μm, and the device pad 160 on the first conductive semiconductor layer 120 may be formed thicker than this.

The device pad 160 may be formed to cover most regions of the first upper surface and the second upper surface, and as shown in FIG. 5, one side of the second conductive semiconductor layer 140 may be etched to form a second upper surface. In this case, the device pads 160 of the first upper surface and the device pads 160 of the second upper surface may have the same length and have different widths.

The device pad 160 may be formed by plating, but may also be formed by sputtering or the like.

Next, as shown in FIG. 6, the protrusion 170 is formed on the third surface 163 of the device pad 160.

The protrusion 170 sequentially forms the first and second protrusion surfaces 171 and 172.

The first protrusion surface 171 and the second protrusion surface 172 may be formed by plating or sputtering the nickel alloy layer and the gold alloy layer, respectively, and the first protrusion surface 171 of the first upper surface is approximately 300 μm and the second protrusion 172 may be formed to have a thickness of about 500 μm. The protrusion 170 of the second upper surface may be thicker than the protrusion 170 of the first upper surface.

In this case, the protrusion 170 may be formed on a portion of the device pad 160, preferably in a region opposite to each other, as shown in FIG. 7.

For example, as shown in FIG. 7, when the device pad 160 is rectangular, the protrusion 170 of the first upper surface may be formed on the horizontal side of one side, and the protrusion 170 of the second upper surface may be formed on the horizontal side of the other side. Can be.

As described above, when the two protrusions 170 are formed to be spaced apart at the maximum, the metal may be prevented from being shorted in contact with each other while flowing by soldering.

Next, the solder paste 181 is applied as shown in FIG. 8, and the conductive metal balls 180 are formed to solder.

In this case, the solder paste 181 may be a tin-silver-copper alloy having 3 parts by weight of silver and 0.5 parts by weight of copper, and the metal ball 180 may be formed of an alloy including copper.

The thickness of the metal ball 180 may be higher than the thickness of the printed circuit board to be implemented.

Next, as illustrated in FIG. 9, the insulating substrate 185 is formed by covering the metal balls 180 on the first and second upper surfaces of the light emitting structure 50.

The insulating substrate 185 may be an epoxy resin or an imide resin to function as a supporting substrate of a printed circuit board, and may be glass impregnated or filler impregnated resin.

The insulating material is coated on the light emitting structure 50 and then cured. The cured insulating substrate 185 is formed to have a thickness larger than that of the insulating substrate of the printed circuit board.

Next, as shown in FIG. 10, the insulating substrate 185 is etched until the top surface of the metal ball 180 is exposed to form a supporting substrate of the printed circuit board.

Next, as shown in FIG. 11, a substrate pad 186 is formed on the metal ball 180.

The substrate pad 186 may be formed of an alloy including copper, and may be formed by etching after sputtering, plating, or laminating a copper foil layer.

In this case, a circuit pattern (not shown) may be formed simultaneously with the substrate pad 186.

Next, as shown in FIG. 12, a solder resist 190 is formed to cover the substrate pad 186.

The solder resist 190 embeds and protects the substrate pad 186 and the circuit pattern.

Finally, the substrate 110 is removed so that the first conductive semiconductor layer 120 of the light emitting structure 50 is exposed, and the first conductive semiconductor layer 120 serving as the light emitting surface is disposed to face the upper surface. The light emitting device package 100 of FIG. 2 may be completed.

In this case, a protective layer may be further formed on the light emitting structure 50 of the second light emitting device package 100.

In the above description, in order to compensate for the difference in thickness between the first and second top surfaces of the light emitting device package 100 of FIG. 2, the thicknesses of the device pads 160 and the protrusions 170 are different from each other. A conductive step portion for compensating for the difference may be further formed, and the thicknesses of the device pad 160 and the protrusion 170 on the first and second top surfaces may be the same.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, It belongs to the scope of right.

LED Package 100
Element pads 160
Metal ball 180
Protrusion 170
Light-emitting structure 50

Claims (20)

A first conductive semiconductor layer on an upper surface, a second conductive semiconductor layer on a lower surface, and an active layer between the first and second conductive semiconductor layers, wherein the lower surface of the first conductive semiconductor layer is exposed; A rectangular light emitting structure having a surface and a second surface exposing the first conductive semiconductor layer,
An element pad formed on each of the first and second surfaces of the light emitting structure,
Protrusions on each of the device pads,
A solder ball on the protrusion,
An insulating substrate covering the protrusion and the solder ball and exposing the upper surface of the solder ball;
A substrate pad covering an upper surface of the solder ball on the insulating substrate
Lt; / RTI >
The protrusion on the first surface is formed in close proximity to the first side of the light emitting structure, the projection on the second surface is a light emitting device package is formed in close proximity to the second side opposite to the first side.
delete delete delete The method of claim 1,
The protrusion is formed in only a portion of the device pad light emitting device package. The method of claim 1,
The protrusions formed on the first and second surfaces are disposed to have a first separation distance. The method of claim 1,
The device pad has a light emitting device package having at least two laminated structure. The method of claim 7, wherein
The device pad is a titanium alloy layer on the light emitting structure,
A copper alloy layer on the titanium alloy layer, and
Light emitting device package comprising a nickel alloy layer on the copper alloy layer. 9. The method of claim 8,
The protrusion has a light emitting device package having at least two laminated structure. 10. The method of claim 9,
The protrusion is a nickel alloy layer formed on the nickel alloy layer of the device pad, and
Light emitting device package comprising a gold alloy layer formed on the nickel alloy layer. The method of claim 1,
The light emitting device package of claim 1, wherein the device pads on the first surface and the device pads on the second surface have different thicknesses. An active layer between the first and second conductivity-type semiconductor layers on the substrate, the upper surface having a first surface to which the second conductivity-type semiconductor layer is exposed and a second surface to expose the first conductivity-type semiconductor layer; Partially etching the conductive semiconductor layer and the active layer to form a rectangular light emitting structure;
Forming device pads on the first and second surfaces of the light emitting structure, respectively;
Forming a protrusion on the device pad;
Applying a solder paste on the protrusion and soldering a metal ball;
Applying an insulating material on the light emitting structure to expose the top surface of the metal ball, and
Forming a substrate pad on the metal ball
Including;
The protrusion on the first surface is formed to be close to the first side of the light emitting structure, and the protrusion on the second surface is formed to be close to the second side opposite to the first side. Manufacturing method.
delete delete The method of claim 12,
The protrusion is a manufacturing method of the light emitting device package is formed only in a portion of the device pad. The method of claim 12,
Forming the device pad,
Forming a first alloy layer on the first and second conductivity-type semiconductor layers,
Forming a second alloy layer on the first alloy layer, and
Method of manufacturing a light emitting device package comprising the step of forming a third alloy layer on the second alloy layer. 17. The method of claim 16,
Wherein the first alloy layer is a titanium alloy layer, the second alloy layer is a copper alloy layer, and the third alloy layer is a nickel alloy layer. 18. The method of claim 17,
Forming the protrusions,
Forming a nickel alloy layer on a portion of the nickel alloy layer of the device pad, and
Method of manufacturing a light emitting device package comprising the step of forming a gold alloy layer on the nickel alloy layer. The method of claim 12,
The thickness of the device pad and the protrusion on the first conductive semiconductor layer is different from the thickness of the device pad and the protrusion on the second conductive semiconductor layer. The method of claim 12,
After the substrate pad is formed,
The method of manufacturing a light emitting device package further comprising the step of removing the substrate of the light emitting structure.

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