KR101189138B1 - An array substrate for In-Plane switching mode LCD and method of fabricating of the same - Google Patents

Abstract

The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a transverse electric field type liquid crystal display device having a high opening ratio and a wide viewing angle, and a manufacturing method thereof.

In the transverse electric field type liquid crystal display device according to the present invention, in forming a common electrode and a pixel electrode, each electrode includes a plurality of horizontal parts configured in a horizontal direction, and a first vertical connecting one of the horizontal parts to one of the horizontal parts. And a second vertical portion.

The first and second vertical portions of the common electrode may be configured to have a larger width than the first and second vertical portions of the pixel electrode, and the pixel electrodes may form blocking means with oblique areas at the corner portions where the horizontal and vertical portions meet. However, the common electrode does not constitute a blocking means at a portion where the horizontal portion and the vertical portion meet each other.

In this case, when the rubbing process is performed in the horizontal direction, the light leakage phenomenon caused by the rubbing failure by the blocking means can be prevented, so that there is an advantage that high quality can be realized.

Description

An array substrate for in-plane switching mode LCD and method of fabricating of the same

1 is a cross-sectional view schematically showing a part of a general transverse electric field type liquid crystal display device,

2 is an enlarged plan view showing one pixel of an array substrate for a transverse electric field type liquid crystal display device according to a first example of the related art;

3 is an enlarged plan view showing one pixel of an array substrate for a transverse electric field type liquid crystal display device according to a second example of the prior art;

4 is an enlarged plan view magnifying Z of FIG. 3;

5 is an enlarged plan view of an enlarged view of one pixel of the array substrate for a transverse electric field type liquid crystal display device according to the present invention;

6A to 6D and 7A to 7D are cross-sectional views illustrating the process sequence of the present invention by cutting VI-VI, VIII-VIII of FIG. 5.

BRIEF DESCRIPTION OF THE DRAWINGS FIG.

100: substrate 102: gate wiring

104: gate electrode 106a, 106b, 106c: pixel electrode

114: source electrode 116: drain electrode

118: data wirings 126a, 126b, 126c: pixel electrodes

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a transverse electric field type liquid crystal display device having a wide viewing angle, high aperture ratio, and high luminance characteristics, and a manufacturing method thereof.

Generally, the driving principle of a liquid crystal display device utilizes the optical anisotropy and polarization properties of a liquid crystal. Since the liquid crystal has a long structure, it has a directionality in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Therefore, when the molecular alignment direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular alignment direction of the liquid crystal by optical anisotropy, so that image information can be expressed.

Currently, an active matrix liquid crystal display device (AM-LCD: below Active Matrix LCD, abbreviated as liquid crystal display device) in which a thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner has the best resolution and video performance. It is attracting attention.

The liquid crystal display includes a color filter substrate (upper substrate) on which a common electrode is formed, an array substrate (lower substrate) on which a pixel electrode is formed, and a liquid crystal positioned between upper and lower substrates. The method of driving the liquid crystal by an electric field applied up and down by the electrode is excellent in characteristics such as transmittance and aperture ratio.

However, the liquid crystal drive by the electric field applied up-down has a disadvantage that the viewing angle characteristics are not excellent. Therefore, new techniques have been proposed to overcome the above disadvantages. The liquid crystal display device to be described below has an advantage of excellent viewing angle characteristics by a liquid crystal driving method using a transverse electric field.

Hereinafter, a general transverse electric field type liquid crystal display device will be described in detail with reference to FIG. 1.

1 is an enlarged cross-sectional view illustrating a cross section of a general transverse electric field type liquid crystal display device.

As shown in the drawing, the conventional transverse electric field type liquid crystal display device B includes a color filter substrate B1 and an array substrate B2 facing each other, and a liquid crystal between the color filter substrate and the array substrates B1 and B2. The layer LC is interposed.

The array substrate B2 includes a thin film transistor T, a common electrode 58, and a pixel electrode 72 for each of the pixels P1 and P2 defined on the transparent insulating substrate 50.

The thin film transistor T includes a gate electrode 52, a semiconductor layer 62 having an insulating layer 60 interposed therebetween, and a source configured to be spaced apart from each other on the semiconductor layer 62. And drain electrodes 64 and 66.

In the above configuration, the common electrode 58 and the pixel electrode 72 are configured to be spaced apart from each other in parallel on the same substrate.

In general, the common electrode 58 is made of the same material as the gate electrode 52, and the pixel electrode 72 is made of the same material as the source and drain electrodes 64 and 66. However, as shown in order to increase the aperture ratio, the pixel electrode 72 may be formed as a transparent electrode.

Although not shown, a gate wiring (not shown) extending along one side of the pixels P1 and P2 and a data wiring (not shown) extending in a direction perpendicular thereto are formed, and the common electrode 58 is disposed on the common electrode 58. A common wiring (not shown) for applying a voltage is configured.

The color filter substrate B1 includes a black matrix 32 formed on a transparent insulating substrate 30 corresponding to the gate line (not shown), the data line (not shown), and the thin film transistor T. Color filters 34a and 34b are formed corresponding to the pixels P1 and P2.

The liquid crystal layer 90 is operated by the horizontal electric field 95 of the common electrode 58 and the pixel electrode 72.

Hereinafter, referring to FIG. 2, a configuration of an array substrate constituting the transverse electric field type liquid crystal display device as described above will be described. (The array substrate of FIG. 2 is an electrode that is opaque, unlike the configuration of FIG. 1. The example formed by this is demonstrated.)

2 is a plan view schematically illustrating a configuration of a conventional array substrate for a transverse electric field type liquid crystal display device.

As shown in the drawing, the gate wiring 54 extending in one direction on the substrate 50 and the data wiring 68 crossing the perpendicular to the gate wiring 54 to define the pixel region P are constituted. do.

In addition, the common wiring 56 crossing the pixel region P is spaced apart from and parallel to the gate wiring 54.

At the intersection of the gate line 54 and the data line 68, the gate electrode 52 connected to the gate line 54, the semiconductor layer 62 on the gate electrode 52, and the semiconductor layer 62 are provided. The thin film transistor T including the upper source electrode 64 and the drain electrode 66 is configured.

The pixel region P includes a common electrode 58 extending perpendicular to the common wiring 56 and spaced in parallel to each other, and spaced in parallel with the common electrode 58 between the common electrodes 58. The pixel electrode 72 is constituted.

However, the above-described configuration has a very wide area where the actual liquid crystals of the outer surface (A1, A2, etc.) of the pixel region cannot operate normally, which leads to a significant reduction in the opening area and the luminance when viewed as a whole of the liquid crystal panel. It is a cause of deterioration.

Therefore, as a method for solving this problem, a configuration of an array substrate for a transverse electric field type liquid crystal display device having a configuration as shown in FIG. 3 is proposed.

3 is an enlarged plan view in which a single pixel is enlarged in the configuration of an array substrate for a transverse electric field type liquid crystal display device according to a second conventional example.

As shown in the drawing, a gate wiring 82 extending in one direction on the substrate 80 and a data wiring 94 defining the pixel region P by crossing the gate wiring 82 perpendicularly are formed. .

At the intersection of the gate wiring 82 and the data wiring 94, a gate electrode 84 connected to the gate wiring 82, an active layer 88 disposed on the gate electrode 84, and the active layer The thin film transistor T including the source electrode 90 and the drain electrode 92 positioned on the upper portion of the 88 and spaced apart from each other by a predetermined interval is configured.

The pixel region P includes the common electrodes 86a, 86b and 86c, and the pixel electrodes 96a, 96b and 96c spaced apart from the common electrodes 86a, 86b and 86c by a predetermined distance.

The configuration of the common electrodes 86a, 86b, and 86c will be described in detail. The plurality of horizontal parts 86a and parallel to the gate wiring 82 and the horizontal parts 86a and the horizontal parts 86a are disposed on one side. A first vertical portion 86b connected to one, and a second vertical portion 86c connected to the other on the other side, and the pixel electrodes 96a, 96b and 96c also include the plurality of horizontal portions 96a and It consists of the 1st vertical part 96b and the 2nd vertical part 96c.

The common electrodes 86a, 86b and 86c and the pixel electrodes 96a, 96b and 96c are formed in separate layers, and thus, the first and second vertical portions 86b and 86c of the common electrode to secure an opening area. ) And the first and second vertical portions 96b and 96c of the pixel electrode may overlap each other.

The first vertical portions 86b and 96b and the second vertical portions 86c and 96c of the common electrode and the pixel electrode are configured to be close to the data line 94 formed at both sides of the pixel region P. In order to minimize horizontal cross talk between the data line 94 and the pixel electrodes 96b and 96c, the first vertical part 86b and the second vertical part ( 86c) is widely configured.

In this case, the pixel electrode and the common electrode may further design foreground blocking means B1 and B2 having an oblique area at a corner portion where the vertical portions 86b, 86c / 96b and 96c meet the horizontal portions 86a and 96a. .

In the corner portions where the horizontal portions 86a and 96a and the vertical portions 86b, 86c / 96b and 96c of the electrodes meet, the direction of generation of the electric field is different from the center of the pixel region P, so that foreground lines due to light leakage are generated. Done.

Therefore, when the foreground blocking means B1 and B2 are configured, luminance may be lowered, but the foreground line may be blocked.

However, when a liquid crystal (not shown) in which the initial alignment direction is horizontally arranged is used, rubbing is performed in a horizontal direction to give a pre-tilt angle to the liquid crystal (not shown). do.

In this case, rubbing defects are caused by the foreground line blocking means B1 and B2. In particular, rubbing defects by the foreground blocking means B1 formed on the common electrodes 56a, 56b, and 56c are widely generated. .

In the following, the rubbing failure will be described with reference to FIG. 4.

4 is an enlarged plan view of Z of FIG. 3.

Referring to the drawings, as described above, the vertical portion 86c of the common electrode is configured to have a wider width than the vertical portion 96c of the pixel electrode. Therefore, the vertical portion 86c of the common electrode is located closer to the center portion of the pixel region P than the vertical portion 96c of the pixel electrode.

At this time, the foreground line blocking means B1 having an area oblique in the horizontal direction in the vertical portion 86c of the common electrode is further designed. When rubbing is performed in the illustrated rubbing direction, the foreground line blocking means B1 is oblique. Due to poor rubbing by the side, light leakage occurs widely.

Therefore, in this case, since the light leakage appears wider by the foreground blocking means B1, the foreground blocking effect by the foreground blocking means B1 becomes meaningless.

Such rubbing defects are generated by the foreground line blocking means B1 of the common electrode, but rubbing defects by the foreground line blocking means B2 of the pixel electrode do not occur.

Because the pixel electrodes 96a, 96b and 96c of FIG. 3 deposit indium tin oxide (ITO) through a sputtering method, they are thinner than the common electrodes 86a, 86b and 86c of FIG. This is because it is not possible to feel the step difference caused by the foreground blocking means B2 of the pixel electrode (96a, 96b, 96c in FIG. 3) during the rubbing process.

On the other hand, there is a problem that the display quality of the liquid crystal panel is lowered due to a rubbing defect caused by the foreground line blocking means B1 of the common electrode.

The present invention has been proposed to solve the above-mentioned problem, and when forming the common electrode when patterning a plurality of horizontal parts configured in the horizontal direction and the first and second vertical parts connecting them to one from one side and the other side as one And removing the blocking means patterned at an obliquely inclined area at the corner portion where the vertical portion and the horizontal portion meet.

An array substrate for a transverse electric field type liquid crystal display device according to the present invention for achieving the above object is a substrate; A gate line extending in one direction on the substrate and a data line crossing the gate line to define a pixel area; A switching element configured at an intersection of said gate wiring and data wiring; A common electrode formed on the same layer as the gate line in the pixel area, and having a plurality of horizontal parts arranged in the same direction as the gate line, and having a first vertical part and a second vertical part connecting the same to one side and the other side of the horizontal part as one; and; A plurality of horizontal parts connected to the switching element and configured in the pixel area between the horizontal parts of the common electrode, and first and second parts configured on one side and the other side of the horizontal part and connecting them to one; And a transparent pixel electrode including a vertical portion and including foreground line blocking means formed at a portion where the vertical portion and the horizontal portion meet each other.

The common electrode may not constitute a foreground line blocking means at a portion where the horizontal portion and the first and second vertical portions meet.

사이의 기울기를 가지도록 구성하고, 상.하로 화소 영역에 대응하여 대칭되도록 구성한 것을 특징으로 한다.The horizontal portion

It is configured to have a slope between, and characterized in that configured to be symmetrical corresponding to the pixel area up and down.

The switching element includes a thin film transistor including a gate electrode connected to the gate wiring, an active layer and an ohmic contact layer having a gate insulating layer interposed therebetween, and a source electrode and a drain electrode formed on the ohmic contact layer. to be.

First and second vertical portions of the pixel electrode overlap each other with a smaller width on top of the first and second vertical portions of the common electrode.

 An array substrate manufacturing method for a transverse electric field type liquid crystal display device according to a feature of the present invention comprises the steps of preparing a substrate; Defining a plurality of pixel regions on the substrate; Forming a gate wire extending along one side of the pixel region, and a common electrode disposed in the pixel region and having a plurality of horizontal parts and a first vertical part and a second vertical part connecting the ones at one side and the other side of the horizontal part to one; Wow; Forming a data line crossing the gate line; Forming a switching element at an intersection point of the gate line and the data line; A plurality of horizontal parts connected to the switching element and configured in the pixel area between the horizontal parts of the common electrode, and first and second parts configured on one side and the other side of the horizontal part and connecting them to one; And forming a transparent pixel electrode including a vertical portion and including foreground line blocking means formed at a portion where the vertical portion and the horizontal portion meet each other.

The common electrode does not form a foreground line blocking means at a portion where the horizontal portion and the first and second vertical portions meet.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

--Example--

Hereinafter, a configuration of an array substrate according to the present invention will be described with reference to the drawings.

5 is an enlarged plan view of an enlarged pixel of an array substrate for a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention.

As shown in the drawing, the gate wiring 102 extending in one direction on the substrate 100 and the data wiring 118 defining the pixel region P by crossing the gate wiring 102 are formed.

The thin film transistor T, which is a switching element, is formed at the intersection point of the gate line 102 and the data line 118.

The thin film transistor T is positioned on the gate electrode 104 in contact with the gate wire 102, the active layer 110 on the gate electrode 104, and the active layer 110 on the data wire 118. ) And a drain electrode 116 spaced apart from the source electrode 114.

Common electrodes 106a, 106b and 106c and pixel electrodes 126a, 126b and 126c are formed in the pixel region P, and the common electrodes 106a, 106b and 106c and pixel electrodes 126a, 126b and 126c. Are both a plurality of horizontal parts 106a and 126a, and are located at one side and the other side of the horizontal parts 106a and 126a, and the first vertical parts 106b and 126b and the second vertical parts (the two vertical parts) to connect them to each other. 106c and 126c).

In order to prevent the pixel electrodes 126a, 126b and 126c and the common electrodes 106a, 106b and 106c from being shorted, the two electrodes are formed in separate layers, and the common electrodes 106a, 106b and 106c are The gate wirings and the gate electrodes 102 and 104 are formed of the same material and the pixel electrodes 126a, 126b, and 126c are formed of a transparent conductive material.

In this case, the first vertical portion 126b and the second vertical portion 126c of the pixel electrode are overlapped and configured to have a smaller width on the first and second vertical portions 106b and 106c of the common electrode. The horizontal portion 106c of the common electrode and the horizontal portion 126c of the pixel electrode are alternately arranged at regular intervals.

)를 가지도록 구성하는 동시에, 상,하 화소영역별로 대칭되도록 구성하면, 색보상 특성을 통한 컬러쉬프트 특성을 최소화 할 수 있어 시야각 특성을 더욱 개선할 수 있는 장점이 있다.The horizontal portions 126a and 106a of the pixel electrode and the common electrode are tilted (

) And at the same time configured to be symmetrical for each of the upper and lower pixel regions, it is possible to minimize the color shift characteristics through the color compensation characteristics, thereby further improving the viewing angle characteristics.

On the other hand, the pixel electrode constitutes a foreground blocking means 150 having an oblique area at the corner portion where the horizontal portion 126a and the vertical portions 126b and 126c meet, but the common electrode is perpendicular to the horizontal portion 106a. It is characterized in that the foreground blocking means 150 is not configured at the corner where the parts 106b and 106c meet.

In this way, rubbing defects do not occur during the rubbing process that proceeds in the horizontal direction at the portions where the vertical portions 106b and 106c and the horizontal portion 106a of the common electrode thicker than the pixel electrodes 126a, 126b and 126c meet. Thus, high contrast characteristics can be obtained.

Therefore, a transverse electric field type liquid crystal display device having high display quality can be manufactured.

Hereinafter, a method of manufacturing an array substrate for a transverse electric field type liquid crystal display device according to the present invention will be described with reference to the process drawings.

6A to 6D and FIGS. 7A to 7D are cross-sectional views illustrating cutting processes of VI-VI, VIII-VIII of FIG. 5 and according to the process sequence of the present invention.

As illustrated in FIGS. 6A and 7A, the pixel region P including the switching region S is defined on the substrate 100.

Aluminum (Al), aluminum alloy (AlNd), chromium (Cr), molybdenum (Mo), copper (Cu), titanium (A) on the entire surface of the substrate 100 in which the switching region and the pixel regions S and P are defined. A plurality of wirings (102 in FIG. 4) extending in one direction of the substrate and patterned by stacking and patterning one or more materials selected from the group of conductive metals including Ti), and the gate wiring (102 in FIG. 4). ) And a plurality of horizontal portions 106a having a rod shape in the same direction as the gate wiring 102 (102 of FIG. 4) corresponding to the pixel region. Located on one side and the other side of 106a, a common electrode consisting of a first vertical portion 106b and a second vertical portion 106c connecting them together is formed.

The common electrodes 106a, 106b, and 106c having such a shape are connected to each adjacent pixel region P. FIG.

At this time, the first and second vertical portion (106b, 106c) and the horizontal portion 106 is characterized in that the pattern so that the obliquely inclined area does not exist.

Next, silicon nitride (SiN _X ) and silicon oxide (SiO ₂ ) are included on the entire surface of the substrate 100 on which the gate wiring, the gate electrodes 102 and 104 of FIG. 4, and the common electrodes 106a, 106b and 106c are formed. The gate insulating layer 108 is formed by depositing one selected from the group of inorganic insulating materials.

Pure amorphous silicon (a-Si: H) and impurity amorphous silicon (N + a-Si: H) are sequentially deposited on the entire surface of the substrate 100 on which the gate insulating layer 108 is formed, thereby forming an amorphous silicon layer (not shown). And an impurity amorphous silicon layer (not shown) are formed and patterned to form an active layer 110 and an ohmic contact layer 112 on the gate insulating film 108 corresponding to the gate electrode 104.

6B and 7B, the ohmic contact layer is formed by depositing and patterning one or more selected metals among the aforementioned conductive metal groups on the entire surface of the substrate 100 on which the ohmic contact layer 112 is formed. A data line 118 is formed to form a source electrode 114 and a drain electrode 116 spaced apart from the upper portion of the 112, and to be connected to the source electrode 114 and to be configured to cross the gate line 104. Form.

As shown in FIGS. 6C and 7C, silicon nitride (SiN _x ) and silicon oxide (SiO ₂ ) are formed on the entire surface of the substrate 100 on which the source and drain electrodes 114 and 116 and the data line 118 are formed. One or more materials selected from the group of inorganic insulating materials may be deposited, or in some cases, one or more selected from the group of organic insulating materials including benzocyclobutene (BCB) and an acrylic resin (resin) may be coated. 120).

Next, the passivation layer 120 is patterned to form a drain contact hole 122 exposing a part of the drain electrode 114.

6D and 7D, an indium tin oxide (ITO) and an indium zinc oxide (IZO) are deposited and patterned on the entire surface of the substrate 100 on which the passivation layer 120 is formed. The pixel electrode 126 positioned in the pixel region P is formed while contacting the drain electrode 114.

The pixel electrode 126 is disposed between the horizontal portions 106a of the common electrode and is spaced apart in parallel with each other, and the horizontal portions 106a are positioned on one side and the other side of the horizontal portion 106a to form the plurality of horizontal portions. A first vertical portion 126b and a second vertical portion 126b connecting the portions 126a to each other are formed.

In this case, the first vertical portion 126a and the second vertical portion 126b overlap the upper portion of the first vertical portion 106b and the second vertical portion 106c of the common electrode with a smaller width. The pixel electrode 126 is designed to extend the foreground line blocking means (150 of FIG. 4) having an obliquely inclined area at a corner portion where the horizontal portion 126a and the second vertical portions 126b and 126c meet. .

The pixel electrodes 126a, 126b, and 126c have a thickness of about 400 microseconds, which is very thin compared to the thicknesses of the common electrodes 106a, 106b, and 106c (about 2500 microseconds). Rubbing failure by the foreground line blocking means (150 of FIG. 4) of the electrode does not occur.

In addition, a portion where the horizontal portions 106a and the vertical portions 106b and 106c of the common electrode meet each other does not constitute the foreground line blocking means, thereby preventing a wide range of light leakage due to poor rubbing. Panels have the advantage of achieving high contrast.

Accordingly, when the array substrate for a transverse electric field type liquid crystal display device according to the present invention forms a common electrode composed of a horizontal portion and a vertical portion, unlike the prior art, the foreground line blocking means having an oblique area at an edge portion where the horizontal portion and the vertical portion meet each other. By not forming the light leakage during the rubbing process that proceeds in the horizontal direction can be minimized because rubbing failure does not occur.

Therefore, a high contrast can be obtained and the display quality can be improved.

In addition, the structure in which the common electrode and the pixel electrode are configured in the horizontal direction can secure a wider opening area, thereby achieving high brightness.

In addition, by giving a slope to the horizontal portion of the pixel electrode and the common electrode, by forming a symmetrical structure for each pixel region, color shift through color compensation can be minimized, thereby securing a wider viewing angle. .

Claims (10)

A substrate; A gate line extending in one direction on the substrate and a data line crossing the gate line to define a pixel area; A switching element configured at an intersection of said gate wiring and data wiring; A common electrode formed on the same layer as the gate line in the pixel area, and having a plurality of horizontal parts arranged in the same direction as the gate line, and having a first vertical part and a second vertical part connecting the same to one side and the other side of the horizontal part as one; and; A plurality of horizontal parts connected to the switching element and configured in the pixel area between the horizontal parts of the common electrode, and first and second parts configured on one side and the other side of the horizontal part and connecting them to one; A transparent pixel electrode comprising a vertical portion and a foreground line blocking means formed at a portion where the vertical portion and the horizontal portion meet each other Array substrate for a transverse electric field type liquid crystal display device comprising a. The method of claim 1. And wherein the common electrode does not constitute a foreground line blocking means at a portion where the horizontal portion and the first and second vertical portions meet each other. The method of claim 1, The horizontal portion

An array substrate for a transverse electric field type liquid crystal display device, which is configured to have an inclination therebetween and is configured to be symmetrically corresponding to the pixel area up and down. The method of claim 1, The switching element includes a thin film transistor including a gate electrode connected to the gate wiring, an active layer and an ohmic contact layer having a gate insulating layer interposed therebetween, and a source electrode and a drain electrode formed on the ohmic contact layer. Array board for phosphorus field type liquid crystal display device. The method of claim 1, And the first and second vertical portions of the pixel electrode overlap each other with a smaller width on top of the first and second vertical portions of the common electrode. Preparing a substrate; Defining a plurality of pixel regions on the substrate; Forming a gate wire extending along one side of the pixel region, and a common electrode disposed in the pixel region and having a plurality of horizontal parts and a first vertical part and a second vertical part connecting the ones at one side and the other side of the horizontal part to one; Wow; Forming a data line crossing the gate line; Forming a switching element at an intersection point of the gate line and the data line; A plurality of horizontal parts connected to the switching element and configured in the pixel area between the horizontal parts of the common electrode, and first and second parts configured on one side and the other side of the horizontal part and connecting them to one; Forming a transparent pixel electrode having a vertical portion and including foreground line blocking means formed at a portion where the vertical portion and the horizontal portion meet each other; Array substrate manufacturing method for a transverse electric field type liquid crystal display device comprising a. The method of claim 6. And the common electrode does not form a foreground line blocking means at a portion where the horizontal portion and the first and second vertical portions meet each other. The method of claim 6, The horizontal portion

A method for manufacturing an array substrate for a transverse electric field type liquid crystal display device, which is formed so as to have an inclination therebetween and is formed to be symmetrically corresponding to the pixel area up and down. The method of claim 6, The switching element includes a thin film transistor including a gate electrode connected to the gate wiring, an active layer and an ohmic contact layer formed with a gate insulating layer interposed therebetween, and a source electrode and a drain electrode formed on the ohmic contact layer. A method of manufacturing an array substrate for an inverse electric field type liquid crystal display device. The method of claim 6, And the first and second vertical portions of the pixel electrode overlap each other with a smaller width on top of the first and second vertical portions of the common electrode.

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