KR101089835B1 - Self Logic Testing Apparatus and Method of Digital Reactor Protection System - Google Patents

Abstract

The self logic test apparatus of a digital reactor protection system according to an embodiment of the present invention uses a first test input value stored in an internal first test memory area on a process variable input from a process sensor to test a first self logic test. A comparison logic processor to perform; A concurrent logic processor that performs a second self logic test using a second test input stored in an internal second test memory area and a comparison logic result from the comparison logic processor; And an automatic test and an associated processor that determine whether there is an abnormality in health for self-diagnosis of the comparison logic processor and the simultaneous logic processor using the first and second self-logic test results.

Digital Reactor Protection System, Self Logic Test, Comparative Logic Processor, Simultaneous Logic Processor, Automated Test and Linked Processor, Health Assessment

Description

Self Logic Test System and Method of Digital Reactor Protection System {SELF LOGIC TESTING DEVICE AND METHOD OF DIGITAL REACTOR PROTECTION SYSTEM}

Embodiments of the present invention relate to an apparatus and method for self logic testing of a digital reactor protection system.

A nuclear power plant usually consists of a system with more than 100 individual functions. These systems are largely divided into a nuclear steam supply system (NSSS) centered on a nuclear reactor, a secondary circulation cooling system that delivers steam to a generator, and a turbine that receives steam from the secondary circulation cooling system and runs a generator. Generator system, and other auxiliary equipment. Looking at the pressurized water reactor-type power plant, which is currently dominated by Korea's nuclear power plants, the primary system centered on nuclear reactors, the secondary system including steam generators, turbines, generators, and condensers, and the engineering safety facility system for accidents It consists of transmission and distribution system, measurement control system, and other auxiliary systems.

In order to monitor the health of each system while operating the nuclear power plant, various types of sensors must be installed in the reactor system, and the signals input from the sensors must be monitored to determine the state of the nuclear power plant. At this time, if there is an abnormality in the system affecting the safety of the reactor during operation of the nuclear power plant or an abnormality in the cooling function in the nuclear steam supply system, such an abnormal state is detected and the reactor stop function is started by the dropping of the control rod. The reactor operating system must be driven to cool the reactor, and the reactor protection system is the actual implementation of this process.

The reactor protection system serves to protect the nuclear reactor, keeping the nuclear power plant safe even if an accident occurs in the nuclear power plant, and preventing radiation and radioactive material from leaking to the outside. Thus, the nuclear reactor protection system plays the most important role in the safety and reliability of nuclear power plants.

For the optimal application of the reactor protection system to the power plant site, it is necessary to implement the reactor protection system with high reliability and high precision, and also to stop the reactor in the event of minor failures inside and outside the reactor protection system. There should be no.

To this end, nuclear power plants usually form a reactor protection system with multiple channels (usually four). When four channels are implemented, each of the four channels receives a plant status signal from a sensor or a device belonging to the channel to determine reactor shutdown or safety device operating conditions, and the reactor protection system includes two out of four channels. In consideration of the determination result from the above channel, when the set condition is satisfied, an operation signal is generated to stop the reactor or operate the safety equipment.

To date, the reactor protection system (or power plant protection system) developed and operated in Korea is divided into analog type and digital type. The digital reactor protection system has been adopted in nuclear power plants after Uljin Units 5 and 6, and all of them were analog reactor protection systems. In the case of analog reactor protection systems, no on-line testing or diagnostics exist, so system integrity checks rely on periodic integrity tests conducted periodically by manual tests by operators and maintenance personnel.

In the case of digital reactor protection systems (Uljin 5, 6, Shingori 1,2), on-line testing and diagnostic concepts include hardware self-diagnosis and passive tests. Hardware self-diagnosis is a function that checks the integrity of hardware commonly used in digital devices. Passive tests can be performed by multiple automatic tests and multiple processors without inputting test equipment (automatic test and associated processor). It has the function of receiving input value (process value, etc.) and logic output value (trip state, etc.) input to safety essential logic from comparative logic processor and simultaneous logic processor, and comparing each other. It cannot be used as a logic test tool because it has a limit that cannot be checked for soundness.

Existing safety essential logic tests consist of manual start automatic test or automatic periodic test, and the commonality of these tests is to precede test order, test input of test facility, and simultaneous test between channels or groups should be prohibited. While linkage and interlocking signals have complex drawbacks, there are challenges such as maintaining the high quality of the test facility and demonstrating that the safety critical functions are not affected by the test signal.

One embodiment of the present invention allows the safety critical logic of the digital reactor protection system to be automatically checked online at all times, minimizing the linkage of the test facility with the safety critical controller, simplifying complex test conditions, and external to safety critical functions. An apparatus and method for self logic testing of a digital reactor protection system can be eliminated.

One embodiment of the present invention compensates for the limitations of the continuous on-line comparison function during operation of the digital reactor protection system, thereby performing a continuous on-line self-logic test that can test safety essential logic, thereby eliminating logic defects in the digital system. The present invention provides a self-logic test apparatus and method for a digital reactor protection system that can be found early to increase the reliability and operability of the digital reactor protection system.

An embodiment of the present invention excludes self-testing by the self-logic test processor and judges whether the self-logic test result is objectively performed by another processor, thereby making the wrong self-logic by the faulty self-test processor. The present invention provides a method and method for self-logic testing of a digital reactor protection system that can prevent operator confusion due to test results.

The problem to be solved by the present invention is not limited to the above-mentioned problem, another task (s) not mentioned will be clearly understood by those skilled in the art from the following description.

The self logic test apparatus of a digital reactor protection system according to an embodiment of the present invention uses a first test logic value stored in a first test memory area therein for a process variable input from a process sensor. A comparison logic processor to perform; A concurrent logic processor that performs a second self logic test using a second test input stored in an internal second test memory area and a comparison logic result from the comparison logic processor; And an automatic test and an associated processor that determine whether there is an abnormality in health for self-diagnosis of the comparison logic processor and the simultaneous logic processor using the first and second self-logic test results.

The self logic test method for a digital reactor protection system according to an exemplary embodiment of the present invention uses a first test input value stored in an internal first test memory area for a process variable input from a process sensor in a comparison logic processor. Performing a first self logic test; In a concurrent logic processor, performing a second self logic test using a second test input stored in an internal second test memory region and a comparison logic result from the comparison logic processor; And determining, at the automatic test and associated processor, the abnormality of the integrity of the self-diagnosis of the comparison logic processor and the simultaneous logic processor by using the first and second self-logic test results.

Specific details of other embodiments are included in the detailed description and the accompanying drawings.

Advantages and / or features of the present invention and methods for achieving them will become apparent with reference to the embodiments described below in detail in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various different forms, and only the embodiments make the disclosure of the present invention complete, and those skilled in the art to which the present invention pertains. It is provided to fully inform the person having the scope of the invention, which is defined only by the scope of the claims. Like reference numerals refer to like elements throughout.

According to one embodiment of the present invention, the safety essential logic of the digital reactor protection system can be automatically checked online at all times, minimizing the linkage between the test facility and the safety critical controller, simplifying complex test conditions, and External influences can be excluded.

According to one embodiment of the present invention, the logic of the digital system by performing a continuous on-line self-logic test that can test the safety essential logic, complementing the limitations of the continuous on-line comparison function during operation of the digital reactor protection system Early detection of defects can increase the reliability and operability of digital reactor protection systems.

According to an embodiment of the present invention, the self logic test processor excludes the self-judgement of the test result and judges whether the self logic test result is properly performed by another processor, thereby making a mistake by the faulty self test processor. Operator confusion caused by self-logic test results can be avoided.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram schematically illustrating a self logic test apparatus of a digital reactor protection system according to an embodiment of the present invention.

Referring to FIG. 1, the self-logic test apparatus 100 of a digital reactor protection system according to an embodiment of the present invention includes a comparison logic processor 110, a simultaneous logic processor 120, and an automatic test and associated processor 130. Include.

The comparison logic processor 110 and the concurrent logic processor 120 may be in a safety critical control path. The comparison logic processor 110 and the concurrent logic processor 120 may test their own logic on their own, without a test command from an external test facility outside of the safety critical control path. Therefore, according to the embodiment of the present invention, it is possible to minimize the linkage between the test equipment and the safety critical controller, to exclude external influences on the safety critical function, and to find defects of the safety critical logic in real time through online test. Can be.

The comparison logic processor 110 and the simultaneous logic processor 120 independently input the self test data into the safety essential logic so as not to affect the actual trip logic inherent in the digital reactor protection system. Values as well as self test inputs can be delivered simultaneously to the automated test and associated processor 130.

The comparison logic processor 110 and the simultaneous logic processor 120 may transmit the test result value to the automatic test and associated processor 130 together with the pulsation signal and the device diagnosis result.

The automatic test and the link processor 130 may determine whether there is an abnormality in the health of the self-diagnosis of the comparison logic processor 110 and the simultaneous logic processor 120 by using the test result value, the pulsating signal, and the device diagnosis result. have.

As a result of the determination, when there is an abnormality in the health of the self-diagnosis of the comparison logic processor 110 and the simultaneous logic processor 120, the automatic test and associated processor 130, the cabinet operator to provide a health alarm to the power plant personnel. May be passed to module 140. On the contrary, when the determination result shows that there is no abnormality in the health of the self-diagnosis of the comparison logic processor 110 and the simultaneous logic processor 120, the automatic test and the associated processor 130 indicate that there is no abnormality in the soundness. May be delivered to the cabinet operator module 140 to provide the power plant personnel.

2 is a detailed block diagram of a self logic test apparatus of a digital reactor protection system according to an embodiment of the present invention.

Referring to FIG. 2, the comparison logic processor 110 may block the possibility that the test logic and the actual logic become related in one scan by repeatedly performing the actual comparison logic once per processor scan time and the other self test logic once. .

When the comparison logic processor 110 is a test scan (a scan associated with self test logic), the comparison logic processor 110 stores a multi-stage test input value for each process variable, which is embedded in the first test memory area, which is its test memory area. bistable) to check whether the test result is tripped at each step. Here, the test input of each step is predetermined whether or not to trip when each test input is applied. The process variable is a value input from the process sensor 210, and each value corresponds to a test input value of each step, and the test input value of each step is stored in the first test memory area as described above. Stored.

The test input of each step for the process variable processed by the comparison logic processor 110 may include the next expected trip state. This will be described in detail with reference to FIG. 3. For reference, FIG. 3 is a diagram illustrating an example of predicting a trip state of a test result value corresponding to each step test input value according to an embodiment of the present invention.

Referring to FIG. 3, the comparison logic processor may provide a multi-level test input for the process variable to be tested. For the rising trip variable (process variable), the test inputs of steps 1 and 10 of each step test value are below the preliminary trip set point, and the expected test result value is a bit trip state. In addition, the 2, 3, 7 test input values are more than the preliminary trip set value and less than the trip set value, and an expected test result value is a preliminary trip state. In addition, the test input value of the 4th and 5th stages is more than the trip set value, and the anticipated test result value is a trip state. In addition, the six-stage test input value is not a trip state because it is above a trip set value or within a trip hysteresis value, and this test input value is tested for proper operation of hysteresis logic. In addition, the 9-step test input value is not a trip state because it is above a preliminary trip set value or within a trip hysteresis value, and this test input value is tested whether the hysteresis logic works properly. Finally, the 8th and 11th step test inputs give the hysteresis applied trip setpoint / preliminary trip setpoint to test whether the trip state is output. Falling trip variables (process variables) are also tested in similar steps.

Referring back to FIG. 2, the comparison logic processor 110 transmits the result of the self-logic test to the automatic test and associated processor 130 through a communication network. At this time, the comparison logic processor 110, in addition to the test result value, the test input value stored in the first test memory area, the self-diagnosis information (device diagnostic result) of the hardware, operating system, application program, and communication module, and its own heartbeat. The signal may be transmitted to the automatic test and associated processor 130.

The concurrent logic processor 120 inputs a multi-level test input for each of the process trip variables (process variables) into its own safety essential logic 230, embedded in a second test memory region, which is its test memory region, thereby providing each of the respective test trip variables. You can check the 2/4 logic and the starting logic of the test phase. Here, the test input value of each step may be a value consisting of a combination of expected output values of the comparison logic processor 110 of four channels. In addition, the process trip variable may indicate an output value (comparison logic result value) of the comparison logic processor 110 with respect to the process variable input from the process sensor 210.

The simultaneous logic processor 120 transmits the self logic test result (device diagnosis result) to the automatic test and associated processor 130 through the communication network. In addition to the test result value, the simultaneous logic processor 120 may perform self-test input values, self-test information of hardware, an operating system, an application program, and a communication module, and a self-beating signal of an automatic test and link processor. 130).

The concurrent logic processor 120 performs the passive OR logic on the self test input value and the comparison logic result value transmitted from the comparison logic processor 110, and then performs 2/4 voting logic to perform the 2/4 voting logic result. Can be entered in the trip start logic. However, during the self logic test, the concurrent logic processor 120 may disable the output of the 2/4 voting logic result to the initiating circuit 240.

The automatic test and associated processor 130 performs any test on the comparison logic processor 110 and the concurrent logic processor 120 that perform safety essential logic during the self logic test of the comparison logic processor 110 and the concurrent logic processor 120. No command signal or test input data is provided.

The automatic test and associated processor 130 uses the self-logic test results performed by the comparison logic processor 110 and the concurrent logic processor 120 to determine the automatic logic of the comparison logic processor 110 and the concurrent logic processor 120. Health can be confirmed.

The automatic test and associated processor 130 may confirm whether the comparison logic processor 110 and the simultaneous logic processor 120 that performed the self logic test are sound first in order to make a strong determination of the self logic test result. At this time, the automatic test and associated processor 130 is a self-diagnostic result of the self-diagnostic by the comparison logic processor 110 and the simultaneous logic processor 120 and the comparison logic processor 110 and the simultaneous logic processor 120 to provide The health of the pulsating signal and the health of the self test data (test input value) used by the comparison logic processor 110 and the simultaneous logic processor 120 in the self logic test, etc. The health of the logical processor 120 may be checked.

The automatic test and associated processor 130 ignores the result of the self logic test when there is an error in the results of the self logic test of the comparison logic processor 110 and the concurrent logic processor 120, and compares the comparison logic processor 110 and the concurrent logic. The health abnormality alarm of the logic processor 120 may be provided to the cabinet operator module 140. Self-diagnostics of the comparison logic processor 110 and the concurrent logic processor 120 may include diagnostic data for an input / output card, an operating system, an application program, a backplane bus, a communication device, and the like, but the diagnosis specification may vary depending on the characteristics of the platform. The automatic test and associated processor 130 monitors the pulsation signals transmitted by the comparison logic processor 110 and the simultaneous logic processor 120 to determine whether the comparison logic processor 110 and the concurrent logic processor 120 are sound. You can check. The pulsation signal monitoring logic may determine that there is an abnormality in the health of the comparison logic processor 110 when the pulsation signal of the predetermined number of times does not change or when the difference between the updated pulsation signal and the previous pulsation signal is out of an expected value (reference value). .

When the automatic test and associated processor 130 is checked by the methods described above, when it is determined that the integrity of the comparison logic processor 110 and the concurrent logic processor 120 is intact, the comparison logic processor 110 and the simultaneous processor 130 are simultaneously checked. Final determination of the self logic test of the logic processor 120 may be performed.

First, the automatic test and associated processor 130 may check whether the test data (test input value) used by the comparison logic processor 110 and the simultaneous logic processor 120 as an input in the self logic test is sound. Here, the test data used for the self logic test is a constant because it is a predetermined value at design and implementation. Therefore, the test input values built into the automatic test and associated processor 130 and the test input values built into the comparison logic processor 110 and the simultaneous logic processor 120 should be the same, and the test input values may not be the same. In that case, the automated test and associated processor 130 may prove that the comparison logic processor 110 and the concurrent logic processor 120, or the communication device, is not sound.

However, when the test input values coincide with each other, in the next step, the automatic test and associated processor 130 performs the test result values of the comparison logic processor 110 and the simultaneous logic processor 120 and the self-predicted test prediction. You can compare the results.

As a result of the comparison, when the test result value and the test prediction result value coincide with each other, the automatic test and link processor 130 may display a signal indicating that there is no abnormality of the test result (health no abnormality signal) and detailed test results of each process variable. Cabinet operator module 140 may be delivered. On the other hand, if the test result value and the test prediction result value is inconsistent, the automatic test and associated processor 130 with the test abnormal signal (health abnormality alarm) and detailed test results of each process variable cabinet operator module 140 Can be delivered to.

4 is a flowchart illustrating a self logic test method of a digital reactor protection system according to an embodiment of the present invention. Here, the self logic test method may be performed by the self logic test apparatus 100 of the digital atomic force protection system of FIGS. 1 and 2.

Referring to FIG. 4, in step 401, the comparison logic processor uses a first test input value stored in an internal first test memory area for a process variable (process input data) input from a process sensor. Logic tests can be performed.

That is, the comparison logic processor inputs the first test input values of the multi-step for each of the process variables (process input data) to the vise table logic, so as to correspond to the first test input values of the respective steps. You can generate a result. The comparison logic processor may perform the first self logic test by checking whether the generated first test result value is in a trip state.

The comparison logic processor may alternately perform the first self logic test and comparison logic every processor scan time.

Next, in step 402, the concurrent logic processor may perform a second self logic test using the second test input stored in the second test memory area therein and the comparison logic result from the comparison logic processor. have.

That is, the concurrent logic processor may perform passive OR logic operation on the comparison logic result value (process output data) and the multi-stage second test input value for each of the comparison logic result values. The concurrent logic processor may perform the second self logic test by performing 2/4 voting logic and trip start logic on the operation result to check 2/4 logic and trip start logic of each step. have.

The concurrent logic processor may block outputting a 2/4 voting logic result to the initiating circuit when the first self logic test is being performed.

Next, in step 403, the automatic test and the associated processor may determine whether there is an abnormality in the health of the self-diagnosis of the comparison logic processor and the simultaneous logic processor using the first and second self-logic test results. have.

As a result of the determination, if there is an abnormality in the health (YES direction of 404), in step 412, the automatic test and associated processor may provide the cabinet operator module with a health abnormality alarm. On the other hand, if the determination resulted in the integrity (no direction of 404), in step 405, the automatic test and associated processor further uses the pulsating signals from the comparison logic processor and the simultaneous logic processor, The health of the self-diagnosis of the comparison logic processor and the concurrent logic processor may be determined.

Specifically, the automatic test and associated processor may be configured to change the pulsation signal (first pulsation signal) from the comparison logic processor for a predetermined number of times, or to update the update value of the first pulsation signal and the update previous value of the first pulsation signal. When the difference deviates from the reference value, it may be determined that there is an abnormality in the health of the self-diagnosis of the comparison logic processor. In addition, the automatic test and the associated processor does not change the pulsation signal (second pulsation signal) from the simultaneous logic processor for a predetermined number of times, or the difference between the update value of the second rhythm signal and the update previous value of the second rhythm signal. If it is out of the reference value, it can be determined that there is an abnormality in the health of the self-diagnosis of the simultaneous logic processor.

As a result of the determination, if there is an abnormality in the health (YES direction 406), in step 412, the automatic test and associated processor may provide the cabinet operator module with a health abnormality alarm. On the other hand, when the determination result shows that there is no abnormality in the health (No direction in 406), in step 407, the automatic test and the associated processor determine the test input value (first test input value) of the comparison logic processor, and The health of the self-diagnosis of the comparison logic processor and the concurrent logic processor is compared by comparing the test input value (second test input value) of the concurrent logic processor with the test input value (third test input value) of the automatic test and associated processor. You can determine if there is an abnormality.

Specifically, when the automatic test and associated processor do not coincide with the first test input value and the third test input value stored in the third test memory area therein, the automatic test and associated processor may be configured to provide health to self-diagnosis of the comparison logic processor. It can be judged that there is an abnormality. In addition, when the second test input value and the third test input value do not coincide with each other, the automatic test and associated processor may determine that there is an abnormality in the health of the self-diagnosis of the simultaneous logic processor.

As a result of the determination, if there is an abnormality in the health (YES direction 408), in step 412, the automatic test and associated processor may provide the cabinet operator module with a health abnormality alarm. On the other hand, when the determination result shows that there is no abnormality in the health (No direction in 408), in step 409, the automatic test and the associated processor simultaneously executes the test result value (first test result value) of the comparison logic processor. By comparing the test result value (second test result value) of the logical processor with the third test result predicted value which is a self-predicted value, it is possible to determine the presence or absence of health abnormality for the comparison logic processor and the simultaneous logic processor.

That is, when the first test result value and the second test result value do not coincide with the third test result value, the automatic test and the associated processor have abnormalities in the health of the comparison logic processor and the simultaneous logic processor. It can be judged that.

As a result of the determination, if there is an abnormality in the health (YES direction 410), in step 412, the automatic test and associated processor may provide the cabinet operator module with a health abnormality alarm. On the other hand, if there is no abnormality in the health ("No" direction 410), the automatic test and associated processor in step 411 may provide a health and health abnormality signal to the cabinet operator module.

Embodiments of the present invention include computer readable media including program instructions for performing various computer implemented operations. The computer readable medium may include program instructions, local data files, local data structures, or the like, alone or in combination. The media may be those specially designed and constructed for the purposes of the present invention, or they may be of the kind well-known and available to those having skill in the computer software arts. Examples of computer-readable recording media include magnetic media such as hard disks, floppy disks, and magnetic tape, optical recording media such as CD-ROMs, DVDs, magnetic-optical media such as floppy disks, and ROM, RAM, flash memory, and the like. Hardware devices specifically configured to store and execute the same program instructions are included. Examples of program instructions include not only machine code generated by a compiler, but also high-level language code that can be executed by a computer using an interpreter or the like.

While specific embodiments of the present invention have been described so far, various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the claims below, but also by the equivalents of the claims.

As described above, the present invention has been described by way of limited embodiments and drawings, but the present invention is not limited to the above-described embodiments, which can be variously modified and modified by those skilled in the art to which the present invention pertains. Modifications are possible. Accordingly, the spirit of the present invention should be understood only by the claims set forth below, and all equivalent or equivalent modifications thereof will belong to the scope of the present invention.

1 is a block diagram schematically illustrating a self logic test apparatus of a digital reactor protection system according to an embodiment of the present invention.

2 is a detailed block diagram of a self logic test apparatus of a digital reactor protection system according to an embodiment of the present invention.

FIG. 3 is a diagram illustrating an example of predicting whether a test result value corresponding to each step test input value is tripped according to an exemplary embodiment of the present invention.

4 is a flowchart illustrating a self logic test method of a digital reactor protection system according to an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

100: Self logic test device of digital reactor protection system

110: comparison logic processor

120: concurrent logical processor

130: automatic test and associated processor

140: cabinet driving module

Claims (17)

A comparison logic processor for performing a first self logic test and comparison logic on a process variable input from the process sensor, using a first test input value stored in a first test memory area; A concurrent logic processor that performs a second self logic test using a second test input value stored in a second test memory area and a comparison logic result according to the comparison logic test; And Using the result according to the first self logic test and the first pulsation signal from the comparison logic processor, it is determined whether there is an abnormality in the health of the self-diagnosis of the comparison logic processor, and the result according to the second self logic test. And an automatic test and linked processor for determining whether there is an abnormality in health for self-diagnosis of the concurrent logic processor using a second pulsating signal from the concurrent logic processor. Self logic test apparatus of the digital reactor protection system comprising a. The method of claim 1, The comparison logic processor, Inputting the first test input for each of the process variables into a vise table logic to generate a plurality of first test result values, Self logic test apparatus of the digital reactor protection system for performing the first self logic test by checking whether the trip state of the generated first test result value. The method of claim 1, The comparison logic processor, A self logic test apparatus of a digital reactor protection system for alternately performing the first self logic test and the comparison logic every processor scan time. The method of claim 1, The concurrent logical processor, Passive OR logic operation on the comparison logic result value and the second test input value for each of the comparison logic result values, Self logic testing apparatus of a digital reactor protection system for performing said second self logic test by checking a 2/4 voting logic and a trip start logic against said passive OR logic operation result. The method of claim 1, The simultaneous logical processor, A self logic test apparatus of a digital reactor protection system for blocking output of a 2/4 voting logic result to an initiating circuit when the first self logic test is being performed. The method of claim 1, The automatic test and associated processor, Comparing the first test result value corresponding to the first test input value and the second test result value corresponding to the second test input value with its own test result prediction value, Self logic test apparatus of the digital reactor protection system for determining the presence or absence of abnormality in the health according to the comparison result. delete The method of claim 1, The automatic test and associated processor, When the first rhythm signal does not change for a predetermined number of times, or the difference between the update value of the first rhythm signal and the previous value of the update of the first rhythm signal is out of a reference value, abnormality in the health of the self-diagnosis of the comparison logic processor. Judging by the presence of When the second pulsation signal does not change for a predetermined number of times, or the difference between the update value of the second pulsation signal and the update previous value of the second pulsation signal is out of a reference value, abnormality in the health of the self-diagnosis of the simultaneous logic processor. A self-logic test device for a digital reactor protection system that is considered to be present. The method of claim 1, The automatic test and associated processor, Further using the first test input value, it is determined whether there is an abnormality in the health of the self-diagnosis of the comparison logic processor, And further using the second test input value to determine whether there is an abnormality in health for self-diagnosis of the simultaneous logic processor. 10. The method of claim 9, The automatic test and associated processor, If the first test input value and the third test input value stored in the third test memory area do not match, it is determined that there is an abnormality in the health of the self-diagnosis of the comparison logic processor. And the second test input value and the third test input value do not coincide with each other, and determine that there is an abnormality in the integrity of the self-diagnosis of the simultaneous logic processor. The method of claim 1, The automatic test and associated processor, And if it is determined that there is an abnormality in the integrity, a self-test device for the digital reactor protection system for providing a health alarm to the cabinet operator module. In the comparison logic processor, performing a first self logic test on a process variable input from the process sensor using a first test input stored in an internal first test memory area; In a concurrent logic processor, performing a second self logic test using a second test input stored in an internal second test memory region and a comparison logic result from the comparison logic processor; Determining, in an automatic test and associated processor, whether there is an abnormality in the health of the self-diagnosis of the comparison logic processor by using a result of the first self logic test and a first pulsation signal from the comparison logic processor; And Determining, at the automated test and associated processor, whether there is an abnormality in the health of the self-diagnosis of the concurrent logic processor by using the second self-logic test result and the second pulsation signal from the concurrent logic processor. Self logic test method of the digital reactor protection system comprising a. The method of claim 12, The performing of the first self logic test may include: Inputting a multi-stage first test input value for each of the process variables into bistable logic to generate a first test result value corresponding to the first test input value for each step; And Checking the trip state of the generated first test result and performing the first self logic test Self logic test method of the digital reactor protection system comprising a. The method of claim 12, The performing of the second self logic test may include: Performing a passive OR logic operation on the comparison logic result and the multi-stage second test input for each of the comparison logic result; And Performing the second self logic test by performing 2/4 voting logic and trip start logic on the operation result to check the 2/4 logic and trip start logic of each step. Self logic test method of the digital reactor protection system comprising a. delete The method of claim 12, Determining whether there is an abnormality in the health of the self-diagnosis of the comparison logic processor, Determining whether there is an abnormality in health for self-diagnosis of the comparison logic processor by further using the first test input value. Including, Determining whether there is an abnormality in the health of the self-diagnosis of the simultaneous logic processor, Determining whether there is an abnormality in health for self-diagnosis of the simultaneous logic processor by further using the second test input value. Self logic test method of the digital reactor protection system comprising a. A computer-readable recording medium having recorded thereon a program for performing the method of claim 12.

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