KR101084532B1 - 엘이디 칩의 테스트장치 - Google Patents
엘이디 칩의 테스트장치 Download PDFInfo
- Publication number
- KR101084532B1 KR101084532B1 KR1020110025428A KR20110025428A KR101084532B1 KR 101084532 B1 KR101084532 B1 KR 101084532B1 KR 1020110025428 A KR1020110025428 A KR 1020110025428A KR 20110025428 A KR20110025428 A KR 20110025428A KR 101084532 B1 KR101084532 B1 KR 101084532B1
- Authority
- KR
- South Korea
- Prior art keywords
- led chip
- block
- blade
- gold
- turntable
- Prior art date
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 24
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 24
- 239000010931 gold Substances 0.000 claims abstract description 24
- 229910052737 gold Inorganic materials 0.000 claims abstract description 24
- 239000000523 sample Substances 0.000 claims abstract description 10
- 229910010293 ceramic material Inorganic materials 0.000 claims abstract description 4
- 238000005498 polishing Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 7
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 230000002950 deficient Effects 0.000 description 6
- 230000003287 optical effect Effects 0.000 description 5
- 230000007547 defect Effects 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 238000006748 scratching Methods 0.000 description 1
- 230000002393 scratching effect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2872—Environmental, reliability or burn-in testing related to electrical or environmental aspects, e.g. temperature, humidity, vibration, nuclear radiation
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/06—Measuring leads; Measuring probes
- G01R1/067—Measuring probes
- G01R1/073—Multiple probes
- G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
- G01R31/2632—Circuits therefor for testing diodes
- G01R31/2635—Testing light-emitting diodes, laser diodes or photodiodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Environmental & Geological Engineering (AREA)
- Computer Hardware Design (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Optics & Photonics (AREA)
- General Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Power Engineering (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Led Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
이를 위해, 세라믹재질로 이루어지고 턴테이블(11)에 일정 각도 유지되게 고정되는 복수 개의 블록(12)과, 상기 블록의 상면에 위치되어 테스트할 LED 칩(13)이 로딩되는 골드블록(14)과, 상기 블록(12) 및 골드블록(14)에 관통되게 형성되어 진공압이 걸리는 진공 홀(15)과, 상기 턴테이블(11)의 상면에 설치되어 1개의 블레이드(17a)는 LED 칩(13)의 상면에 형성된 접속단자(18a)에 접속되고, 다른 1개의 블레이드(17b)는 LED 칩(13)이 로딩된 골드블록(14)의 상면에 접속되는 프로브 카드(16)로 구성된 것을 특징으로 한다.
Description
도 2는 종래의 LCD 칩을 나타낸 평면도
도 3은 본 발명의 장치를 나타낸 종단면도
도 4는 본 발명에 적용되는 LED 칩을 나타낸 평면도
13 : LED 칩 14 : 골드블록
15 : 진공 홀 16 : 프로브 카드
17a, 17b : 블레이드 18a, 18b : 접속단자
Claims (2)
- 턴테이블(11)의 상면에 프로브 카드(16)를 설치하여 1개의 블레이드(17a)는 LED 칩(13)의 상면에 형성된 접속단자(18a)에 접속하고, 다른 1개의 블레이드(17b)는 LED 칩(13)이 로딩된 블록의 상면에 접속되도록 하여 LED 칩의 특성을 테스트하는 엘이디 칩의 테스트장치에 있어서, 턴테이블(11)에 세라믹재질로 이루어진 복수 개의 블록(12)을 일정 각도 유지되게 고정하고 상기 블록의 상면에는 테스트할 LED 칩(13)이 로딩됨과 동시에 상면을 연마하여 재사용하는 골드블록(14)을 고정하며 상기 블록(12) 및 공드블록(14)에는 진공압이 걸리는 진공 홀(15)을 관통되게 형성하여서 된 것을 특징으로 하는 엘이디 칩 테스트장치.
- 삭제
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110025428A KR101084532B1 (ko) | 2011-03-22 | 2011-03-22 | 엘이디 칩의 테스트장치 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110025428A KR101084532B1 (ko) | 2011-03-22 | 2011-03-22 | 엘이디 칩의 테스트장치 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR101084532B1 true KR101084532B1 (ko) | 2011-11-18 |
Family
ID=45397865
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020110025428A KR101084532B1 (ko) | 2011-03-22 | 2011-03-22 | 엘이디 칩의 테스트장치 |
Country Status (1)
Country | Link |
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KR (1) | KR101084532B1 (ko) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001506752A (ja) | 1996-12-12 | 2001-05-22 | ジージービー インダストリーズ,インコーポレーテッド | 高速テスト用プローブカード |
KR100969975B1 (ko) * | 2010-04-05 | 2010-07-15 | (주)큐엠씨 | 엘이디 칩 분류장치 및 그 보정유닛 |
-
2011
- 2011-03-22 KR KR1020110025428A patent/KR101084532B1/ko active IP Right Grant
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001506752A (ja) | 1996-12-12 | 2001-05-22 | ジージービー インダストリーズ,インコーポレーテッド | 高速テスト用プローブカード |
KR100969975B1 (ko) * | 2010-04-05 | 2010-07-15 | (주)큐엠씨 | 엘이디 칩 분류장치 및 그 보정유닛 |
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