KR101070366B1 - Two step auto tuning circuit of Voltage Control Oscillator for wide-band - Google Patents

Abstract

The present invention relates to the design of a voltage controlled oscillator, which is one of the lower blocks of a phase locked loop (PLL), and more particularly, to a two-stage automatic tuning broadband voltage controlled oscillator for supplying a frequency in a wide band.

According to the present invention, in the two-stage automatic tuning broadband voltage controlled oscillator, the transconductance of the voltage controlled oscillator is controlled until the output peak value detected from the output of the voltage controlled oscillator reaches the first reference voltage (Gm_REF). And controlling the current of the voltage controlled oscillator to supply a frequency having a constant amplitude until the first tuning unit for oscillating with a large amplitude and the output peak value detected from the output of the voltage controlled oscillator become the second reference voltage V_REF. And a bias unit configured to input a bias voltage to the voltage controlled oscillator, a first reference voltage Gm_REF to the first tuning unit, and a second reference voltage V_REF to the second tuning unit. It is characterized by.

Broadband, Voltage Controlled Oscillators, Tuning

Description

Two step auto tuning circuit of Voltage Control Oscillator for wide-band}

The present invention relates to the design of a voltage controlled oscillator, which is one of the lower blocks of a phase locked loop (PLL), and more particularly, to a two-stage automatic tuning broadband voltage controlled oscillator for supplying a frequency in a wide band.

In the wireless communication transceiver, a voltage controlled oscillator having a wide band characteristic is required, and since a general voltage controlled oscillator has a narrow bandwidth characteristic when a fixed LC tank is used, an LC tank is configured to obtain a wide bandwidth. The varactor diode can be made larger, but the gain (Kvco) is increased, resulting in worse phase noise characteristics of the oscillator.

The voltage controlled oscillator, which is one of the sub-blocks of the phase-locked loop that supplies the frequency in the wireless communication receiver, determines the performance of the phase-locked loop block. The oscillation frequency range of the voltage controlled oscillator needs to be widened in various applications requiring wide oscillation (Digital TV, Ultra Wide Band, Clock and Data Recovery).

Therefore, two or more voltage controlled oscillators were previously used for broadband. Such a wideband voltage controlled oscillator has a problem in that a parameter value is changed in a low frequency band and a high frequency band and a process change cannot be overcome.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a two-stage automatic tuning broadband voltage controlled oscillator for supplying a frequency in a wide band.

In addition, another object of the present invention is to enable the oscillation in a wide band without using two or more voltage controlled oscillator through two-step tuning combined with digital tuning, analog tuning.

In addition, another object of the present invention is to eliminate the number of cases that do not oscillate at a low frequency, to minimize the phase noise to supply a frequency of a constant amplitude.

The present invention is a two-stage automatic tuning wideband voltage controlled oscillator, the previous state by controlling the transconductance of the voltage controlled oscillator until the output peak value detected from the output of the voltage controlled oscillator reaches the first reference voltage (Gm_REF) A first tuning unit configured to oscillate with a larger amplitude; A second tuning unit controlling the current of the voltage controlled oscillator to supply a frequency having a constant amplitude until an output peak value detected from the output of the voltage controlled oscillator becomes a second reference voltage V_REF; And a bias unit for inputting a bias voltage to the voltage controlled oscillator, a first reference voltage Gm_REF to the first tuning unit, and a second reference voltage V_REF to the second tuning unit. Characterized in that it comprises a.

According to the present invention as described above, it is possible to oscillate in a wide band without using two or more voltage controlled oscillator through two-step tuning combined with digital tuning, analog tuning.

In addition, there is an effect that eliminates the possibility of not oscillating at a low frequency or oscillation by a process, voltage, temperature change.

It also has the effect of eliminating the possibility of varying amplitudes at broadband.

Specific features and advantages of the present invention will become more apparent from the following detailed description based on the accompanying drawings. In the meantime, when it is determined that the detailed description of the known functions and configurations related to the present invention may unnecessarily obscure the subject matter of the present invention, it should be noted that the detailed description is omitted.

1 is a schematic block diagram of a two-stage automatic tuning wideband voltage controlled oscillator according to an embodiment of the present invention.

As shown in FIG. 1, the two-stage automatic tuning broadband voltage controlled oscillator according to an embodiment of the present invention is a voltage controlled oscillator 100, a first tuning unit 200, a second tuning unit 300, and a bias unit. And 400.

The two-stage automatic tuning broadband voltage controlled oscillator according to an embodiment of the present invention is subjected to two tuning loops. The first tuning is a digital automatic tuning loop and the second tuning is an analog automatic amplitude tuning. Loop (Analog Automatic Amplitude Control (AAC) Tuning Loop).

Voltage controlled oscillator (100)

In the VCO core 120 of the voltage controlled oscillator 100 according to an embodiment of the present invention, as shown in FIG. 2, two inverters are cross coupled to provide a negative Gm, thereby providing a voltage controlled oscillator (VCO). The oscillation frequency is determined by the inductor and the effective capacitance value. The current consumption of the VCO core is determined by a constant current source controlled by the core bias (CORE_BIAS). Conventionally (A) is composed of a 4-bit Cap Bank can create 2 ⁴ (= 16) K _VCO curve (oscillation gain). In the VCO core 120 according to the present embodiment, the cap bank is implemented with 8 bits as shown in FIG. 2 to implement a wider tuning range with more K _VCO curves.

In addition, an adaptive body biasing (ABB) circuit is added to realize low power. This ABB circuit reduces the threshold voltage (V _TH ), helping the VCO to oscillate with less current.

3 is a graph of input and output characteristics of the voltage controlled oscillator (VCO) of the present invention. As shown in FIG. 3, the oscillation frequency increases as the control voltage V_CTRL increases, because the effective capacitance of the Varactor (Variable Capacitor) decreases as the control voltage V_CTRL increases. By the Cap_bank controlled by C_CONT <n: 0>, the voltage controlled oscillator VCO has 2 ⁿ K _VCO curves (oscillation gain). As shown in FIG. 3, the larger the number of Cap_banks, the wider the tuning range.

4 is a circuit diagram of a negative Gm bank 110 according to an embodiment of the present invention. Here, the negative Gm bank is composed of four negative Gm cells. 4A is a circuit diagram of a negative Gm bank of a simplified voltage controlled oscillator (VCO), and B is a circuit diagram of one Gm cell of a negative Gm bank of a voltage controlled oscillator (VCO). If only the LC-Tank and negative Gm of FIG. 4A can oscillate the voltage controlled oscillator VCO, there is a negative Gm bank 110 connected thereto. Looking at B of FIG. 4 in detail, it is similar to B of FIG. 4 but instead of the LC-Tank is missing, a switch for turning on / off the negative Gm is added. Therefore, negative Gm is formed when Gm_enable = '1' of FIG. 1. Negative Gmbanks are connected in parallel to the existing negative Gm so that each time the negative Gm cell unit is turned on one by one, the total negative Gm of the voltage-controlled oscillator (VCO) is increased to oscillate at a larger amplitude. At this time, the Gm_enable signal is controlled by the Gm Tuning Digital Block 230.

For reference, the voltage controlled oscillator according to the present embodiment includes a VCO core and a negative Gm bank.

The VCO core receives a bias voltage as a gate terminal, a power supply consisting of a first transistor 1 having a source terminal connected to a power supply VDD, an LC tank for generating a resonance frequency, the power supply and the LC And a first active portion connected to the tank portion to produce an output having a resonance frequency determined by the LC tank portion.

Here, the first active unit includes a first active module and a second active module, wherein the first active module has a source terminal connected to the drain terminal of the first transistor, a gate terminal connected to the drain terminal of the third transistor, and a body A second transistor 2 having a terminal connected to a body terminal of a third transistor, a third transistor 3 having a source terminal connected to a drain terminal of the first transistor and a gate terminal connected to a drain terminal of the second transistor 3 It is composed of

The second active module has a fourth terminal in which a drain terminal is connected to the drain terminal of the second transistor, a body terminal is connected to the body terminal of the fifth transistor, a gate terminal is connected to the drain terminal of the fifth transistor, and a source terminal is grounded. The transistor 4 and the drain terminal are connected to the drain terminal of the third transistor, the gate terminal is connected to the drain terminal of the fourth transistor, and the source terminal is composed of a fifth transistor 5 connected to ground.

In addition, the LC tank unit, the two inverters are coupled to each other to form a negative Gm to generate a resonant frequency determined by the inductor and the effective capacitance value, characterized in that composed of Cap_Bank of 8 bits.

In addition, the VCO core is characterized in that it comprises an ABB circuit for oscillating at low power by reducing the threshold voltage (V _TH ), this ABB circuit is composed of a first ABB module and a second ABB module.

The first ABB module has a source terminal and a body terminal of the sixth and sixth transistors 6 and 7 connected to a common body terminal of the first active module, and a drain terminal of the sixth transistor 6 and the seventh transistor 7, A sixth transistor 6 connected between the gate terminal of the seventh transistor and a gate terminal of the seventh transistor connected to a drain terminal of the third transistor through a drain terminal of the seventh transistor; and a drain terminal of the sixth transistor connected to a drain terminal of the third transistor. The seventh transistor 7 is connected between the gate terminals of the sixth transistor, and the gate terminal is connected to the drain terminal of the second transistor through the drain terminal of the sixth transistor.

In the second ABB module, source terminals and body terminals of the eighth transistor 8 and the ninth transistor 9 are connected to the common body terminal of the second active module, and the drain terminal is connected to the drain terminal of the fourth transistor. An eighth transistor 8 connected between the gate terminals of the ninth transistor, the gate terminal of which is connected to the drain terminal of the fifth transistor through a drain terminal of the ninth transistor, and the drain terminal of the fifth transistor; And a ninth transistor 9 connected between the gate terminal of the eighth transistor and a gate terminal connected to the drain terminal of the fourth transistor through the drain terminal of the eighth transistor.

On the other hand, the negative Gm bank is connected in parallel with the VCO core to oscillate with a larger amplitude in accordance with the control signal of the first tuning unit.

The negative Gm bank receives a bias voltage Gm_BIAS as a gate terminal, and includes a second power supply unit including an eleventh transistor 11 having a source terminal connected to a power supply VDD, and a control signal Gm_enable of the first tuning unit. At least one negative Gm cell including at least one negative Gm cell including a switch unit for receiving on / off and a second active unit connected to the power supply unit and the switch unit to oscillate with an amplitude determined by the switch unit, respectively Characterized in that connected to.

Here, the second active part includes an eleventh active module and a twelfth active module, wherein the source terminals of the twelfth transistor 12 and the thirteenth transistor 13 have a common source of the eleventh transistor. Is connected to the drain terminal, the gate terminal is connected to the gate terminal of the fourteenth transistor 14 through the second switch terminal 17 of the switch unit, the drain terminal of the VCO_OUT output of the first switch terminal 16 of the switch unit A twelfth transistor 12 having a terminal connected to the drain terminal of the fourteenth transistor, a body terminal connected to a body terminal of the thirteenth transistor 13, and a gate terminal connecting the first switch terminal 16 of the switch unit; The thirteenth transistor 13 is connected to the gate terminal of the fifteenth transistor 15 and the drain terminal thereof is connected to the drain terminal of the fifteenth transistor through the VCO_OUTB output terminal of the switch unit.

In the twelfth active module, source terminals of the fourteenth transistor 14 and the fifteenth transistor 15 are grounded, and a gate terminal thereof is connected to the gate terminal of the twelfth transistor through the second switch terminal 17 of the switch unit. A drain terminal connected to the drain terminal of the twelfth transistor through the VCO_OUT output terminal of the first switch terminal 16, and a fourteenth transistor 14 having a body terminal connected to the body terminal of the fifteenth transistor 15; The gate terminal is connected to the gate terminal of the thirteenth transistor through the first switch terminal 16 of the switch unit, and the drain terminal is connected to the drain terminal of the thirteenth transistor through the VCO_OUTB output terminal of the second switch terminal 17. It consists of a fifteenth transistor 15 to be connected.

In addition, the negative Gm cell according to the present embodiment is configured to include an ABB circuit which makes the threshold voltage V _TH small and oscillates at low power. The ABB circuit includes a third ABB module and a fourth ABB module. The third ABB module includes source and body terminals of the twenty-first transistor 21 and the twenty-second transistor 22 and the eleventh active module. A drain terminal is connected between the drain terminal of the twelfth transistor and the gate terminal of the twenty-second transistor, and the gate terminal is connected to the drain terminal of the thirteenth transistor through the drain terminal of the twenty-second transistor; A twenty-first transistor 21 and a drain terminal are connected between the drain terminal of the thirteenth transistor and the gate terminal of the twenty-first transistor, and the gate terminal is connected to the drain terminal of the twelfth transistor through the drain terminal of the twenty-first transistor. It consists of a twenty-second transistor 22 connected to.

In the fourth ABB module, source terminals and body terminals of the twenty-third transistor 23 and the twenty-fourth transistor 24 are connected to the common body terminal of the twelfth active module, and the drain terminal of the fourth ABB module is formed of the drain terminal of the fourteenth transistor. A twenty-third transistor 23 connected between a gate terminal of a twenty-fourth transistor, a gate terminal of which is connected to a drain terminal of the fifteenth transistor through a drain terminal of the twenty-fourth transistor, and a drain terminal of which is connected to a drain terminal of the fifteenth transistor; The twenty-fourth transistor 24 is connected between the gate terminals of the twenty-third transistor, and the gate terminal is connected to the drain terminal of the fourteenth transistor through the drain terminal of the twenty-third transistor.

First tuning unit 200

The first tuning unit 200 is configured to digitally tune. When the peak value of the oscillated voltage is small after detecting the peak value of the voltage controlled oscillator and comparing it with a reference voltage, the transconductance of the voltage controlled oscillator is greatly increased. To oscillate with greater amplitude.

The first tuning unit 200 performing this function includes a first peak detector 210, a latch comparator 220, and a Gm tuning digital module 230.

The first peak detector 210 is a component that senses the DC value of the positive peak of the voltage controlled oscillator (VCO) output. Here, the detected DC value is PEAK_A.

For reference, the peak detector delivers the DC value (V _MAX ) of the positive peak of the voltage-controlled oscillator (VCO) output swing to the output.

[Equation 1]

V (PEAK_A or PEAK_B) = V _MAX -V _TH

5 is a circuit diagram illustrating a peak detector according to an embodiment of the present invention. Here, the capacitor C ₁ serves as a low pass filter to reduce the AC component.

The latch comparator 220 is a component that compares the output PEAK_A received from the first peak detector with the reference value Gm_REF received from the bias unit. The latch comparator receives the output PEAK_A of the first peak detector and the reference value Gm_REF of the bias unit, and compares PEAK_A, which is the output of the first peak detector, with Gm_REF, which is a reference value of the bias unit. Output Gm_updown = "0".

6 is a circuit diagram illustrating a latch comparator according to an embodiment of the present invention. This latch comparator compares with Gm_REF, which is a reference value, when GAK_A is large, Gm_updown becomes '1', and when PEAK_A is small, Gm_updown becomes '0'.

The Gm tuning digital module 230 receives the output of the latch comparator and controls four negative gm cells of the voltage controlled oscillator. At this time, when Gm_updown = '0' is output from the latch comparator, the output of the Gm tuning digital module 230 is changed to Gm_enable <3: 0> = "0000"-> "1000", so that four negatives of the voltage controlled oscillator 100 are generated. One of the Gm Cells 110 is turned on. A voltage controlled oscillator with a negative Gm Cell turned on oscillates with a larger amplitude than its previous state.

Here, the first peak detector 210 detects a larger DC value, so that PEAK_A becomes larger. The Gm tuning digital module increases the number of 1 in Gm_enable <3: 0> until PEAK_A becomes larger than Gm_REF.

At this time, the first automatic loop (Digital Automatic Gm Tuning Loop) ends when the output of the latch comparator (Gm_updown) becomes '1' or Gm_enable <3: 0> = "1111" and all negative Gm cells are turned on. After this first tuning loop, the Gm tuning digital module 230 outputs Gm_lock = '1'.

As shown in FIG. 14, the Gm tuning digital module according to an embodiment of the present invention has Gm_lock = '0' and Gm_enable = "0000" in the READY state. The reason why Gm_lock should be set to '0' is because AAC Tuning loop is not formed when Gm_lock is '0'. When Chip_enable, the total power on / off signal, becomes '1', it enters COMPARE state.

If the voltage-controlled oscillator (VCO) output amplitude is large and Gm_updown is 1, it immediately enters the FINAL state, and the digital tuning loop is completed. If the voltage-controlled oscillator does not oscillate or oscillates with a small amplitude and Gm_updown becomes '0', it enters the UP state and changes Gm_enable <3: 0> from "0000" to "1000".

One Gm cell is turned on and the output amplitude of the VCO is sensed again, and Gm_updown is delivered. Gm Cells are operated one by one until Gm_updown is '1' or Gm_enable is '1111' with all Gm_cells turned on.

When the final FINAL state is reached, Gm_lock becomes '1' and the second analog AAC tuning loop begins.

FIG. 7 is a circuit diagram briefly illustrating only the first tuning unit 200 among tuning circuits of a two-stage automatic tuning broadband voltage controlled oscillator according to an embodiment of the present invention. The output DC value of the voltage controlled oscillator oscillated by LC-tank and negative Gm is transmitted to the Gm digital tuning module through the first peak detector and the latch comparator.

Here, if the voltage controlled oscillator (VCO) does not oscillate or the oscillation amplitude is small, Gm_updown is '0', and if the VCO oscillates with a sufficiently large amplitude or Gm_enable <3: 0> is "1111", Gm_updown is '1'. .

In general, when the frequency is set to a low frequency (when the number of 1s of C_CONT <n: 0> is large), the VCO can be oscillated with a small amplitude, and the PVT (Process, Power Supply Voltage, Temperature variations may occur and the VCO may not oscillate. In this case, the Gm tuning loop turns on the negative Gm cell, allowing the VCO to oscillate with a sufficiently large amplitude.

8 is a graph for explaining the effect of the first tuning unit 200 of the present invention.

FIG. 8A shows the VCO characteristic curve before the Gm tuning (the amplitude of the VCO output swing with respect to the frequency change), and FIG. 8B shows the VCO characteristic curve after the Gm tuning. As shown in A of FIG. 8, when the operating condition of the VCO is the worst state (SS, 1.0V, 100 ° C.) in the low frequency region, oscillation may not be performed as in Region 2, but first When the negative Gm becomes large due to the first digital Gm tuning loop, the VCO oscillates with a larger amplitude as shown in B of FIG. 8. Therefore, the Gm tuning loop makes the VCO less sensitive to process, voltage, and temperature changes and has the effect of ensuring that the VCO always oscillates.

Second tuning unit 300

The second tuning unit 300 is an analog tuning structure, which detects the peak value of the voltage controlled oscillator, compares it with a reference voltage, and changes the current of the voltage controlled oscillator until the desired peak value is changed. Apply to supply a frequency of constant amplitude. That is, the second tuning unit finely adjusts the output swing of the voltage controlled oscillator.

The second tuning unit 300 performing this function is configured to include an analog MUX 310, a second peak detector 320, and a comparator 330.

The analog mux 310 initially receives Gm_BIAS from the bias unit and inputs it to the voltage controlled oscillator.After the first tuning loop, the analog mux 310 receives Gm_lock = '1', which is the output of the Gm tuning digital module 230. Connected to the AAC_OUT node.

Here, the analog mux receives the Gm_BIAS voltage from the bias unit, which determines the amount of current in the constant current source of the VCO core 120 of the voltage controlled oscillator 100, and the current of the VCO core and the number of negative Gm cells turned on. As the current is added, the voltage-controlled oscillator oscillates. At this time, the current amount of the VCO core constant current source is proportional to the negative Gm.

The second peak detector 320 detects an output positive peak of the voltage controlled oscillator (VCO) and is a component connected to the input of the comparator 330. Here, the detected peak value is PEAK_B.

As shown in FIG. 9, the comparator 330 compares the output PEAK_B received from the second peak detector with the reference value V_REF received from the bias unit using an opamp. The comparator 320 receives the output PEAK_B of the second peak detector and the reference value V_REF of the bias unit, and compares PEAK_B, which is the output of the second peak detector, with V_REF, which is a reference value of the bias unit, if PEAK_B is the reference value. If it is less than V_REF, the output AAC_OUT (initial value is 0V) becomes large.

Here, as the output AAC_OUT of the comparator 330 increases, the negative Gm value of the voltage controlled oscillator VCO_CORE increases, so that the voltage controlled oscillator VCO oscillates with a larger amplitude. Therefore, PEAK_B continues to increase and the DC value of the AAC_OUT node increases. The second tuning loop continues to operate until PEAK_B is equal to V_REF, and the second tuning loop ends when AAC_OUT is constant.

In this case, the output V_REF value of the bias unit may be controlled by a 3-bit input value of V_REF_CONT <2: 0> to adjust the output swing of the voltage controlled oscillator VCO.

Comparator 330 according to an embodiment of the present invention has a larger value of AAC_OUT when PEAK_B is larger than V_REF, which is a reference value, and a smaller value of AAC_OUT when PEAK_B is small. The stability of the feedback loop is controlled by adjusting the gain of the opamp and the Cc value of the second tuning loop (2nd Analog AAC Tuning Loop) (Fig. 1). In general, the larger the Cc value, the more the direction changes to improve the stability of the feedback loop.

FIG. 10 is a circuit diagram briefly illustrating only the second tuning unit 300 among tuning circuits of a two-step automatic tuning wideband voltage controlled oscillator according to an embodiment of the present invention. After the first digital Gm tuning, Gm_lock becomes '1', so a second analog AAC tuning loop is constructed.

Since the Gm_BIAS voltage is connected by the analog mux, the initial output of the analog mux is the Gm_BIAS voltage. This voltage determines the amount of current in the constant current source of the VCO core (the amount of current is proportional to the negative Gm). The VCO oscillates by adding the current of the VCO core and the number of negative Gm cells turned on. The outputs of VCO, VCO_OUT and VCO_OUTB, are connected to the second peak detector, which senses the VCO output DC and passes the PEAK_B value to the comparator.

At this time, the comparator compares the transferred PEAK_B value with V_REF received from the bias unit and returns it to AAC_OUT. The operation of the comparator is as follows. If PEAK_B is smaller than the comparison value V_REF, the voltage of AAC_OUT is lower. If PEAK_B is greater than the comparison value V_REF, the voltage of AAC_OUT is larger. If PEAK_B is smaller than V_REF, and the voltage at AAC_OUT is lowered, the constant current source causes a larger current to flow. Thus, the VCO will oscillate at a larger amplitude.

Since the second analog AAC tuning loop is a negative feedback circuit, the analog AAC tuning loop is again applied until the output DC value of the VCO is transferred to the second peak detector and the voltage of AAC_OUT is raised or lowered until the PEAK_B value is finally equal to the V_REF value. It works.

If the AAC_OUT value is constant, the amplitude of the VCO is constant, and the frequency setting is independent of the AAC tuning loop, so that a constant amplitude can be supplied over a wide band. The V_REF value can be adjusted in eight cases (= 2 ³ ) by V_REF_CONT <2: 0> in the bias section, so that the VCO output amplitude can be set by the designer.

11 is a graph for explaining the effect of the second tuning unit 300 of the present invention. Fig. 11A shows the VCO characteristic curve before AAC tuning (the amplitude of the VCO output swing with respect to the frequency change), and Fig. 11B shows the VCO characteristic curve after AAC tuning. If the operating condition of the VCO is the worst condition (FF, 1.4V, -40 ° C.) in the high frequency region as shown in FIG. 12A, the phase may be due to full swing as in Region 1 (Region 1). Phase Noise increases and the Harmonic component increases.

Also, oscillating the VCO above a certain amplitude is an excessive current draw and requires an analog AAC tuning loop. As shown in B of FIG. 11, after passing through the analog AAC tuning loop, the VCO always supplies a constant amplitude over a wide frequency range and has an effect of overcoming a large process, voltage, and temperature change.

Bias part 400

The bias unit 400 receives input data of eight cases (2 ³ ) by V_REF_CONT <2: 0>, outputs a Gm_BIAS voltage, inputs it to a voltage controlled oscillator, and outputs a Gm_REF reference voltage to the first tuning unit. Input to the latch comparator of (200), and outputs the V_REF reference voltage to the comparator of the second tuning unit 300.

12 is a circuit diagram of a bias unit according to an embodiment of the present invention. The voltage value of Gm_REF according to the present embodiment is as follows.

&Quot; (2) &quot;

Gm_REF = V _DD × R ₂ / (R ₁ + R ₂ )

Since the voltage of V_REF determines the output amplitude magnitude of the VCO, it must be designed for a variety of choices. Therefore, it can be controlled in 3 bits, so a total of 8 cases of voltage value can be made. The resistor distribution circuit is used to generate the voltage linearly from 0V to the supply voltage (V _DD ) and the output voltage is transferred through the buffer. .

13 is a graph of an output voltage according to setting of V_REF_CONT <2: 0> input to a bias unit according to an embodiment of the present invention. As shown in Fig. 13, each time the voltage setting increases by one bit, the output voltage increases linearly.

According to the present invention as described above, it is possible to oscillate in a wide band without using two or more voltage controlled oscillator through two-step tuning combined with digital tuning, analog tuning.

In addition, there is an effect that eliminates the possibility of not oscillating at a low frequency or oscillation by a process, voltage, temperature change.

And, there is an effect of eliminating the possibility that the amplitude can be changed in a wide band.

As described above and described with reference to a preferred embodiment for illustrating the technical idea of the present invention, the present invention is not limited to the configuration and operation as shown and described as described above, it is a deviation from the scope of the technical idea It will be understood by those skilled in the art that many modifications and variations can be made to the invention without departing from the scope of the invention. Accordingly, all such suitable changes and modifications and equivalents should be considered to be within the scope of the present invention.

1 is a schematic block diagram of a two stage autotuning wideband voltage controlled oscillator in accordance with one embodiment of the present invention;

2 is a circuit diagram showing a VCO core of a voltage controlled oscillator according to an embodiment of the present invention.

3 is a graph of input and output characteristics of a voltage controlled oscillator (VCO) according to an embodiment of the present invention.

4 is a circuit diagram of a negative Gm bank according to an embodiment of the present invention.

5 is a circuit diagram illustrating a peak detector according to an embodiment of the present invention.

6 is a circuit diagram illustrating a latch comparator according to an embodiment of the present invention.

7 is a circuit diagram briefly illustrating a first tuning unit according to an embodiment of the present invention.

8 is a graph for explaining the effect of the first tuning unit of the present invention.

9 is a circuit diagram illustrating a comparator according to an embodiment of the present invention.

10 is a circuit diagram briefly illustrating a second tuning unit according to an embodiment of the present invention.

11 is a graph for explaining the effect of the second tuning unit of the present invention.

12 is a circuit diagram of a bias unit according to an embodiment of the present invention.

13 is a graph of output voltage according to setting of V_REF_CONT <2: 0> input to a bias unit according to an embodiment of the present invention.

14 is a state diagram of a first tuning unit according to an embodiment of the present invention.

** Description of Drawing Symbols **

100: voltage controlled oscillator 110: negative Gm bank

120: VCO core 200: first tuning unit

210: first peak detector 220: latch comparator

230: Gm tuning digital module 300: the second tuning unit

310: analog mux 320: second peak detector

330: comparator 400: bias portion

Claims (14)

In the two-stage automatic tuning broadband voltage controlled oscillator, A first tuning unit configured to control the transconductance of the voltage controlled oscillator to oscillate with a larger amplitude than the previous state until the output peak value detected from the output of the voltage controlled oscillator reaches a first reference voltage Gm_REF; A second tuning unit controlling the current of the voltage controlled oscillator to supply a frequency having a constant amplitude until an output peak value detected from the output of the voltage controlled oscillator becomes a second reference voltage V_REF; And A bias unit for inputting a bias voltage to the voltage controlled oscillator, a first reference voltage Gm_REF to the first tuning unit, and a second reference voltage V_REF to the second tuning unit; Two-stage automatic tuning broadband voltage controlled oscillator comprising a. The method of claim 1, The first tuning unit, A first peak detector configured to sense an output peak value PEAK_A of the voltage controlled oscillator; A latch comparator receiving an output peak value from the first peak detector and comparing a reference value Gm_REF received from the bias unit; And A Gm tuning digital module that receives the output of the latch comparator and controls the voltage controlled oscillator; Two-stage automatic tuning broadband voltage controlled oscillator comprising a. The method of claim 1, The first tuning unit, When the output peak value sensed by the voltage controlled oscillator reaches the first reference voltage Gm_REF received from the bias unit, Gm_lock = '1' signal for terminating the first tuning loop is output. Phase autotuning broadband voltage controlled oscillator. The method of claim 1, The second tuning unit, A second peak detector configured to sense an output peak value PEAK_B of the voltage controlled oscillator; A comparator for receiving an output peak value from the second peak detector and comparing a reference value V_REF received from the bias unit; And When the bias voltage is received from the bias unit and input to the voltage controlled oscillator, and the output peak value of the first tuning unit reaches the first reference voltage Gm_REF received from the bias unit, the comparator is connected to the comparator. An analog mux for inputting the output of the signal to the voltage controlled oscillator; Two-stage automatic tuning broadband voltage controlled oscillator comprising a. The method of claim 1, The bias unit, And a reference voltage (V_REF) input to the second tuning unit according to a 3-bit input value received from an external device. The method of claim 1, The voltage controlled oscillator, A power supply unit comprising a first transistor 1 having a bias voltage input to a gate terminal and a source terminal connected to a power supply VDD, an LC tank unit generating a resonance frequency, the power supply unit and the LC tank unit; A VCO core connected to include a first active part to generate an output having a resonance frequency determined by the LC tank part; And A negative Gm bank connected in parallel with the VCO core to oscillate with a larger amplitude according to a control signal of the first tuning unit; Two-stage automatic tuning broadband voltage controlled oscillator comprising a. The method of claim 6, The first active portion of the VCO core, A second transistor 2 having a source terminal connected to the drain terminal of the first transistor, a gate terminal connected to the drain terminal of the third transistor, and a body terminal connected to the body terminal of the third transistor; A first active module comprising a third transistor 3 connected to the drain terminal of the first transistor and the gate terminal connected to the drain terminal of the second transistor; And A fourth transistor 4 having a drain terminal connected to the drain terminal of the second transistor, a body terminal connected to the body terminal of the fifth transistor, a gate terminal connected to the drain terminal of the fifth transistor, and a source terminal connected to ground; And a second active module including a fifth transistor 5 having a drain terminal connected to the drain terminal of the third transistor, a gate terminal connected to the drain terminal of the fourth transistor, and a source terminal connected to the ground. Two-stage automatic tuning broadband voltage controlled oscillator. The method of claim 6, The LC tank unit, A two-stage automatic tuning wideband voltage controlled oscillator comprising two inverters coupled to each other to form a negative Gm to generate a resonant frequency determined by an inductor and an effective capacitance value, and composed of 8 bits of Cap_Bank. The method of claim 7, wherein The VCO core, And an ABB circuit for lowering the threshold voltage (V _TH ) to oscillate at low power. The method of claim 9, The ABB circuit, Source terminals and body terminals of the sixth transistor 6 and the seventh transistor 7 are connected to the common body terminal of the first active module, A sixth transistor 6 having a drain terminal connected between the drain terminal of the second transistor and the gate terminal of the seventh transistor, the gate terminal of which is connected to the drain terminal of the third transistor through the drain terminal of the seventh transistor; A seventh transistor 7 having a drain terminal connected between a drain terminal of the third transistor and a gate terminal of the sixth transistor, and a gate terminal of which is connected to a drain terminal of the second transistor through a drain terminal of the sixth transistor The first ABB module consisting of; And Source terminals and body terminals of the eighth transistor 8 and the ninth transistor 9 are connected to the common body terminal of the second active module, An eighth transistor 8 having a drain terminal connected between a drain terminal of the fourth transistor and a gate terminal of the ninth transistor, the gate terminal of which is connected to the drain terminal of the fifth transistor through a drain terminal of the ninth transistor; A ninth transistor 9 having a drain terminal connected between a drain terminal of the fifth transistor and a gate terminal of the eighth transistor, and a gate terminal of which is connected to the drain terminal of the fourth transistor through a drain terminal of the eighth transistor; A second ABB module consisting of; Two-stage automatic tuning broadband voltage controlled oscillator comprising a. The method of claim 6, The negative Gm bank, A second power supply unit comprising an eleventh transistor 11 receiving a bias voltage Gm_BIAS as a gate terminal and a source terminal connected to a power supply VDD; A switch unit configured to receive on / off the control signal Gm_enable of the first tuning unit; A two-stage automatic tuning comprising: at least one negative Gm cell connected to the power supply unit and the switch unit and including a second active unit to oscillate at an amplitude determined by the switch unit; Broadband Voltage Controlled Oscillator. The method of claim 11, The second active portion, Source terminals of the twelfth transistor 12 and the thirteenth transistor 13 are connected to the common drain terminal of the eleventh transistor, The gate terminal is connected to the gate terminal of the fourteenth transistor 14 through the second switch terminal 17 of the switch unit, and the drain terminal is formed through the VCO_OUT output terminal of the first switch terminal 16 of the switch unit. A twelfth transistor 12 connected to the drain terminal of the fourteenth transistor and a body terminal of the fourteenth transistor connected to a body terminal of the thirteenth transistor 13; A thirteenth gate terminal connected to the gate terminal of the fifteenth transistor 15 through the first switch terminal 16 of the switch unit, and a drain terminal connected to the drain terminal of the fifteenth transistor through the VCO_OUTB output terminal of the switch unit; An eleventh active module composed of a transistor 13; And Source terminals of the fourteenth transistor 14 and the fifteenth transistor 15 are grounded, A gate terminal is connected to the gate terminal of the twelfth transistor through the second switch terminal 17 of the switch unit, and a drain terminal is connected to the drain terminal of the twelfth transistor through the VCO_OUT output terminal of the first switch terminal 16. A fourteenth transistor 14 having a body terminal connected to a body terminal of the fifteenth transistor 15, A gate terminal is connected to the gate terminal of the thirteenth transistor through the first switch terminal 16 of the switch unit, and a drain terminal is connected to the drain terminal of the thirteenth transistor through the VCO_OUTB output terminal of the second switch terminal 17. And a twelfth active module comprising a fifteenth transistor (15). The method of claim 11, The negative Gm cell, And an ABB circuit for lowering the threshold voltage (V _TH ) to oscillate at low power. The method of claim 13, The ABB circuit, Source terminals and body terminals of the twenty-first transistor 21 and the twenty-second transistor 22 are connected to the common body terminal of the eleventh active module, A twenty-first transistor 21 having a drain terminal connected between a drain terminal of the twelfth transistor and a gate terminal of the twenty-second transistor, and a gate terminal thereof connected to the drain terminal of the thirteenth transistor through a drain terminal of the twenty-second transistor; A twenty-second transistor 22 having a drain terminal connected between a drain terminal of the thirteenth transistor and a gate terminal of the twenty-first transistor, and a gate terminal of which is connected to the drain terminal of the twelfth transistor through the drain terminal of the twenty-first transistor; A third ABB module consisting of; And Source terminals and body terminals of the twenty-third transistor 23 and the twenty-fourth transistor 24 are connected to the common body terminal of the twelfth active module, A twenty-third transistor 23 having a drain terminal connected between the drain terminal of the fourteenth transistor and the gate terminal of the twenty-fourth transistor, the gate terminal of which is connected to the drain terminal of the fifteenth transistor through the drain terminal of the twenty-fourth transistor; A twenty-fourth transistor 24 having a drain terminal connected between a drain terminal of the fifteenth transistor and a gate terminal of the twenty-third transistor, and a gate terminal of which is connected to the drain terminal of the fourteenth transistor through a drain terminal of the twenty-third transistor A fourth ABB module consisting of; Two-stage automatic tuning broadband voltage controlled oscillator comprising a.

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