KR101051176B1 - Fuse Structures for Highly Integrated Semiconductor Devices - Google Patents

Abstract

According to the present invention, a plurality of patterns included in a fuse are electrically connected through a blowing process after implementing the fuse in the semiconductor device in a plurality of electrically disconnected patterns. The semiconductor device according to the present invention is formed between two different terminals, and is characterized in that it comprises a fuse which is converted into a state in which the two terminals are electrically disconnected during the blowing process.

Semiconductors, Fuses, Thermal Degradation, Copper

Description

Fuse structure for highly integrated semiconductor devices {FUSE STRUCTURE FOR HIGH INTEGRATED SEMICONDUCTOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly, to a fuse that is included in a highly integrated semiconductor device and determines whether to transmit an electrical signal or connect two different terminals.

In general, a fuse is defined as a type of circuit breaker that is used to prevent overcurrent from flowing in a line. In other words, the fuse melts itself by the heat generated by the electric current, which can be easily seen in the surrounding life. Fuses keep current flowing under normal conditions, but if they are blown, they permanently block the flow of current until it is replaced with a new one, which is different from a switch that can control the blocking or connection of current flow. have.

The semiconductor device is designed to operate according to a predetermined purpose by injecting impurities into a predetermined region of a silicon wafer or depositing a new material. A representative example is a semiconductor memory device. The semiconductor memory device includes many elements such as transistors, capacitors, and resistors to perform a predetermined purpose, and a fuse is one of them. Fuses are used in various places in semiconductor memory devices, and representative examples thereof include redundancy circuits and power supply circuits. Fuses used in these circuits remain normal during the manufacturing process, but are selectively blown (ie, blown) through various tests after manufacture.

The redundancy circuit will be described in more detail. When a specific unit cell is defective in the semiconductor memory device, a recovery step is performed to replace the spare unit with an extra normal cell. That is, when an address for accessing a defective unit cell is input from the outside, the recovery step stores the address of the defective unit cell so that the redundant normal cell can be accessed instead of the defective unit cell. Prevent access. The most commonly used fuse in this recovery phase is a laser blown through the corresponding fuse in the semiconductor device to blow the fuse and permanently break the place where the electrical connection was maintained. This operation is called fuse blowing.

The semiconductor memory device includes a plurality of unit cells, and no one knows where a defective unit cell exists among the plurality of unit cells after the manufacturing process. Accordingly, in the semiconductor memory device, a fuse box including a plurality of fuses may be provided to replace a normal spare unit cell even if a defect occurs in any of the unit cells.

The data storage capability of the semiconductor memory device is increasing. As a result, the number of unit cells included therein increases, and the number of fuses used to replace a spare unit cell when a defect occurs also increases. On the other hand, the total area of the semiconductor memory device is reduced and high integration is required. As described above, since some of the plurality of fuses selectively blow a laser to physically blow, a predetermined distance between the fuses should be maintained in order not to affect neighboring fuses that are not blown. However, this becomes a factor of lowering the degree of integration of the semiconductor memory device. Therefore, there is a need for a technology that reduces the area occupied by the fuse box and does not cause defects in other fuses even if the fuse is selectively blown.

1 is a cross-sectional view illustrating a fuse in a conventional semiconductor device.

As shown, the semiconductor device typically includes a fuse 114 connecting two terminals to which different signals or voltages are formed on the interlayer insulating film 102 formed of an oxide film. The nitride film 116 and the passivation layer 118 are formed on the fuse 114. The passivation layer 118 over the blowing area of the fuse 114 is partially etched to form the fuse open area 120.

In recent years, highly integrated semiconductor devices use copper (Cu) having low resistance as the size and area of wirings, fuses, and the like decrease in resistance, thereby increasing resistance. However, in the case of a material having low strength, high heat conduction, and strong corrosion compared to other metal materials such as copper (Cu), the residues generated by the blowing of the fuse or the materials remaining in the fuse are subjected to high temperature or high humidity conditions. Can be migrated according to their electrochemical properties.

2A and 2B are a plan view and a cross-sectional view for explaining the problem of the fuse in the conventional semiconductor device described in FIG.

Referring to FIG. 2A, after a plurality of neighboring fuses 114A to 114D are blown, due to the movement of copper (Cu) in some fuses 114A, the density of copper (Cu) is lowered on one side of the fuse. Both ends of are electrically connected. Due to the physical properties of copper, the operation stability of the semiconductor device is deteriorated when the electrical connection occurs in spite of the blown fuse. In addition, the movement of copper (Cu) may damage even adjacent fuses that should not be blown when the neighboring fuse is blown.

Referring to FIG. 2B, in the case of another blown fuse 114E, a phenomenon in which both ends of the fuse are electrically connected after the blowing process will be described. As the fuse 114E is blown according to the amount of laser energy scanned during the blowing process, the interlayer insulating film 102 may be damaged at the bottom thereof. One of the most common occurrences is a crack. As described above, in the case of copper (Cu) constituting the fuse 114E, movement to a crack generated on the interlayer insulating film 102 is easy, and the crack is electrically filled with copper (Cu) to electrically fuse (114E). Both ends are easy to connect. In order to prevent this, reducing the amount of energy of the laser scanned during the blowing process may cause another problem in which the fuse 114E is not completely blown.

In order to prevent the above-mentioned disadvantages such as thermal degradation, fuses are manufactured using aluminum or tungsten-based metals having relatively lower thermal conductivity than copper. Due to the high power loss may occur due to processing speed delay or leakage current. In order to overcome this problem, the size of a fuse or a wiring must be increased, resulting in a high integration of semiconductor devices. However, in the case of forming the fuse using copper as described above, since the formation of the fuse is difficult due to the characteristic properties of the copper, a new fuse suitable for a highly integrated semiconductor memory device is required.

In order to solve the above-mentioned conventional problems, the present invention implements the fuse in the semiconductor device in a plurality of electrically disconnected pattern, and then a plurality of patterns included in the fuse is electrically connected through a blowing process, the conventional conductive layer The present invention provides a technique for improving the reliability of operation of a semiconductor device by preventing defects that may occur due to residues generated while removing a portion of a fuse formed through a blowing process.

The present invention includes a fuse for electrically connecting two different terminals, the fuse including a blowing area and first and second areas connected to the two terminals, the blowing area and the first and second areas. The semiconductor device is characterized by being electrically separated through the insulating film.

Preferably, the thickness of the insulating film between the first and second regions is about 30nm.

Preferably, during the blowing process, the blowing region expands and is electrically connected to the first and second regions through the insulating layer.

Preferably, the semiconductor device further comprises a barrier metal film deposited between the insulating film and the fuse.

Preferably, the insulating film includes an oxide film and further comprises a nitride film surrounding the insulating film.

Preferably, the nitride film may include a first nitride film for protecting a structure under the fuse; And a second nitride film for covering an upper portion of the fuse.

Preferably, the nitride film further includes a third nitride film formed between the fuse and the neighboring fuse.

Preferably, the fuse is characterized in that it comprises copper (Cu).

In addition, the present invention includes forming a fuse including a plurality of patterns, the plurality of patterns provides a method of manufacturing a semiconductor device, characterized in that the electrical blown.

Preferably, the method of manufacturing the semiconductor device further includes a step of performing a blowing process on the fuse to electrically connect the plurality of patterns.

Preferably, the plurality of patterns comprises a blowing area and first and second areas connected to the two terminals.

Preferably, the forming of the fuse comprises: forming a first nitride film on the insulating film; Depositing an oxide film on the first nitride film; Etching the oxide layer to form a plurality of trenches; And embedding a conductive material in the trench.

Preferably, the interval between the plurality of trenches is characterized in that about 30nm.

Preferably, the forming of the fuse further includes forming a barrier metal film before filling the conductive material in the trench.

Preferably, the manufacturing method of the semiconductor device further comprises the step of enclosing the fuse with a nitride film, the nitride film is characterized in that to prevent the movement of the residue after the fuse is blown to protect the internal circuit.

Preferably, the thermal expansion coefficient of the nitride film is about five times larger than the oxide film.

Preferably, the step of enclosing the fuse with a nitride film includes: forming a second nitride film on the fuse; Etching the oxide film formed between neighboring fuses to expose the first nitride film; Depositing a third nitride film on the remaining side of the oxide film, the second nitride film and the first nitride film; And forming a passivation layer on the third nitride film.

Preferably, the fuse is characterized in that it comprises copper (Cu).

The present invention forms a fuse included in a highly integrated semiconductor device in a plurality of electrically disconnected patterns, and then connects both ends of the blowing region and the fuse to each other through a blowing process by using a property in which a conductive material expands at a high temperature. After the blowing process, there is an advantage of preventing a defect in which both ends of the fuse are electrically connected due to the residue.

In addition, the present invention can overcome the disadvantages such as processing speed delay and power loss because the fuse can have a low resistance value while preventing the thermal deterioration or the movement of residues generated during blowing while forming a fuse using copper. .

According to the present invention, copper is formed during the blowing process of a specific fuse in forming a fuse using copper to prevent a processing delay and power loss due to an increase in resistance as the integration of semiconductor devices increases and the size of the fuse decreases. We propose a structure that can prevent defects caused by residues. Particularly, in order to overcome defects caused by residues during the blowing process, the fuses may be formed in a plurality of electrically disconnected patterns, and then the blowing process may be selectively performed to electrically connect both ends of the fuses. Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3A to 3C are plan views and cross-sectional views illustrating a fuse in a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 3A, a plurality of fuses 314 in the fuse box are arranged in parallel. Each fuse is a component of a semiconductor device that selectively selects an electrical connection between two different terminals. In the blowing process, two fuses are electrically switched from a disconnected state to a continuous state. Each fuse 314 includes a blowing area 352 and first and second areas 354 and 356 connected to two terminals on both sides of the blowing area 352, respectively. The conventional fuse 314 is generally formed of one conductive layer. However, in the fuse of the present invention, the blowing region 352 and the first and second regions 354 and 356 are electrically separated through the insulating film 358 before the blowing process. That is, the fuse 314 is formed in three patterns electrically separated from each other instead of one conductive layer. A barrier metal film 360 is formed between the insulating film 358 and the fuse 314, and a third insulating film 366 is formed between the adjacent fuses 314.

After the fuse 314 is formed, when the first and second regions 354 and 356 of the fuse 314 need to be electrically connected, a blowing process such as laser injection is performed to stress the blowing region 352. As the main surface, the blowing region 352 expands and is electrically connected to the first and second regions 354 and 356 through the insulating layer 358. Here, the thickness of the insulating film 358 formed between the blowing region 352 and the first and second regions 354 and 356 may be about 30 nm. However, the thickness of the insulating film 358 is only one example, and a process margin when forming a fine pattern of a peripheral region in a semiconductor device where a fuse is formed, an amount of energy of laser injected during a blowing process, or an insulating film 358 The thickness of the insulating film 358 may also be determined according to the properties of the material forming the material.

Meanwhile, before performing the blowing process, each pattern included in the fuse 314 must be prevented from being electrically connected to each other. Thus, the insulating film 358 is a chemical mechanical polishing process (CMP) in the process of filling the conductive material to form a pattern. The material and thickness are adjusted so that cracks do not occur in the course of carrying out such work.

Referring to FIG. 3B, the semiconductor device further includes a first nitride film 362 for protecting a structure positioned under the fuse 314, and a second nitride film 364 covering an upper portion of the fuse 314. An insulating film 358 is deposited on the first nitride film 362, and the blowing region 352 and the first and second regions 354 and 356 constituting the fuse 314 are formed on the insulating film 358. Pattern. The passivation layer 318 is formed on the second nitride film 364, and the fuse open region 320 is defined in the passivation layer 318 on the blowing region 352 of the fuse 314.

Referring to FIG. 3C, it can be seen that a third nitride film 366 is formed on each side of each of the fuses 314 of the semiconductor device insulated by the insulating film 358. 3A to 3C, it can be seen that the upper, lower, left, and right sides of each fuse 314 are surrounded by the nitride films of the first nitride film 362, the second nitride film 364, and the third nitride film 366. The fuse in the semiconductor device according to the exemplary embodiment of the present invention connects respective patterns in the fuse which are not electrically connected during the blowing process through the blowing process.

Here, the first nitride film 362, the second nitride film 364, and the third nitride film 366 may generate residues due to a blowing process to cause defects in a circuit, or may be caused by a given stress when blowing. This is necessary to prevent damage from spreading to neighboring fuses. The thermal expansion coefficients of the nitride films of the first nitride film 362, the second nitride film 364, and the third nitride film 366 are greater than those of the blowing region 352 and the insulating film 358 directly connected to the first and second regions 354 and 356. Is about five times larger. Accordingly, since the first nitride film 362, the second nitride film 364, and the third nitride film 366 are not easily destroyed during the blowing process, the residue or cracks can be prevented from being diffused.

4 is a cross-sectional view for describing a blowing process of a fuse in the semiconductor device illustrated in FIG. 3A. In particular, the process in which the fuse 314, which is not electrically connected at both ends, is electrically connected through a blowing process will be described.

As illustrated, when the blowing process is performed, the blowing region 352 in the fuse 314 expands and the insulating layer 358 formed between the blowing region 352 and the first and second regions 354 and 356. It is destroyed. The conductive part constituting the fuse 314 flows into the broken insulating layer 358 to form a connection part 402. The connection part 402 is caused by thermal expansion due to stress injected during the blowing process, and may occur in any area between the blowing area 352 and the first and second areas 354 and 356. In addition, a difference occurs in the contact area between the blowing region 352 and the first and second regions 354 and 356 by adjusting the amount of energy injected during the blowing process.

5A through 5I are cross-sectional views illustrating a method of manufacturing a fuse in the semiconductor device illustrated in FIG. 3A.

Referring to FIG. 5A, a first nitride film 362 is formed on the interlayer insulating film 501 formed on the semiconductor substrate. For reference, a plurality of components may be included between the semiconductor substrate and the interlayer insulating layer 501 in the semiconductor device, and thus description thereof is omitted here, and a plurality of fuses in the semiconductor device may be omitted. A manufacturing method will be described based on the fuse box to be formed.

Referring to FIG. 5B, an insulating film 358 is formed on the first nitride film 362. In one example, the insulating film 358 is composed of an oxide film.

Referring to FIG. 5C, a plurality of trenches 503 are formed by etching the insulating layer 358. In this case, the plurality of trenches 503 are regions in which the blowing region 352 and the first and second regions 354 and 356 included in the fuse 314 are to be formed. The interval between neighboring trenches 503 may be formed to about 30nm, it can be changed according to the embodiment.

Referring to FIG. 5D, a barrier metal film 360 is deposited on the trench 503. In this case, a metal such as TiN may be used as the barrier metal film 360. The conductive material 350 constituting the fuse 314 is deposited on the barrier metal film 360. In an embodiment of the present invention, copper (Cu) is used as a metal constituting the fuse 314.

Referring to FIG. 5E, a chemical mechanical polishing process (CMP) is performed until the upper portion of the insulating film 358 is exposed to form a plurality of metal patterns. At this time, the plurality of metal patterns are the blowing region 352 and the first and second regions 354 and 356 constituting the fuse 314.

Referring to FIG. 5F, a second insulating layer 364 is deposited on the blowing region 352 and the first and second regions 354 and 356. Before depositing the second insulating layer 364, an oxide film or the like that may be generated while the upper surface of the metal constituting the blowing region 352 and the first and second regions 354 and 356 is exposed, and the interfacial characteristics are improved. A dama wash may also be performed to make this possible.

Referring to FIG. 5G, the second insulating layer 364 and the insulating layer 368 positioned between the fuses 314 are removed. For example, after depositing a photoresist film (not shown) on the second insulating film 364, patterning using a mask defining each fuse, the second insulating film 364 exposed below using the photoresist pattern as an etching mask. By removing the insulating layer 368, a portion of the first insulating film 362 is exposed.

Referring to FIG. 5H, a third insulating layer 366 is deposited on the structure including the fuse 314. In particular, the third insulating film 366 is deposited on the insulating layer 368 formed on the side surface of the fuse 314 to form the first, second, and third nitride films 362, 364, and 366. It is important to surround both up, down, left and right. This is to prevent damage to the neighboring fuses or other components of the semiconductor device due to the breakdown of the insulating layer 368 due to stress or residues during the blowing process.

Referring to FIG. 5I, a passivation layer 318 is deposited on the third nitride film 366. Subsequently, although not shown, the passivation layer 318 is partially removed on the blowing area 352 to define the fuse open area 320.

As described above, the semiconductor device according to the embodiment of the present invention forms a fuse with a plurality of electrically disconnected metal patterns, and if necessary, electrically connects both ends of the fuse through a blowing process, thereby conventionally blowing the process. This prevents problems caused by removing a part of the metal layer constituting the fuse. To this end, the semiconductor device according to the embodiment of the present invention includes a blowing region and first and second regions connected to the two terminals, wherein the blowing region and the first and second regions are formed of an insulating film before the blowing process. Included fuses are separated through.

It will be apparent to those skilled in the art that various modifications, additions, and substitutions are possible, and that various modifications, additions and substitutions are possible, within the spirit and scope of the appended claims. As shown in Fig.

1 is a cross-sectional view illustrating a fuse in a conventional semiconductor device.

2A and 2B are a plan view and a cross-sectional view for explaining the problem of the fuse in the conventional semiconductor device described in FIG.

3A to 3C are plan and cross-sectional views illustrating a fuse in a semiconductor device according to an embodiment of the present invention.

4 is a cross-sectional view for describing a blowing process of a fuse in the semiconductor device illustrated in FIG. 3A.

5A to 5I are cross-sectional views illustrating a method of manufacturing a fuse in the semiconductor device illustrated in FIG. 3A.

Claims (17)

A fuse for electrically connecting two different terminals, wherein the fuse includes a blowing region and first and second regions connected to the two terminals, and the blowing region and the first and second regions each include an insulating film. A semiconductor device, characterized in that electrically separated through. Claim 2 has been abandoned due to the setting registration fee. The method of claim 1, And the thickness of the insulating film between the first and second regions is 30 nm. Claim 3 was abandoned when the setup registration fee was paid. The method of claim 1, And the blowing region expands during the blowing process to penetrate the insulating layer and to be electrically connected to the first and second regions. Claim 4 was abandoned when the registration fee was paid. The method of claim 1, And a barrier metal film deposited between the insulating film and the fuse. Claim 5 was abandoned upon payment of a set-up fee. The method of claim 1, Claim 6 was abandoned when the registration fee was paid. The method of claim 5, The nitride film is A first nitride film for protecting the structure under the fuse; And And a second nitride film for covering the upper portion of the fuse. Claim 7 was abandoned upon payment of a set-up fee. The method of claim 6, The nitride film further includes a third nitride film formed between the fuse and the adjacent fuse. Claim 8 was abandoned when the registration fee was paid. The method of claim 1, The fuse comprises a copper (Cu). A method of manufacturing a semiconductor device, comprising: forming a fuse including a blow region electrically separated through an insulating layer, and first and second regions respectively connected to two different terminals. Claim 10 was abandoned upon payment of a setup registration fee. 10. The method of claim 9, Claim 11 was abandoned upon payment of a setup registration fee. 10. The method of claim 9, Forming the fuse Forming a first nitride film on the insulating film; Depositing an oxide film on the first nitride film; Etching the oxide layer to form a plurality of trenches; And Embedding a conductive material in the trench. Claim 12 was abandoned upon payment of a registration fee. The method of claim 11, Wherein the spacing between the plurality of trenches is 30 nm. Claim 13 was abandoned upon payment of a registration fee. The method of claim 11, Forming the fuse And forming a barrier metal film before embedding the conductive material in the trench. Claim 14 was abandoned when the registration fee was paid. The method of claim 11, And enclosing the fuse with a nitride film, wherein the nitride film protects an internal circuit by preventing movement of residue after the fuse is blown. Claim 15 was abandoned upon payment of a registration fee. The method of claim 14, The thermal expansion coefficient of the said nitride film is 5 times larger than the said oxide film, The manufacturing method of the semiconductor device characterized by the above-mentioned. Claim 16 was abandoned upon payment of a setup registration fee. The method of claim 14, Surrounding the fuse with a nitride film is Forming a second nitride film on the fuse; Etching the oxide film formed between neighboring fuses to expose the first nitride film; Depositing a third nitride film on the remaining side of the oxide film, the second nitride film and the first nitride film; And And forming a passivation layer on said third nitride film. Claim 17 has been abandoned due to the setting registration fee. The fuse comprises a copper (Cu) manufacturing method of a semiconductor device.

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