KR100898471B1 - Image sensor and method for manufacturing thereof - Google Patents

Abstract

In another embodiment, an image sensor includes a wire and a readout circuitry formed on a first substrate; An image sensing device formed on the wiring; And an ion implantation separation layer formed in the image sensing unit, wherein the image sensing unit comprises: a first color image sensing unit, a second color image sensing unit, and a third color image sensing unit formed in a stack in the second substrate; And an ion implantation contact layer electrically connected to each of the first to third color image sensing units.

Image Sensor, Photodiode, Lead-Out Circuit

Description

Image sensor and method for manufacturing

Embodiments relate to an image sensor and a manufacturing method thereof.

An image sensor is a semiconductor device that converts an optical image into an electrical signal, and is divided into a charge coupled device (CCD) and a CMOS image sensor (CIS). do.

In the prior art, a photodiode is formed on a substrate by ion implantation. However, as the size of the photodiode gradually decreases for the purpose of increasing the number of pixels without increasing the chip size, the image quality decreases due to the reduction of the area of the light receiver.

In addition, since the stack height is not reduced as much as the area of the light receiving unit is reduced, the number of photons incident on the light receiving unit is also decreased due to diffraction of light called an airy disk.

One alternative to overcome this is to deposit photodiodes with amorphous Si, or read-out circuitry using wafer-to-wafer bonding such as silicon substrates. And photodiodes are formed on the lead-out circuit (hereinafter referred to as "three-dimensional image sensor"). The photodiode and lead-out circuit are connected via a metal line.

On the other hand, according to the prior art, the wiring is formed on the lead-out circuit, and the wafer-to-wafer bonding is performed so that the wiring and the photodiode contact each other, and there is a problem in that the wiring and the photodiode are not properly contacted.

In addition, according to the related art, a contact for one color of a stacked RGB photodiode is difficult to be electrically separated from a contact for another color.

In addition, according to the related art, since both the source and the drain of the both ends of the transfer transistor are doped with a high concentration of N-type, charge sharing occurs. When charge sharing occurs, the sensitivity of the output image is lowered and image errors may occur. In addition, according to the related art, a dark current is generated between the photodiode and the lead-out circuit and the photocharge is not smoothly moved, and saturation and sensitivity are decreased.

The embodiment provides an image sensor and a method of manufacturing the same, which can obtain an ohmic contact while increasing the physical contact force between the photodiode and the wiring while increasing the fill factor.

In addition, the embodiment provides an image sensor and a method of manufacturing the same for the stacked RGB photodiode with a higher fill pattern, the contact for one color can be effectively electrically separated from the contact for the other color. I would like to.

In addition, the embodiment is to provide an image sensor and a method of manufacturing the same that can increase the charge factor (Charge Sharing) does not occur. In addition, the embodiment of the present invention provides an image sensor capable of minimizing dark current sources and preventing saturation and degradation of sensitivity by creating a smooth movement path of photo charge between the photodiode and the lead-out circuit. To provide a manufacturing method.

In another embodiment, an image sensor includes a wire and a readout circuitry formed on a first substrate; An image sensing device formed on the wiring; And an ion implantation separation layer formed in the image sensing unit, wherein the image sensing unit comprises: a first color image sensing unit, a second color image sensing unit, and a third color image sensing unit formed in a stack in the second substrate; And an ion implantation contact layer electrically connected to each of the first to third color image sensing units.

In addition, the manufacturing method of the image sensor according to the embodiment comprises the steps of forming a wiring and a lead out circuit on the first substrate; Forming an image sensing unit on a second substrate; Forming an ion implantation separation layer on the image sensing unit; And bonding the second substrate and the first substrate so that the image sensing unit and the wiring correspond to each other. And forming a color image sensing unit and a third color image sensing unit in a stacked form, and forming an ion implantation contact layer electrically connected to each of the first to third color image sensing units.

According to the image sensor and the method of manufacturing the same, the ohmic contact can be obtained at the same time as the contact force between the photodiode and the wiring is increased by bonding the insulating layer between the photodiode and the wiring while increasing the fill factor.

In addition, according to the embodiment, the ion implantation contact layer for the electronic pickup is electrically connected to the photodiode for the corresponding color, and penetrates the ion implantation separation layer, so that it is structural and fair compared to the photodiode for other pixels or other colors. In terms of electrical separation can be effectively.

In addition, according to the embodiment, the device may be designed such that there is a potential difference between the source / drain across the transistor Tx, thereby enabling full dumping of the photo charge. In addition, according to the embodiment, the charge connection region is formed between the photodiode and the lead-out circuit to create a smooth movement path of the photo charge, thereby minimizing the dark current source, and reducing saturation and sensitivity. Can be prevented.

Hereinafter, an image sensor and a method of manufacturing the same according to an embodiment will be described in detail with reference to the accompanying drawings.

In the description of the embodiments, where it is described as being formed "on / under" of each layer, it is understood that the phase is formed directly or indirectly through another layer. It includes everything.

The present invention is not limited to the CMOS image sensor, and may be applied to an image sensor requiring a photodiode.

(First embodiment)

1 is a cross-sectional view of an image sensor according to a first embodiment.

The image sensor according to the first exemplary embodiment includes a wiring 150 and a readout circuitry 120 formed on the first substrate 100; An image sensing unit formed on the wiring 150; And an ion implantation separation layer formed in the image sensing unit, wherein the image sensing unit includes a first color image sensing unit 210 and a second color image sensing unit 224 that are stacked in the second substrate 200. A third color image sensing unit 234; And an ion implantation contact layer electrically connected to each of the first to third color image sensing units 234.

The image sensing unit may be a photodiode, but is not limited thereto and may be a photogate, a combination of a photodiode and a photogate, and the like. On the other hand, the embodiment is an example in which the photodiode is formed in the crystalline semiconductor layer, but is not limited thereto, and includes the one formed in the amorphous semiconductor layer.

Unexplained reference numerals among the reference numerals of FIG. 1 will be described in the following manufacturing method.

Hereinafter, a method of manufacturing the image sensor according to the first embodiment will be described with reference to FIGS. 2 to 16.

First, as shown in FIG. 2, the first color photodiode 210 is formed in a crystalline semiconductor layer of the second substrate 200. For example, the second conductive conductive layer 212 is formed on the crystalline semiconductor layer of the second substrate 200 and the first conductive type is formed on the second conductive conductive layer 212. Forming the first conductive layer 214 may proceed. For example, the P + layer 212 and the first N− layer 214 may be formed in the P-type epi layer 200 or the P-type well using an ion implantation method without a photo mask process. For example, the first N-layer 214 may serve as a red color photodiode, but is not limited thereto.

Next, an ion implantation separation layer is formed on the first color photodiode 214 as shown in FIG. 3. For example, the ion implantation separation layer may include a vertical ion implantation separation layer. For example, as illustrated in FIG. 3, the first vertical ion implantation separation layer 221 may be formed at the pixel boundary of the first color photodiode. For example, the first vertical P0 layer 221 may be formed using a photo process and an ion implantation process. The first vertical P0 layer 221 is a pixel-to-pixel isolation and ground line (not shown) of the first N-layer 214 used as a photodiode. ) For the purpose of connection.

Next, as shown in FIG. 4, a first horizontal ion implantation separation layer 231 is formed on the first color photodiode 214. For example, the first horizontal P0 layer 231 may be formed using an ion implantation process without a photo mask process. The first horizontal P0 layer 231 may serve as isolation between photodiodes.

Thereafter, a second color photodiode 224 is formed on the first horizontal ion implantation separation layer 231. For example, the second N-layer 224 may be formed on the first horizontal P0 layer 231 using an ion implantation process without a photo mask process. For example, the second N-layer 224 may serve as a green photodiode, but is not limited thereto.

Next, as shown in FIG. 5, the second vertical ion implantation separation layer 222 may be formed at the pixel boundary of the second color photodiode 224. For example, the second vertical P0 layer 222 may be formed using a photo process and an ion implantation process.

Next, as shown in FIG. 6, a second horizontal ion implantation separation layer 232 is formed on the second color photodiode 224. For example, the second horizontal P0 layer 232 may be formed using an ion implantation process without a photo mask process.

Next, as shown in FIG. 7, the step of forming an ion implantation contact layer electrically connected to the first color photodiode 214 may be performed. For example, a first lower ion implantation contact layer 241a may be formed to penetrate through the second vertical ion implantation separation layer 222 to contact the first color photodiode 214. For example, a first N + layer 241a may be formed to penetrate through the second vertical P0 layer 222 and contact the first N− layer 214 by using a photo process and an ion implantation process. The first N + layer 241a may be a plug ion implantation layer for picking up the first N− layer 241a used as a photodiode.

Next, a third color photodiode 234 is formed on the first lower ion implantation contact layer 241a as shown in FIG. 8. For example, the third N− layer 234 may be formed on the first N + layer 241a using an ion implantation process without a photo mask process. For example, the third N-layer 234 may serve as a blue photodiode, but is not limited thereto.

Next, as shown in FIG. 9, the third vertical ion implantation separation layer 223 may be formed at the pixel boundary of the third color photodiode 234. For example, the third vertical P0 layer 223 may be formed using a photo process and an ion implantation process. The third vertical ion implantation separation layer 223 may be formed on the first lower ion implantation contact layer 241a and may have a wider width than the second vertical ion implantation separation layer 222.

Next, as shown in FIG. 10, a third horizontal ion implantation separation layer 233 is formed on the third color photodiode 234. For example, the third horizontal P0 layer 233 may be formed using an ion implantation process without a photo mask process.

Next, as shown in FIG. 11, the step of forming the second ion implantation contact layer 242 electrically connected to the second color photodiode 224 may be performed. For example, the second ion implantation contact layer 242 penetrates through the third horizontal ion implantation separation layer 233 and the third vertical ion implantation separation layer 223 to contact the second color photodiode 224. ) Can be formed. In this case, the first upper ion implantation contact layer 241b connected to the first lower ion implantation contact layer 241a may be formed together, but is not limited thereto.

For example, a second N + layer penetrating the third horizontal P0 layer 233 and the third vertical P0 layer 223 to contact the second N- layer 224 by using a photo process and an ion implantation process ( 242 may be formed. In this case, a first upper N + layer 241b connected to the first lower N + layer 241a may be formed together.

Next, as shown in FIG. 12, the third ion implantation contact layer 243 electrically connected to the third color photodiode 234 may be formed. For example, a third ion implantation contact layer 243 may be formed to penetrate through the third horizontal ion implantation separation layer 233 to contact the third color photodiode 234. For example, a third N + layer 243 may be formed to penetrate the third horizontal P0 layer 233 and contact the third N− layer 234 using a photo process and an ion implantation process.

12 is a cross-sectional view of the ion implantation process for forming an RGB stacked pixel, in which the N-layer is arranged in the vertical and horizontal directions to serve as a photodiode, and the P0 layer is horizontal and vertical. It acts as a role of 'Pixel-to-Pixel' isolation and 'Ground Line' in the direction. In addition, the N + layer serves as an electron transfer path generated in the pixels arranged in the vertical and horizontal directions.

According to the embodiment, the ion implantation contact layer is formed by the structure and process as described above, so that the electron injection ion implantation contact layer is electrically connected to the photodiode for the corresponding color and penetrates the ion implantation separation layer, thereby providing a different pixel. Alternatively, the photodiode can be effectively separated from the photodiode for other colors in terms of structure and process.

Next, as shown in FIG. 13, a first insulating layer 251 is formed on the vertical photodiode, and a metal plug 261 electrically connected to the third ion implantation contact layer 243 after patterning is selectively formed. Form. For example, the first insulating layer 251 may be an oxide film, and the metal plug 261 may be formed of tungsten, but is not limited thereto.

Next, as shown in FIG. 14, a second insulating layer 252 is formed on the first insulating layer 251, and selectively patterned to form a metal line 262 connected to the metal plug 261. Can be. For example, the second insulating layer 252 may be an oxide film, and the metal line 262 may be tungsten, aluminum, or copper, but is not limited thereto. Accordingly, according to the embodiment, in the manufacture of an image sensor employing a vertical photodiode, the insulating layer 250 and the metal 260 are formed and then bonded to improve the ease of bonding between the substrates and the alignment margin. .

Next, as shown in FIG. 15A, a lead-out circuit (not shown) including a wiring 150 is formed on the first substrate 100, and the second line is formed so that the metal line 262 and the wiring 150 contact each other. The substrate 200 and the first substrate 100 are bonded. Meanwhile, before bonding the first substrate 100 and the second substrate 200, bonding may be performed by increasing the surface energy of the surface bonded by activation by plasma.

FIG. 15B is a detailed view of the first substrate 100 including the wiring 150 and the readout circuit 120. Hereinafter, a manufacturing method of the first substrate 100 including the wiring 150 and the readout circuit 120 will be described in detail with reference to FIG. 15B.

First, the first substrate 100 on which the wiring 150 and the readout circuit 120 are formed is prepared. For example, the isolation layer 110 is formed on the second conductive first substrate 100 to define an active region, and a readout circuit 120 including a transistor is formed in the active region. For example, the readout circuit 120 may include a transfer transistor (Tx) 121, a reset transistor (Rx) 123, a drive transistor (Dx) 125, and a select transistor (Sx) 127. can do. Thereafter, an ion implantation region 130 including a floating diffusion region (FD) 131 and source / drain regions 133, 135, and 137 for each transistor may be formed.

The forming of the lead-out circuit 120 on the first substrate 100 may include forming an electrical junction region 140 on the first substrate 100 and forming an interconnection on the electrical junction region 140. And forming a first conductivity type connection region 147 connected to 150.

For example, the electrical junction region 140 may be a PN junction 140, but is not limited thereto. For example, the electrical junction region 140 may include a first conductive ion implantation layer 143 and a first conductive ion implantation layer (143) formed on the second conductive well 141 or the second conductive epitaxial layer. 143 may include a second conductivity type ion implantation layer 145. For example, the PN junction 140 may be a P0 145 / N- 143 / P-141 junction as shown in FIG. 2, but is not limited thereto. The first substrate 100 may be conductive in a second conductivity type, but is not limited thereto.

According to the embodiment, the device may be designed such that there is a potential difference between the source and the drain across the transistor Tx to enable full dumping of the photo charge. Accordingly, as the photo charge generated in the photodiode is dumped into the floating diffusion region, the output image sensitivity may be increased.

That is, in the embodiment, as shown in FIG. 15B, the voltage difference between the source / drain across the transistor Tx 121 is formed by forming the electrical junction region 140 on the first substrate 100 on which the readout circuit 120 is formed. This allows full dumping of the photocharge.

Hereinafter, the dumping structure of the photocharge of the embodiment will be described in detail.

Unlike the floating diffusion (FD) 131 node, which is an N + function in the embodiment, the P / N / P section 140, which is an electrical junction region 140, does not transmit all of the applied voltage and pinches at a constant voltage. It is off (Pinch-off). This voltage is called a pinning voltage and the pinning voltage depends on the P0 145 and N- (143) doping concentrations.

Specifically, the electrons generated by the photodiode 210 are moved to the PNP caption 140 and are transferred to the FD 131 node when the transfer transistor (Tx) 121 is turned on to be converted into a voltage.

Since the maximum voltage value of the P0 / N- / P- caption 140 becomes pinning voltage and the maximum voltage value of the FD (131) node becomes Vdd-Rx Vth, the charge sharing is performed due to the potential difference between both ends of the Tx (131). Electrons generated from the photodiode 210 above the chip may be fully dumped to the FD 131 node.

That is, in the embodiment, the reason why the P0 / N- / Pwell junction is formed instead of the N + / Pwell junction in the silicon sub, which is the first substrate 100, is P0 / N- / during the 4-Tr APS Reset operation. In Pwell Junction, + voltage is applied to N- (143) and Ground voltage is applied to P0 (145) and Pwell 141. Therefore, P0 / N- / Pwell Double Junction is Pinch-Off as in BJT structure. Will occur. This is called pinning voltage. Therefore, a voltage difference is generated in the source / drain at both ends of the Tx 121, thereby preventing the charge sharing phenomenon during the Tx On / Off operation.

Therefore, unlike the case where the photodiode is simply connected by N + junction as in the prior art, the embodiment can avoid problems such as degradation of saturation and degradation of sensitivity.

Next, according to the embodiment, the first conductive connection region 147 is formed between the photodiode and the lead-out circuit to make a smooth movement path of the photo charge, thereby minimizing the dark current source and saturation ( Saturation) can be prevented and degradation of sensitivity.

To this end, the first embodiment may form a first conductivity type connection region 147 for ohmic contact on the surface of the P0 / N- / P- cushion 140. The N + region 147 may be formed to contact the N− 143 through the P0 145.

Meanwhile, the width of the first conductive connection region 147 may be minimized in order to minimize the first conductive connection region 147 from becoming a leakage source. To this end, the embodiment may proceed with a plug implant after etching the first metal contact 151a, but is not limited thereto. For example, as another example, an ion implantation pattern (not shown) may be formed and the first conductive connection region 147 may be formed using the ion implantation mask as an ion implantation mask.

That is, as in the first embodiment, the reason for locally N + doping only to the contact forming part is to facilitate the formation of ohmic contact while minimizing the dark signal. As in the prior art, when N + Doping the entire Tx Source part, the dark signal may increase due to the substrate surface dangling bond.

Next, the interlayer insulating layer 160 may be formed on the first substrate 100, and the wiring 150 may be formed. The wiring 150 may include a first metal contact 151a, a first metal 151, a second metal 152, and a third metal 153, but is not limited thereto.

Next, the lower side of the second substrate 200 is removed while leaving the image sensing unit as shown in FIG. 16. For example, after bonding, the P- Epi layer on the second substrate 200 including the photodiode may be removed by cleaving or backside thinning. .

Subsequently, a subsequent process may proceed to connect the uppermost P + layer 212 to a ground line (not shown).

(2nd Example)

17 is a cross-sectional view of the image sensor according to the second embodiment, which is a detailed view of the first substrate on which the wiring 150 is formed.

The image sensor according to the second exemplary embodiment includes a wiring 150 and a readout circuitry 120 formed on the first substrate 100; An image sensing unit formed on the wiring 150; And an ion implantation separation layer formed in the image sensing unit, wherein the image sensing unit includes a first color image sensing unit 210 and a second color image sensing unit 224 that are stacked in the second substrate 200. A third color image sensing unit 234; And an ion implantation contact layer electrically connected to each of the first to third color image sensing units 234.

The second embodiment can employ the technical features of the first embodiment.

For example, in the second embodiment, the ohmic contact can be obtained at the same time as the contact force between the photodiode and the wiring is increased by bonding the insulating layer between the photodiode and the wiring while increasing the fill factor.

In addition, according to the embodiment, the ion implantation contact layer for the electronic pickup is electrically connected to the photodiode for the corresponding color, and penetrates the ion implantation separation layer, so that it is structural and fair compared to the photodiode for other pixels or other colors. In terms of electrical separation can be effectively.

In addition, according to the second embodiment, the device can be designed so that there is a voltage difference between the source and the drain across the transistor Tx, thereby enabling full dumping of the photo charge. . In addition, according to the embodiment, the charge connection region is formed between the photodiode and the lead-out circuit to create a smooth movement path of the photo charge, thereby minimizing the dark current source, and reducing saturation and sensitivity. It can prevent.

Meanwhile, unlike the first embodiment, the second embodiment is an example in which the first conductive connection region 148 is formed on one side of the electrical bonding region 140.

According to an embodiment, an N + connection region 148 for ohmic contacts may be formed in the P0 / N− / P− junction 140, in which the process of forming the N + connection region 148 and the M1C contact 151a may be performed. It can be a Leakage Source. This is because the electric field EF may be generated on the Si surface of the substrate because the reverse bias is applied to the P0 / N− / P− junction 140. The crystal defects generated during the contact forming process in the electric field become a liquid source.

In addition, when the N + connection region 148 is formed on the surface of the P0 / N- / P- junction 140, an E-field by the N + / P0 junction 148/145 is added, which may also be a leakage source. .

Accordingly, in the second embodiment, the first contact plug 151a is formed in an active region formed of the N + connection region 148 without being doped with a P0 layer, and a layout for connecting the first contact plug 151a with the N-junction 143 is provided. present.

According to the second embodiment, the E-Field of the Si surface does not occur, which may contribute to the reduction of dark current of the 3-D integrated CIS.

The present invention is not limited to the described embodiments and drawings, and various other embodiments are possible within the scope of the claims.

1 is a sectional view of an image sensor according to a first embodiment;

2 to 16 are process cross-sectional views of a method of manufacturing the image sensor according to the first embodiment.

17 is a sectional view of an image sensor according to a second embodiment;

Claims (19)

A readout circuitry including an electrical junction region on the first substrate; A first conductivity type connection region connected to the electrical junction region and formed on the first substrate; Wiring formed on the first conductivity type connection region; An image sensing device formed on the wiring; And And an ion implantation separation layer formed in the image sensing unit. The image detection unit A first color image sensing unit, a second color image sensing unit, and a third color image sensing unit formed in a sequentially stacked form in the second substrate; And And an ion implantation contact layer electrically connected to each of the first color image sensing unit, the second color image sensing unit, and the third color image sensing unit. According to claim 1, The ion implantation contact layer is Image sensor, characterized in that formed through the ion implantation separation layer. According to claim 1, The ion implantation separation layer formed on the image sensing unit, And a horizontal ion implantation separation layer formed between the first color image sensing unit and the second color image sensing unit, and between the second color image sensing unit and the third color image sensing unit, respectively. . The method of claim 3, wherein The ion implantation separation layer formed on the image sensing unit, And a vertical ion implantation separation layer formed at a pixel boundary of each of the first color image detector, the second color image detector, and the third color image detector. According to claim 1, An insulating layer formed between the first substrate and the image sensing unit; And And a metal formed in the insulating layer to be electrically connected to the ion implantation contact layer. According to claim 1, The electrical junction region is A first conductivity type ion implantation region formed on the first substrate; And And a second conductivity type ion implantation region formed on the first conductivity type ion implantation region. delete According to claim 1, The readout circuit comprises a transistor, And a potential difference between the source and the drain of both sides of the transistor. The method of claim 8, The transistor is a transfer transistor, And an ion implantation concentration of the transistor source is lower than an ion implantation concentration of the floating diffusion region. A readout circuitry including an electrical junction region on the first substrate; A first conductivity type connection region formed on the first substrate on the side of the electrical bonding region; Wiring formed on the first conductivity type connection region; An image sensing device formed on the wiring; And And an ion implantation separation layer formed in the image sensing unit. The image detection unit A first color image sensing unit, a second color image sensing unit, and a third color image sensing unit formed in a sequentially stacked form in the second substrate; And And an ion implantation contact layer electrically connected to each of the first color image sensing unit, the second color image sensing unit, and the third color image sensing unit. Forming a readout circuitry including an electrical junction region on the first substrate; Forming a first conductivity type connection region on the first substrate by being connected to the electrical bonding region; Forming a wire on the first conductive connection region; Forming an image sensing unit on a second substrate; Forming an ion implantation separation layer on the image sensing unit; And Bonding the second substrate and the first substrate to correspond to the image sensing unit and the wiring; Forming the image detection unit Forming a first color image detector, a second color image detector, and a third color image detector in a sequential stacked form on the second substrate; and the first color image detector and the second color image detector. And forming an ion implantation contact layer electrically connected to each of the third color image sensing units. The method of claim 11, wherein Forming the ion implantation contact layer Method of manufacturing an image sensor, characterized in that formed through the ion implantation separation layer. The method of claim 11, wherein Forming an ion implantation separation layer in the image sensing unit, And forming a horizontal ion implantation separation layer between the first color image sensing unit and the second color image sensing unit and between the second color image sensing unit and the third color image sensing unit, respectively. Method of manufacturing an image sensor. The method of claim 13, Forming an ion implantation separation layer in the image sensing unit, And forming a vertical ion implantation separation layer on each pixel boundary of the first color image detector, the second color image detector, and the third color image detector. . The method of claim 11, wherein Forming an insulating layer on the image sensing unit of the second substrate before the bonding; And Forming a metal electrically connected to the ion implantation contact layer on the insulating layer. The method of claim 11, wherein Forming an electrical junction region on the first substrate, Forming a first conductivity type ion implantation region in the first substrate; And And forming a second conductivity type ion implantation region on the first conductivity type ion implantation region. The method of claim 11, wherein The readout circuit includes a transfer transistor, And an ion implantation concentration of the transfer transistor source is lower than an ion implantation concentration of the floating diffusion region which is the drain of the transfer transistor. The method of claim 11, wherein Forming the first conductivity type connection region, The method of manufacturing an image sensor, characterized in that proceeds after the contact etched on the wiring. Forming a readout circuitry including an electrical junction region on the first substrate; Forming a first conductivity type connection region on the first substrate on the side of the electrical bonding region; Forming a wire on the first conductive connection region; Forming an image sensing unit on a second substrate; Forming an ion implantation separation layer on the image sensing unit; And Bonding the second substrate and the first substrate to correspond to the image sensing unit and the wiring; Forming the image detection unit Forming a first color image detector, a second color image detector, and a third color image detector in a sequential stacked form on the second substrate; and the first color image detector and the second color image detector. And forming an ion implantation contact layer electrically connected to each of the third color image sensing units.

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