KR100886626B1 - Method for fabricating capacitor in semiconductor device - Google Patents

Abstract

The present invention has been proposed to solve the above problems. In the highly integrated semiconductor device, the lower electrode surface of the three-dimensional capacitor is uniformly nitrided to suppress the formation of a low dielectric constant interfacial oxide film between the electrode film and the dielectric thin film. The present invention provides a method of manufacturing a capacitor which does not deteriorate. To this end, the present invention provides a method for forming a capacitor, the method including: forming an insulating film for forming a capacitor on a substrate at a height such that a capacitor is formed; Selectively removing the capacitor forming insulating layer in the region where the capacitor is to be formed to form a capacitor forming hole; forming a lower electrode in the capacitor forming hole; Nitriding the surface of the lower electrode using a remote plasma; Forming a dielectric thin film on the lower electrode; And it provides a method of manufacturing a capacitor of a semiconductor device comprising the step of forming an upper electrode on the dielectric thin film.

 Semiconductor, Capacitor, Thermal Process, Dielectric Thin Film, Titanium Nitride Film.

Description

Method for fabricating capacitor in semiconductor device             

1A and 1B are cross-sectional views showing a method of manufacturing a capacitor of a semiconductor device according to the prior art.

2A through 2D are cross-sectional views illustrating a method of manufacturing a capacitor of a semiconductor device in accordance with a preferred embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

30: substrate

31: active area

32: first interlayer insulating film

33: Contact Plug

34: titanium silicide film

35: Barrier Metal

36: insulating film for capacitor formation

37: hole for capacitor formation                 

38: lower electrode

40: dielectric thin film

41: upper electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing techniques, and more particularly, to a method of manufacturing capacitors in semiconductor devices.

As the degree of integration of semiconductor devices, in particular DRAM (Dynamic Random Access Memory) semiconductor memories, increases, the area of memory cells, which are basic units for information storage, is rapidly being reduced.

Such a reduction in the memory cell area is accompanied by a reduction in the area of the cell capacitor, thereby lowering the sensing margin and the sensing speed, and causes a problem that the durability against soft errors caused by α-particles is degraded. Accordingly, there is a need for a method capable of securing sufficient capacitance in a limited cell area.

The capacitance C of the capacitor is defined as in Equation 1 below.

C = ε · As / d

Where ε is the dielectric constant, As is the effective surface area of the electrode, and d is the distance between the electrodes.

Therefore, in order to increase the capacitance of the capacitor, it is necessary to increase the surface area of the electrode, reduce the thickness of the dielectric thin film, or increase the dielectric constant.

Among these, the first method of increasing the surface area of the electrode has been considered. Capacitors of three-dimensional structures, such as concave structures, cylinder structures, multilayer fin structures, and the like, are all proposed to increase the effective surface area of the electrode in a limited layout area. However, this method has a limitation in increasing the effective surface area of the electrode as the semiconductor device is very high integration.

In addition, the method of reducing the thickness of the dielectric thin film to minimize the distance between the electrodes (d) also faces the limitation because of the problem that the leakage current increases as the thickness of the dielectric thin film is reduced.

Therefore, in recent years, research and development have been focused on securing capacitance of a capacitor mainly by increasing the dielectric constant of a dielectric thin film. Traditionally, so-called NO (Nitride-Oxide) capacitors using silicon oxide or silicon nitride as the dielectric thin film have become mainstream, but recently, Ta ₂ O ₅ , Al ₂ O ₃ , HfO ₂ , (Ba, Sr) High dielectric materials such as TiO ₃ (hereinafter referred to as BST), (Pb, Zr) TiO ₃ (hereinafter referred to as PZT), (Pb, La) (Zr, Ti) O ₃ (hereinafter referred to as PLZT), SrBi2Ta2O ₉ Ferroelectric materials such as SBT and Bi _4-x La _x Ti ₃ O ₁₂ (hereinafter referred to as BLT) are applied as dielectric thin film materials.

In the manufacture of high dielectric capacitors or ferroelectric capacitors using such high dielectric materials or ferroelectric materials as dielectric thin film materials, proper control of dielectric surrounding materials and processes must be accompanied to realize dielectric properties specific to the high dielectric materials or ferroelectric materials. do.

In general, a noble metal or a compound thereof, such as Pt, Ir, Ru, RuO ₂ , IrO _2, or the like is used as the upper and lower electrode materials of the high dielectric capacitor and the ferroelectric capacitor.

1A and 1B are process cross-sectional views showing a method of manufacturing a capacitor of a semiconductor device according to the prior art, in particular a method of manufacturing a three-dimensional concave type capacitor.

As shown in FIG. 1A, after the interlayer insulating film 12 is formed on the semiconductor substrate 10 on which the active region 11 is formed, the active region 11 of the semiconductor substrate 10 passes through the interlayer insulating film 12. Form a contact hole connected to the Subsequently, the contact hole is filled with a conductive silicon film to form a storage node contact plug 13.

Subsequently, a predetermined portion of the upper portion of the contact plug 13 is recessed to form a titanium silicide film 14 in the recessed region, and a barrier metal 15 is formed on the recess plug. Here, the titanium silicide film 14 is a film for forming an ohmic contact layer between the silicon film of the lower structure and the metal film of the upper structure, and the barrier metal 15 is used to prevent the lower penetration of oxygen and diffusion of mutual materials. Mainly a titanium nitride film is used as the film.

Subsequently, the capacitor forming insulating film 16 is formed to have a height at which the capacitor is to be formed, and then the capacitor forming insulating film 14 is selectively removed to expose the barrier metal 15 on the upper portion of the contact plug 13 to form a capacitor. The dragon hole 17 is formed.

Subsequently, as shown in FIG. 1B, the lower electrode 18 is formed of a conductive film in the capacitor forming hole 17.

The lower electrode uses a titanium nitride film because it is easy to manufacture a capacitor having a three-dimensional structure, and has the same series as titanium nitride used as an ohmic contact layer and titanium nitride used as a barrier metal.

Subsequently, a dielectric thin film 19 is formed on the lower electrode 18, and a thermal process for improving dielectric properties of the dielectric thin film is performed. Previously, a silicon-based dielectric was used as the dielectric thin film. However, in order to secure a capacitance of more than a predetermined capacity as a semiconductor device becomes high, a high dielectric material such as a Ta ₂ O ₅ film, an Al ₂ O ₃ film, and an HfO ₂ film is used.

Subsequently, an upper electrode 20 is formed on the dielectric thin film 19 by using a conductive film.

As described above, in the highly integrated semiconductor, in order to increase the surface area of the capacitor, the lower electrode is formed in a three-dimensional form, and in order to secure step coverage of the dielectric thin film, a Ta ₂ O ₅ film, an Al ₂ O ₃ film, and an HfO A dielectric thin film such as _two films is formed on the lower electrode 18 by chemical vapor deposition or atomic layer deposition.

However, when forming the dielectric thin film 19 using atomic layer deposition or chemical vapor deposition, a reaction gas containing oxygen such as H ₂ O, O ₂ , O ₃ together with an organic metal source is used as a reactant. Therefore, in the process of forming the dielectric thin film 19, oxygen penetrates into the interface between the lower electrode 18 and the dielectric thin film 19.

At this time, the infiltrated oxygen is formed into a surface oxide film (TiO ₂ by reacting with titanium nitride in the subsequent thermal process, and the formed oxide film shows high leakage current characteristics between the upper and lower electrodes. By increasing the distance, the capacitance of the capacitor is lowered, and the instability and electrical property deterioration of the capacitor structure are increased by the volume change caused by the phase change.

Therefore, in order to solve this problem, before forming the dielectric thin film, the lower electrode surface is nitrided to prevent oxygen from penetrating in a subsequent process to form an oxide film.

However, since the lower electrode is formed in the capacitor forming hole, it is difficult to nitride evenly over the entire surface of the lower electrode.

In general, a high voltage is formed on the upper and lower portions of the substrate, and NH ₃ is subjected to plasma treatment, thereby nitriding the entire surface of the lower electrode formed inside the capacitor forming hole. Nitriding treatment is poor on the surface of the lower electrode formed on the sidewall surface of the capacitor forming hole.

As the semiconductor device is highly integrated, the depth of the capacitor forming hole becomes deeper and the width becomes narrower, making it more difficult to evenly nitride the surface of the lower electrode formed on the lower end portion and the sidewall surface of the capacitor forming hole.                         

A portion of the lower electrode which is not nitrided on the surface of the lower electrode is formed in an oxide film having a low dielectric constant in a subsequent process to lower the capacitance, thereby lowering the operational reliability of the semiconductor device.

The present invention has been proposed to solve the above problems. In the highly integrated semiconductor device, the lower electrode surface of the three-dimensional capacitor is uniformly nitrided to suppress the formation of a low dielectric constant interfacial oxide film between the electrode film and the dielectric thin film. It is an object of the present invention to provide a method of manufacturing a capacitor which does not deteriorate.

In order to achieve the above object, the present invention comprises the steps of forming an insulating film for forming a capacitor to a height to form a capacitor on the substrate; Selectively removing the capacitor forming insulating layer in the region where the capacitor is to be formed to form a capacitor forming hole; forming a lower electrode in the capacitor forming hole; Nitriding the surface of the lower electrode using a remote plasma; Forming a dielectric thin film on the lower electrode; And it provides a method of manufacturing a capacitor of a semiconductor device comprising the step of forming an upper electrode on the dielectric thin film.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

2A to 2D are process cross-sectional views showing a method of manufacturing a capacitor of a semiconductor device according to a preferred embodiment of the present invention, and in particular, a method of manufacturing a concave three-dimensional capacitor.

First, as shown in FIG. 2A, the interlayer insulating film 32 is formed on the semiconductor substrate 30 on which the active region 31 is formed, and then penetrates the interlayer insulating film 32 to form the active region of the semiconductor substrate 30. A contact hole connected to 31 is formed. Subsequently, the contact hole is buried using a conductive silicon film, and then planarized using a process such as chemical mechanical polishing to form the storage node contact plug 33.

Subsequently, a portion of the upper portion of the contact plug 33 is recessed, the titanium silicide layer 34 is formed in the recessed region, and the barrier metal 35 is formed on the recess plug. The barrier metal 35 is formed using a titanium nitride film.

In addition, the interlayer insulating film 32 may include an undoped-silicate glass (USG) film, a phospho-silicate glass (PSG) film, a boro-phospho-silicate glass (BPSG) film, a high density plasma (HDP) oxide film, and a spin on glass (SOG) film. Film, TEOS (Tetra Ethyl Ortho Silicate) film or HDP (high densigy plasma) oxide film, etc. or Thermal Oxide (Thermal Oxide) is formed by oxidizing silicon substrate at high temperature between 600 ~ 1,100 ℃ in furnace. It can be formed as.

Subsequently, the capacitor forming insulating film 36 is formed to have a height at which the capacitor is to be formed. The capacitor forming insulating film 36 may include an undoped-silicate glass (USG) film, a phospho-silicate glass (PSG) film, a boro-phospho-silicate glass (BPSG) film, a high density plasma (HDP) oxide film, and a spin on (SOG) film. A film formed by using a glass film, a TEOS (Tetra Ethyl Ortho Silicate) film or an oxide film using HDP (high densigy plasma), or by oxidizing a silicon substrate at a high temperature between 600 and 1100 ° C in a thermal oxide (furnace). ) Can be formed.

Subsequently, the capacitor formation insulating layer 36 is selectively removed so that the barrier bezel 35 on the contact plug 33 is exposed to form the capacitor formation hole 37.

Subsequently, as shown in FIG. 2B, the lower electrode 38 is formed with a conductive film in the capacitor forming hole 37 to a thickness in the range of 50 to 500 mW. The lower electrode 38 may be one selected from a conductive silicon film, an iridium, ruthenium, iridium oxide, ruthenium oxide, titanium nitride film, tungsten, tungsten nitride film, platinum, and tantalum nitride film using atomic layer deposition or chemical vapor deposition. To form.

Next, as illustrated in FIG. 2C, nitride 39 is formed on the surface of the lower electrode 38 by using an NH ₃ remote plasma. Remote plasma is not a plasma generated by applying a high voltage to the upper and lower portions of the substrate, and refers to a plasma excited by other equipment. By uniformly reaching the entire curved surface of the wafer by diffusion due to their concentration gradient, the entire sidewall of the capacitor forming hole can be evenly nitrided.

In the process conditions here, the wafer temperature is maintained at 250 to 650 ° C., NH ₃ or N ₂ is used as the reaction gas at 50 sccm to 1000 sccm, and the pressure in the reactor is maintained at 0.05 Torr to 5 Torr. Plasma formation method uses power of 500 ~ 5000W by using equipment such as microwave, inductively coupled plasma (ICP), ECR (Electron Cyclotron Resonance).

2D, a Ta ₂ O ₅ film, an Al ₂ O ₃ film, an Al ₂ O ₃ / HfO ₂ film, an HfO ₂ film, and a BST were deposited on the nitrided lower electrode 38 by using atomic layer deposition. A high dielectric material such as a film or a ferroelectric material such as a PZT film, a PLZT film, an SBT film, or a BLT film is used as the dielectric thin film 40 to form in the range of 30 to 300 Å. The process of forming the dielectric thin film 40 is maintained at a wafer temperature of 250 ~ 500 ℃, 0.1Torr ~ 5 Torr, feeding / purging using O ₂ , O ₃ , H ₂ O as the reaction gas It has a process to purge and at this time the gas flow rate is maintained in the range of 10 ~ 1000sccm.

Subsequently, as shown in FIG. 2D, the upper electrode 41 is formed on the dielectric thin film 40. The upper electrode 40 is formed using a metal film of Pt, Ir, Ru, RuO ₂ , IrO ₂ , TiN, or using a conductive silicon film in a range of 50 to 1000 Å.

As described above, when the nitriding treatment is evenly applied to the entire surface of the lower electrode 38 of the three-dimensional concave structure, particularly the lower portion and the sidewall surface, the lower electrode generated in the subsequent dielectric film deposition process ( Deposition of the oxide film at the interface between the 38 and the dielectric thin film 40 can be completely suppressed to prevent the capacitance of the capacitor from being lowered.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

In addition, in the above-described embodiment, a concave type capacitor has been described, but it is also applicable to a cylindrical type capacitor.

According to the present invention, formation of a low dielectric constant oxide film at an interface between an electrode film and a dielectric thin film can be suppressed, and a high dielectric constant capacitor can be reliably manufactured.

Claims (5)

Forming an insulating film for forming a capacitor by a height at which the capacitor is formed on the substrate; Selectively removing the capacitor forming insulating layer in the region where the capacitor is to be formed to form a capacitor forming hole; Forming a lower electrode in the capacitor forming hole; Nitriding the surface of the lower electrode using a remote plasma; Forming a dielectric thin film on the lower electrode; And Forming an upper electrode on the dielectric thin film; Capacitor manufacturing method of a semiconductor device comprising a. The method of claim 1, The process conditions in the nitriding step Wafer temperature is maintained at 250 ~ 650 ℃, NH ₃ or N ₂ is used as the reaction gas 50sccm ~ 1000sccm, the pressure of the reactor is maintained at 0.05Torr ~ 5Torr, the process of the semiconductor device characterized in that Capacitor Manufacturing Method. The method of claim 2, The plasma is a capacitor manufacturing method of a semiconductor device, characterized in that using one of the equipment selected from among microwave, ICP or ECR. The method of claim 3, wherein Of the plasma is A capacitor manufacturing method for a semiconductor device, characterized in that formed using a power in the range of 500 ~ 5000W. The method of claim 4, wherein The thickness of the nitrided film is a capacitor manufacturing method of the semiconductor device, characterized in that in the range of 1 ~ 50Å.

Images