KR100873288B1 - Imase sensor and method for fabricating of the same - Google Patents

Abstract

The present invention relates to an image sensor, and more particularly, to provide an image sensor and a method of manufacturing the same, which can prevent a decrease in charge efficiency due to diffusion into an adjacent region of a photodiode forming region. A semiconductor layer of one conductivity type; A field insulating film disposed locally on the semiconductor layer; A gate electrode on the semiconductor layer spaced apart from the field insulating layer; A photodiode disposed on the semiconductor layer in contact with one side of the field insulating film and the gate electrode; A sensing diffusion node of a second conductivity type in contact with the other side of the gate electrode; And a diffusion preventing region of a first conductivity type disposed in contact with the sensing diffusion node under the gate electrode to prevent deterioration of characteristics of the sensing diffusion node from diffusion of the photodiode.

The present invention also provides a method of manufacturing an image sensor, comprising: forming a field insulating film locally on a semiconductor layer of a first conductivity type; Forming a gate electrode on the semiconductor layer at intervals from the field insulating film; Forming a photodiode in contact with one side of the gate electrode and the field insulating layer by implanting ions; Forming a diffusion preventing region of a first conductivity type by applying a tilt ion implantation to the other side of the gate electrode to prevent deterioration of characteristics of a sensing diffusion node from diffusion of the photodiode; And forming a sensing diffusion node of the second conductivity type in contact with the diffusion preventing region by performing ion implantation.

Image sensor, photodiode, indium, boron, ion implantation, diffusion prevention area.

Description

Imaging sensor and method for fabricating of the same             

1A to 1H are cross-sectional views illustrating an image sensor manufacturing process according to the prior art.

2A to 2G are cross-sectional views illustrating an image sensor manufacturing process according to an embodiment of the present invention.

3 is a cross-sectional view schematically showing a unit pixel of the image sensor according to the present invention.

Explanation of symbols on the main parts of the drawings

30 semiconductor layer 31 field insulating film

33: gate oxide film 34: conductive film

37, 38: spacer 36: first impurity region

40: sensing diffusion node 40 ': diffusion preventing area

42: second impurity region

The present invention relates to an image sensor, and more particularly, to an image sensor and a method of manufacturing the same that can improve the efficiency of the charge generated in the todiode.

In general, an image sensor is a semiconductor device that converts an optical image into an electric signal, and a charge coupled device (CCD) has individual metal-oxide-silicon (MOS) capacitors that are very different from each other. A device in which charge carriers are stored and transported in a capacitor while being in close proximity, and a CMOS (Complementary MOS) image sensor is a CMOS technology that uses a control circuit and a signal processing circuit as peripheral circuits. Is a device that employs a switching method that creates MOS transistors by the number of pixels and sequentially detects the output using them.

In the manufacture of such various image sensors, efforts are being made to increase the photo sensitivity of the image sensor, one of which is a condensing technology. For example, a CMOS image sensor is composed of a photodiode for detecting light and a portion of a CMOS logic circuit for processing the detected light into an electrical signal to make data. To increase light sensitivity, the ratio of the photodiode to the total image sensor area is increased. Efforts have been made to increase (usually referred to as Fill Factor).

1A to 1H are cross-sectional views illustrating an image sensor manufacturing process according to the prior art. Referring to the conventional image sensor manufacturing process, the semiconductor layer 10 to be described below has a high concentration of a P ++ layer and a P-type epi. A layer, that is, a laminate of P-Epi layers is used.

As is well known, the P-Epi layer is used for reducing crosstalk and improving photosensitive characteristics, which is referred to as a semiconductor layer 10 for the sake of simplicity.

First of all, the drive gate (Dx) serving as a source follower and the switching gate (addressing) can be addressed by switching as a source follower through lateral diffusion. A step of forming a P-well (not shown) is carried out so as to contain (Select Gate, Sx).

Subsequently, a field insulating film is formed as shown in FIG. 1A to secure a region where the device is to be formed.

Specifically, a pad oxide film (not shown) is deposited on the semiconductor layer 10, and then a photoresist pattern (not shown) for trench formation is formed on the pad oxide film. Subsequently, the pad oxide film and the semiconductor layer 10 are selectively etched to form a trench by using the photoresist pattern as an etch mask, and then the oxide layer or the nitride-based material is deposited to sufficiently fill the trench, and then the semiconductor layer 10 ) And planarization using chemical mechanical polishing (hereinafter referred to as CMP) until the surface is exposed, thereby forming the field insulating film 11 of the STI structure locally on the semiconductor layer 10.

In other words, STI process technology is applied to reduce the area of electrical separation between devices due to the high integration of the device because there is little Bird's beak.

Subsequently, as illustrated in FIG. 1B, an ion implantation mask 12 is formed and a threshold voltage Vt adjusting process of the transfer transistor having the gate electrode, that is, the transfer gate is performed.

In order to implement a specific device, that is, a native trsnsistor device having a threshold voltage of about zero, a P-well or an ion implantation process for adjusting the threshold voltage is performed. This device is an N-type Metal Oxide Semiconductor Field Effect Transistor (NMOSFET) device, and the threshold voltage should be made close to "0" because it serves to transfer the generated charge to the photodiode formed next to the device without loss. do. Therefore, in the case of the well, the substrate concentration (P-type) is mostly used, and in addition, a very small concentration of ion implantation minimizes the threshold voltage and the short channel effect.

Subsequently, a gate electrode having a structure in which the gate oxide film 13 and the conductive film 14 are stacked is formed in a region separated from the field insulating film 11, for example, a transfer gate, which transfers photoelectrons from the photodiode to the sensing diffusion node. Play a role.

Specifically, the gate oxide film 13, polysilicon, tungsten, or the like is deposited alone or stacked to deposit the conductive film 14, and then a pattern is formed to be used as the gate of the MOSFET. Here, the doping of the gate may be doped at the same time during the subsequent process of forming a sensing diffusion node, that is, a high concentration N-type source / drain junction, or may be ion implanted before forming the gate pattern if additional doping is required.

In FIG. 1D, N-type impurity regions n- and 16 for photodiode contacting the field insulating film 11 and the gate electrode are formed to a predetermined depth in the semiconductor layer 10 using the ion implantation mask 15. Doping with low energy using high energy. The n-type impurity regions (n-, 16) serve to accumulate charges generated by irradiation of light, and the depth of the n-type impurity regions (n-, 16) increases the efficiency of light of a red color system. The range of about 0.5 micrometer-about several micrometers is made so that it may be carried out.

Subsequently, the ion implantation mask 15 is removed through the PAL strip, and then deposited on the entire surface using an oxide film or a nitride film, as shown in FIG. 1E, and then the spacers 17 and 18 are formed on the sidewalls of the gate electrodes through the front surface. To form. Here, the spacers 17 and 18 form LDD through subsequent ion implantation to suppress the hot carrier effect.

Subsequently, as illustrated in FIG. 1F, an ion implantation mask 19 for forming a sensing diffusion node is formed, followed by ion implantation of a high concentration of N-type impurities to form the sensing diffusion nodes n + and 20.

The sensing diffusion node (n +, 20) is also a source / drain junction of the transfer transistor, which is a device that transfers the amount of charge change generated in the photodiode as it is.

After removing the ion implantation mask 19, ion implantation is performed to form a P-type electrode for a photodiode, as shown in FIG. 1G, to contact the upper portion of the n- region 16 and the surface of the semiconductor layer 10. By forming the impurity regions P0 and 22, the photodiode is formed while the depletion region is formed by the P / N / P junction.

Here, the depths of the P-type impurity regions P0 and 22 are formed to a depth of 0.5 μm or less using low energy so as to increase the efficiency for light having a short wavelength of the blue system. On the other hand, although a separate ion implantation mask 21 is used here, since the P-type impurity regions P0 and 22 use low energy, it may proceed without a mask.

Next, as shown in FIG. 1H, the ion implantation mask 21 is removed and impurities in the P-type impurity regions P0 and 22 implanted through the heat treatment are diffused to form a junction.

Meanwhile, in the manufacturing of the conventional image sensor as described above, the region where the photodiode is to be formed is diffused through heat treatment. In the case of the sensing diffusion node, the region of the photodiode is very close to the photodiode region, and impurities in the photodiode region are thermally diffused. The phenomenon of improperly transferring or blocking the generated charges occurs. This results in a significant reduction in the efficiency of charge integrated in the photodiode region. Therefore, it is urgent to solve the problem.

The present invention proposed to solve the problems of the prior art as described above, the object of the present invention is to provide an image sensor and a method of manufacturing the same that can prevent a decrease in charge efficiency by diffusion to the adjacent region of the photodiode forming region. have.

In order to achieve the above object, the present invention, the first conductive semiconductor layer; A field insulating film disposed locally on the semiconductor layer; A gate electrode on the semiconductor layer spaced apart from the field insulating layer; A photodiode disposed on the semiconductor layer in contact with one side of the field insulating film and the gate electrode; A sensing diffusion node of a second conductivity type in contact with the other side of the gate electrode; And a diffusion preventing region of a first conductivity type disposed in contact with the sensing diffusion node under the gate electrode to prevent deterioration of characteristics of the sensing diffusion node from diffusion of the photodiode.

In addition, the present invention for achieving the above object, in the image sensor manufacturing method, the step of forming a field insulating film locally on the semiconductor layer of the first conductivity type; Forming a gate electrode on the semiconductor layer at intervals from the field insulating film; Forming a photodiode in contact with one side of the gate electrode and the field insulating layer by implanting ions; Forming a diffusion preventing region of a first conductivity type by applying a tilt ion implantation to the other side of the gate electrode to prevent deterioration of characteristics of a sensing diffusion node from diffusion of the photodiode; And forming a sensing diffusion node of the second conductivity type in contact with the diffusion preventing region by performing ion implantation.

The present invention forms a P-type impurity region by tilt ion implantation in a semiconductor layer between an N-type sensing diffusion node and a photodiode of a photodiode, in particular, a region where the sensing diffusion node and a gate electrode are in contact with each other. It is intended to prevent deterioration of characteristics of adjacent devices.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

3 is a cross-sectional view schematically showing a unit pixel of an image sensor according to the present invention. The semiconductor layer 30 is formed by stacking a high concentration of a P ++ layer and a P-Epi layer. It is called.

Referring to FIG. 3, the image sensor of the present invention includes a P-type semiconductor layer 30, a field insulating film 31 disposed locally on the semiconductor layer 30, and a semiconductor layer spaced apart from the field insulating film 31. A gate electrode including spacers 37 and 38 on the sidewalls of the conductive film 34 stacked on the gate oxide film 33 and the gate oxide film 33, and a semiconductor layer 30 disposed on one side of the gate electrode; N-type first impurity regions n- and 36 for photodiodes in contact with the field insulating film 31 and P-type photodiode in contact with the surface of the semiconductor layer 30 in the first impurity regions n- and 36. N-type sensing diffusion nodes n + and 40 formed in contact with the second impurity regions P0 and 42, the other side of the gate electrode and extending from the surface of the semiconductor layer 30, and the sensing diffusion node n + from diffusion of the photodiode. In order to prevent deterioration of the characteristics of the first and second electrodes 40, a P-type diffusion preventing region 40 ′ disposed in contact with the sensing diffusion nodes n + and 40 is disposed below the gate electrode. It consists compared.

Here, the P-type diffusion barrier region 40 ′ is formed to prevent interaction by diffusion of each impurity region of the photodiode and the sensing diffusion node, and is formed through tilt ion implantation before formation of the sensing diffusion node. This can maximize the efficiency of the charge by increasing the photodiode charge transfer characteristics.

2A to 2G are cross-sectional views illustrating an image sensor manufacturing process according to an exemplary embodiment of the present invention.

The semiconductor layer 30, which will be described later, uses a highly stacked P ++ layer and a P-type epi layer, that is, a P-Epi layer.

As is well known, the P-Epi layer is used for reducing crosstalk and improving photosensitive characteristics, which is referred to as a semiconductor layer 30 for simplicity of the following drawings.

First, a process of forming a P well (not shown) may be included to include a drive gate serving as a source follower and a select gate capable of addressing a switching role through lateral diffusion by a thermal process.

Subsequently, a field insulating film is formed as shown in FIG. 2A to secure a region where the device is to be formed.

Specifically, a pad oxide film (not shown) is deposited on the semiconductor layer 30, and then a photoresist pattern (not shown) for trench formation is formed on the pad oxide film. Subsequently, the pad oxide film and the semiconductor layer 30 are selectively etched using the photoresist pattern as an etching mask to form a trench, and then an oxide film or a nitride-based material is deposited to sufficiently fill the trench, and then the semiconductor layer 30 ) And planarization through a process such as CMP until the surface is exposed, thereby forming a field insulation film 31 having an STI structure locally in the semiconductor layer 30.

In other words, the STI process technology is applied to reduce the area of electrical separation between the devices due to the high integration of the device because there is little Burj beak.

Subsequently, as illustrated in FIG. 2B, the ion implantation mask 32 is formed, and a threshold voltage Vt adjusting process of the transfer transistor having the gate electrode, that is, the transfer gate is performed.

In order to implement a specific device, that is, a native transistor device having a threshold voltage of almost “0”, an ion implantation process for adjusting P well or threshold voltage is performed. This device is an NMOSFET device, and the threshold voltage should be made close to "0" because it serves to transfer the generated charge to the photodiode formed next to the device without loss. Therefore, in the case of the well, the substrate concentration is mostly used, and in addition, a very small concentration of ion implantation is used to minimize the threshold voltage and the short channel effect.

Subsequently, a gate electrode having a structure in which the gate oxide film 33 and the conductive film 34 are stacked in a region away from the field insulating film 31, for example, a transfer gate, is formed to transport the photoelectrons from the photodiode to the sensing diffusion node. Play a role.

Specifically, the gate oxide film 33, polysilicon, tungsten, or the like is deposited alone or stacked to deposit the conductive film 34, and then a pattern is formed to be used as the gate of the MOSFET. Here, the doping of the gate may be doped at the same time during the subsequent process of forming a sensing diffusion node, that is, a high concentration N-type source / drain junction, or may be ion implanted before forming the gate pattern if additional doping is required.                     

In FIG. 2D, the N-type first impurity regions n- and 36 for photodiode contacting the field insulating layer 31 and the gate electrode using the ion implantation mask 35 are formed to a predetermined depth in the semiconductor layer 10. When formed, it is doped at low concentration using high energy. The first impurity regions n- and 36 serve to integrate charges generated by irradiation of light, and the depth of the first impurity regions n- and 36 may increase the efficiency of light of a red system. The range of about 0.5 micrometer-about several micrometers is made so that it may be carried out.

Specifically, an ion implantation step is performed using phosphorus (P) which is an N-type impurity. At this time, the concentration of phosphorus is 1.0E11 atoms / cm 2 to 1.0E13 atoms / cm 2 and ion implantation energy is used at 100 KeV to 180 KeV.

At this time, it is preferable that the tilt at the time of ion implantation, that is, the inclination angle, is in the range of 0 ° to 60 °, and in the case of twist, it is in the range of 0 ° to 360 °.

Subsequently, the ion implantation mask 35 is removed through the PAL strip, and as shown in FIG. 2E, the deposition is performed on the entire surface using an oxide film or a nitride film, and then the spacers 37 and 38 are formed on the sidewalls of the gate electrode through the entire surface etching. To form. Here, the spacers 37 and 38 form LDD through subsequent ion implantation to suppress the hot carrier effect.

Subsequently, as shown in FIG. 2F, an ion implantation mask 39 is formed, followed by tilt ion implantation of P-type impurities to form a P-type diffusion barrier region 40 ′ under the other side of the gate electrode. In addition, ion implantation of a high concentration of N-type impurities is performed to form sensing diffusion nodes (n +, 40).                     

The sensing diffusion node (n +, 40) is also a source / drain junction of a transfer transistor, which is a device that transfers the amount of charge change generated in the photodiode as it is.

Specifically, the diffusion barrier region is formed using an ion implantation process using boron or BF ₂ , which is a P-type impurity. The ion implantation energy is 5 KeV to 30 KeV for boron and 50 KeV to 100 KeV for BF ₂ .

At this time, the tilt at the time of ion implantation is 3 ° to 45 °, and in the case of twist, it is preferable to proceed in the range of 0 ° to 360 °. Therefore, the diffusion prevention region 40 'is formed under the other side of the gate electrode, that is, under the spacer 38, by the tilt.

Formation of the sensing diffusion node (n +, 40) is ion implantation of the arsenic (Arsenic) and phosphorus (P) continuously, the ion implantation must be ionized first,

In the case of ion implantation, the concentration of the acenic is 2.0E15 atoms / cm 2 to 5.0E15 atoms / cm 2, and the ion implantation energy is used at 20KeV to 50KeV. When phosphorus is ion implanted, the concentration of phosphorus is 1.0E13 atoms / cm 2. The ion implantation energy of 20 KeV to 50 KeV is used. At this time, it is preferable that the tilt and twist at the time of ion implantation proceed to 0 degrees.

After removing the ion implantation mask 39, as shown in FIG. 2G, ion implantation is performed to form a P-type electrode for a photodiode to contact the upper portion of the first impurity region 36 and the surface of the semiconductor layer 30. By forming the P-type second impurity regions P0 and 42 for the diode, the photodiode is formed while the depletion region is formed by the P / N / P junction.

Here, the depths of the second impurity regions P0 and 42 are formed to a depth of 0.5 μm or less using low energy so as to increase the efficiency of light having a short wavelength in the blue system. Meanwhile, although a separate ion implantation mask 41 is used here, since the second impurity regions P0 and 22 use low energy, it may proceed without a mask.

Specifically, an ion implantation process is performed using boron or BF ₂ , which is a P-type impurity, wherein the dose is 1.0E12 atoms / cm 2 to 5.0E13 atoms / cm 2 and the ion implantation energy is adjusted. in the case of boron 1KeV ~ 10KeV, BF ₂ is used 10KeV ~ 40KeV.

At this time, it is preferable that the tilt at the time of ion implantation is 0 °, that is, vertical, and in the case of twist, the tilt is in the range of 0 ° to 360 °.

Next, the impurities in the second impurity regions P0 and 42 implanted by ion implantation are removed by heat treatment to remove the ion implantation mask 41, and FIG. 3 illustrates an image sensor completed by such a process. It is a cross section.

According to the present invention, the P-type diffusion preventing region is formed between the photodiode region of the image sensor and the sensing diffusion node by using ion implantation using a tilt, so that the charges are mutually diffused between the photodiode region and the sensing diffusion node. It was found through the examples that the degradation of the efficiency can be prevented.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

The present invention described above can increase the efficiency of the charge generated in the photodiode of the image sensor, it can be expected to have an excellent effect that can ultimately greatly improve the performance of the image sensor.

Claims (18)

A first conductive semiconductor layer; A field insulating film disposed locally on the semiconductor layer; A gate electrode on the semiconductor layer spaced apart from the field insulating layer; A photodiode disposed on the semiconductor layer in contact with one side of the field insulating film and the gate electrode; A sensing diffusion node of a second conductivity type in contact with the other side of the gate electrode; And In order to prevent the deterioration of characteristics of the sensing diffusion node from the diffusion of the photodiode, a diffusion preventing region of a first conductivity type disposed in contact with the sensing diffusion node under the gate electrode. Image sensor comprising a. The method of claim 1, The photodiode, A first impurity region of a second conductive type for a photodiode disposed in the semiconductor layer and in contact with one side of the gate electrode and the field insulating layer; And A second impurity region of a first conductivity type for a photodiode in contact with a surface of the semiconductor layer of the first impurity region Image sensor comprising a. The method of claim 1, The semiconductor layer comprises an epitaxial layer of the first conductivity type. The method according to any one of claims 1 to 3, The first conductive type is a P-type, the second conductive type is an image sensor, characterized in that the N-type. In the image sensor manufacturing method, Forming a field insulating film locally on the first conductive semiconductor layer; Forming a gate electrode on the semiconductor layer at intervals from the field insulating film; Forming a photodiode in contact with one side of the gate electrode and the field insulating layer by implanting ions; Forming a diffusion preventing region of a first conductivity type by implanting a tilt ion into the other side of the gate electrode to prevent deterioration of characteristics of a sensing diffusion node from diffusion of the photodiode; And Forming a second diffusion diffusion sensing node in contact with the diffusion preventing region by performing ion implantation Image sensor manufacturing method comprising a. The method of claim 5, wherein And ion implantation with a tilt of 3 ° to 45 ° in the step of forming the diffusion barrier region. The method of claim 6. Method of manufacturing an image sensor, characterized in that the ion implantation of boron (Bron) or BF ₂ in the step of forming the diffusion barrier region. The method of claim 7, wherein And in the forming of the diffusion barrier region, the concentration of boron is 1.0E12 atoms / cm 2 to 1.0E13 atoms / cm 2 and ion implantation energy is used at 5 KeV to 30 KeV. The method of claim 7, wherein In the step of forming the diffusion barrier region, the concentration of the BF ₂ is 1.0E12 atoms / cm 2 to 1.0E13 atoms / cm 2 and ion implantation energy is 50KeV to 100KeV. The method of claim 5. In the step of forming the sensing diffusion node, the method of manufacturing an image sensor, characterized in that the ion implantation of Arsenic and phosphorus (P) continuously. The method of claim 10, And ion implantation energy of 20 KeV to 50 KeV in the step of ion implanting the acenic at a concentration of 2.0E15 atoms / cm 2 to 5.0E15 atoms / cm 2. The method of claim 10, In the step of ion implanting the phosphor, the concentration of the phosphorus is 1.0E13 atoms / cm 2 to 3.0E14 atoms / cm 2 and ion implantation energy is 20KeV to 50KeV. The method of claim 5, wherein Forming the photodiode, Performing ion implantation to form a first impurity region of a second conductivity type for a photodiode in contact with one side of said gate electrode and said field insulating film; And Performing ion implantation to form a second impurity region of a first conductivity type for a photodiode in contact with the surface of the semiconductor layer of the first impurity region Image sensor manufacturing method comprising a. The method of claim 13, Method of manufacturing an image sensor, characterized in that the ion implantation of phosphorus (P) in the step of forming the first impurity region. The method of claim 14, And in the forming the first impurity region, the phosphorus concentration is 1.0E11 atoms / cm 2 to 1.0E13 atoms / cm 2 and ion implantation energy is used at 100 KeV to 180 KeV. The method of claim 13, And ion implanting boron or BF ₂ in the step of forming the second impurity region. The method of claim 16, And in the forming of the second impurity region, the concentration of boron is 1.0E12 atoms / cm 2 to 5.0E13 atoms / cm 2 and ion implantation energy is used at 1 KeV to 10 KeV. The method of claim 16, And in the step of forming the second impurity region, the concentration of BF ₂ is 1.0E12 atoms / cm 2 to 5.0E13 atoms / cm 2 and ion implantation energy is used at 10 KeV to 40 KeV.

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