KR100788388B1 - Wiring structure of data operating circuit in lcd - Google Patents

Abstract

The present invention relates to a data driving circuit wiring structure of a liquid crystal display device capable of efficiently arranging data wirings by minimizing via holes, wherein image data of red (R), green (G), and blue (B) are even and odd. In a wiring structure of a data driving circuit in which a data signal divided into data is applied to an input pin of a plurality of data driving chips to apply a liquid crystal driving voltage to a data line of a liquid crystal panel every scanning, the plurality of data driving chips A pair of dogs and the input pins in the pair of data driving chips are symmetrically arranged so that the input pins for receiving the even data and the input pins for receiving the odd data are each data. It is characterized in that each drive chip is interconnected.

Description

Data driving circuit wiring structure of liquid crystal display device {WIRING STRUCTURE OF DATA OPERATING CIRCUIT IN LCD}

1 is a block diagram of a conventional liquid crystal display device.

FIG. 2 is a layout view illustrating a data driving chip of FIG. 1. FIG.

3 is a wiring structure diagram of a data driving circuit using the data driving chip of FIG.

4 and 5 are wiring diagrams of a data driving chip for explaining a data driving circuit wiring method of a liquid crystal display according to an exemplary embodiment of the present invention.

6 is a wiring diagram for explaining another embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

30: data driving chip 40: data driving circuit

50: timing controller

D1 to D6: Input pin E: Even data

O: odd data

The present invention relates to a data driving circuit wiring structure of a liquid crystal display device, and more particularly, to a data driving circuit wiring structure of a liquid crystal display device which can reduce EMI by efficiently arranging data wirings.

Although the LCD is darker in screen and somewhat slower in response to the cathode ray tube, the LCD may operate according to a signal scanned on a plane without a device such as an electron gun. It can be used as a very thin display device such as a wall-mounted TV. In addition, liquid crystal displays are lighter in weight and consume less power than cathode ray tubes, making them ideal for portable displays, such as those used in battery-operated notebook computers, displays and monitors. It is becoming.

As described above, a liquid crystal display as a next generation display device is briefly shown in FIG. 1.

As shown, the liquid crystal display device includes a liquid crystal panel 11, a gate driving circuit 12, a data driving circuit 13, a gamma reference voltage generator 14, a timing controller 15, and the like.

The liquid crystal panel 11 is configured such that a plurality of gate lines are arranged in one direction with a predetermined interval, and a plurality of data lines are arranged in a direction perpendicular to the gate line with a predetermined interval to form a matrix-type pixel region. do.

The gate driving circuit 12 outputs a pulse signal that sequentially scans pixels of the liquid crystal panel by one column.

The data driving circuit 13 generates a liquid crystal driving voltage by performing digital / analog conversion on the reference voltage output from the gamma reference voltage generator based on the signals of R, B, and G, and generates the liquid crystal driving voltage. It is applied to the data line of the liquid crystal panel every scanning. The gamma reference voltage generator 14 generates a voltage which is a reference for generating a liquid crystal driving voltage.

The timing controller 15 transmits signals required for data driving and gate driving signals of the liquid crystal panel 11 to the gate driving circuit 12 and the data driving circuit 13 by a system clock.

In a display device for a computer to which a liquid crystal display device having the above structure is applied, for example, in an XGA standard display device that performs pixel display of 1024 (horizontal) x 768 (vertical) pixels, The number is composed of 1024 (horizontal) x 768 (vertical) = 786432 pixels. At this time, the number of gate lines is 768, but since the data lines are divided into three by RGB, the number of data lines is 1024 x 3 = 3072.

In order to input signals corresponding to the gate line and the data line, a plurality of gate driver chips 17 and data driver chips constituting the gate driver circuit 12 and the data driver circuit 13 are provided. 18 is provided.

The gate driving chip 17 constituting the gate driving circuit 12 is a chip IC having 256 pins, and three chips are required to output 768 signals, and the data driving circuit 13 In order to output 3072 data signals, the data driving chip 18 constituting the < RTI ID = 0.0 > 18 < / RTI >

FIG. 2 is an enlarged view of the data driving chip 18 of FIG. 1.                         

As shown in the drawing, the data driving chip 18 inputs 24 pieces of data of red (R), green (G), and blue (B) in the timing controller 15 to each of 8 bits of input data (D1 to D6). Each).

3 shows a data driving circuit 13 including a data driving chip 18 having the above structure.

As shown, each data driving chip 18 divides red (R), green (G), and blue (B) image data into an even number (E) and an odd number (O) in the timing controller 15. 24 data are input to each of the input pins D1 to D6 with 8 bits each. That is, the data output directions of the input pins D1 to D6 of each data driving chip 18 are formed in the same manner.

Here, reference numeral 20 denotes a via hole.

However, in the liquid crystal display device having the above configuration, the data wiring structure of the data driving circuit 13 has the following problems.

The data driving chip 18 of the data driving circuit 13 may include input pins D1 to D3 for receiving even data E from the timing controller 15 and an input pin for receiving odd data O. D4 to D6 are connected to each of the data driving chips 18. Input ports of the data driving chips 18 are arranged in a predetermined direction to form a plurality of via holes 20 in the PCB design. To form a data wiring. That is, as shown in FIG. 3, the total number of via holes required 12 × 24 (24 data of 8 bits each) = 288 via holes 20.

Since the area of the via hole 20 occupies more than the area of the wiring, there was a difficulty in wiring the PCB design.

In addition, as the length of the wiring is increased by the plurality of via holes 20, there are many effects on the electromagnetic interference (EMI).

Accordingly, an object of the present invention is to provide a data driving circuit wiring structure of a liquid crystal display device capable of efficiently arranging data wirings by minimizing via holes.

The data driving circuit wiring structure of the liquid crystal display device of the present invention for achieving the above object is a plurality of data signals each of red (R), green (G), blue (B) image data is divided into even and odd data, respectively In a wiring structure of a data driving circuit which is applied to an input pin of a data driving chip and applies a liquid crystal driving voltage to a data line of a liquid crystal panel every scanning, the two data driving chips are paired and the pair The input pins in the data driving chip are symmetrically arranged so that the input pin receiving the even data and the input pin receiving the odd data are interconnected for each data driving chip. .

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Here, the embodiment of the present invention is a liquid crystal display device of the XGA standard which performs pixel display of 1024 (horizontal) x 768 (species). Since the internal structure thereof is the same as that of the existing liquid crystal display device, the description thereof is omitted.                     

4 and 5 are wiring structure diagrams of a data driving chip for explaining a data driving circuit wiring method of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 6 is a wiring structure diagram for explaining another embodiment of the present invention. to be.

As shown in FIG. 4 and FIG. 5, each data driving chip 30 displays the red, green, and blue image data of even (E) and odd (B) in the timing controller 50. 24 data are inputted through the input pins D1 to D6, respectively, separated by O).

As described above, the data driving chip 30 requires eight chips IC having 384 pins to output 3072 data signals. Therefore, when eight data driving chips 30 are required, four pairs are formed by pairing two adjacent data driving chips 30, and the input pins of the first data driving chips 30 constituting the pairs. D1 to D6 and the input pins D1 to D6 in the second data driving chip 30 are symmetrically disposed.
The input pins corresponding to each other among the input pins D1 to D6 symmetrically arranged with each other are connected to each other. That is, the even image data input pins D1 to D3 of the first data driving chip 30 and the even image data input pins D4 to D6 of the second data driving chip 30 are connected to each other, respectively, The odd image data input pins D4 to D6 of the data driving chip 30 and the odd image data input pins D1 to D3 of the second data driving chip 30 are connected to each other. At this time, the data output directions are arranged in the same direction as before.
In this case, a multiplexer (not shown) is provided in the first and second data driving chips 30 to control the arrangement of the input pins D1 to D6 as a selection terminal, for example, a logic signal FIP of 0 or 1. This can be controlled as shown in [Table 1].

Table 1 shows the change of input data mapping for 8 bits of red (R), green (G), and blue (B) by the logic signal (FIP).

When the logic signal FIP is 0, the data driving chip 30 recognizes the same input pins D1 to D6 as the conventional structure. When the logic signal FIP is 1, the data driving chip 30 recognizes the input pins D1 to D6. By allowing the structure to be symmetrically recognized, the wiring structure shown in FIG. 4 can be formed.
As shown in FIG. 5, as shown in FIG. 4, even-numbered image data (from the timing controller 50) may be connected to connection lines to which even-numbered image data input pins D4 to D6 are connected to each other and to odd-numbered image data input pins to each other. A signal line for supplying E) and a signal line for supplying odd image data O are connected to each other through the via hole 60. In this case, the number of via holes 60 is 8 × 24 (24 data of 8 bits each) = 192, which can reduce the number of via holes 60.

delete

That is, by minimizing the number of via holes 60 due to the data driving circuit wiring structure of the liquid crystal display device, the length of the wiring is shortened, thereby facilitating the PCB design and reducing the load of the wiring. It works.

FIG. 6 illustrates another embodiment of a data driving circuit wiring method of a liquid crystal display device. The wiring of the four pairs of data driving chips 30 is formed in a zigzag shape. As shown in FIG. 4, two adjacent data driving chips are illustrated. Input pins D1 to D6 in 30 are symmetrically arranged with each other, and corresponding pins of the input pins D1 to D6 symmetrically arranged with each other are connected to each other.
At this time, when the connection lines are arranged in a zigzag, the connection lines are arranged as shown in FIG. 6, and the timing controller 50 is connected to the first data driving chip 30.
If the PCB is designed using such a wiring structure, wiring can be performed without the via hole.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. Anyone who knows the knowledge of God will be sure.

The data driving circuit wiring structure of the liquid crystal display device of the present invention described above has the following effects.

First, the via holes 60 are wired by wiring the data drive circuit 40 so that the data drive chip 30 recognizes that the input pins D1 to D6 in the pair of data drive chips are arranged symmetrically with each other. The number of circuits can be minimized, and the length of the wiring can be shortened, thereby facilitating the PCB design.

Second, as the length of the wiring is shortened, the load on the wiring is reduced, which is effective in improving EMI.

Claims (8)

Red (R), green (G), and blue (B) image data are divided into even and odd data, respectively, and the data signals are applied to the input pins of the plurality of data driving chips, so that the liquid crystal is applied to the data line of the liquid crystal panel every scanning. In the wiring structure of a data driving circuit to which a driving voltage is applied, A plurality of data driving chips in which two adjacent first data driving chips and a second data driving chip are paired and the input pins in the pair of first and second data driving chips are symmetrically arranged with each other. ; At least one first connection line connecting an input pin receiving even data of each pair of first data driving chips and an input pin receiving even data of a second data driving chip;  And at least one second connection line connecting an input pin for receiving odd data of each pair of first data driving chips and an input pin for receiving odd data of a second data driving chip. A data drive circuit wiring structure of a liquid crystal display device. The method of claim 1, A first signal line for supplying even image data to the first connection line from a timing controller; And a second signal line for supplying odd image data from said timing controller to said second connection line. The method of claim 2, And the first connection line, the first signal line, and the second connection line and the second signal line are connected through via holes, respectively. The method of claim 1, Wherein each data driving chip has a selection terminal for controlling the arrangement of input pins. Red (R), green (G), and blue (B) image data are divided into even and odd data, respectively, and the data signals are applied to the input pins of the plurality of data driving chips, so that the liquid crystal is applied to the data line of the liquid crystal panel every scanning. In the wiring structure of a data driving circuit to which a driving voltage is applied, A plurality of data driving chips arranged in a line such that input pins of two adjacent data driving chips are arranged symmetrically with each other; At least one first connection line connecting the input pins receiving the even data of the two adjacent data driving chips to each other;  And at least one second connection line connecting the input pins receiving odd data of two adjacent data driving chips to each other. The method of claim 5, A first signal line for supplying even image data from a timing controller, and a second signal line for supplying odd image data from the timing controller, wherein the first and second signal lines drive the plurality of data. A data driving circuit wiring structure of a liquid crystal display device, characterized in that connected to the first data driving chip of the chip. The method of claim 5, And the first and second connection lines are arranged in a zigzag between each data driving chip. The method of claim 5, Wherein each data driving chip has a selection terminal for controlling the arrangement of input pins.

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