KR100747354B1 - Flat Display Panel and Driving Method Thereof - Google Patents

Abstract

The present invention relates to a method of driving a flat panel display panel to improve uniformity.

According to an exemplary embodiment of the present invention, a method of driving a flat panel display panel includes applying a scan pulse to a scan electrode formed in a pixel cell, applying a data pulse synchronized with the scan pulse to the data electrode, and applying a data pulse to the data electrode. And applying a reset pulse.

Description

Flat display panel and driving method thereof             

1 is a plan view showing a conventional flat panel display panel.

FIG. 2 is a waveform diagram illustrating driving waveforms applied to electrodes of the flat panel display panel of FIG. 1. FIG.

3 is a waveform diagram illustrating a method of driving a flat panel display panel according to an exemplary embodiment of the present invention.

4 is a block diagram illustrating a data driver according to an exemplary embodiment of the present invention.

5 is a block diagram illustrating a scan driver according to an exemplary embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

1: pixel cell 10,14: buffer

12: photo coupler 16: data drive IC

18,22,26,30: Drive IC 20,24,28,32: Switch

34: scan drive IC

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel display panel and a driving method thereof, and more particularly, to a flat panel display panel and a driving method thereof capable of improving uniformity.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes (CRTs). Such flat panel displays include liquid crystal displays (hereinafter referred to as "LCD"), field emission displays (hereinafter referred to as "FED"), and plasma display panels (hereinafter referred to as "PDP"). And electroluminescence (hereinafter referred to as "EL"). In order to improve the display quality, research and development have been actively conducted to increase the brightness, contrast and color purity of flat panel displays.

1 is a view showing a conventional flat panel display panel.

Referring to FIG. 1, in a conventional flat panel display panel, m × n pixel cells 1 are arranged in a matrix form. The pixel cell 1 is positioned at the intersection of the scan lines S1 to Sm and the data lines D1 to Dn. The scan lines S1 to Sm are supplied with scan pulses from a scan driver not shown. The data lines D1 to Dn are supplied with data pulses synchronized with scan pulses from a not shown data driver. In the pixel cell 1 to which the data pulses are supplied, electrons are emitted (for example: FED) by the voltage difference between the scan pulses and the data pulses. After the electrons are emitted from the pixel cell 1, gray levels are implemented by using a pulse width modulation method and / or a pulse amplitude modulation method to display an image.

2 is a waveform diagram illustrating a driving waveform supplied to a conventional flat panel display panel.

Referring to FIG. 2, negative scan pulses -SP are sequentially supplied to scan lines S1 to Sm of a conventional flat panel display panel, and negative scan pulses -SP are supplied to data lines D1 to Dn. The synchronized data pulse DP is supplied. In the pixel cells supplied with the scan pulse (-SP) and the data pulse (DP), electrons are emitted by the voltage difference between the scan pulse (-SP) and the data pulse (DP). For example, when the scan pulse (-SP) having a voltage of -5V is supplied to the first scan line (S1) and the data pulse (DP) having a voltage of 5V is supplied to the data lines (D1 to Dn), the scan is performed. A voltage difference of 10V is generated in the pixel cells supplied with the pulses -SP and the data pulses DP. For example, in the case of the FED, the electrons corresponding to the voltage difference between the scan pulse (-SP) and the data pulse (DP) are emitted from the pixel cells supplied with the scan pulse (-SP) and the data pulse (DP). On the other hand, the width and / or amplitude of the data pulse DP are supplied differently depending on the gray scale. For example, the width and / or amplitude of the data pulse DP is set to be wide or high when expressing a high gray level, and the width and / or amplitude of the data pulse DP is set to be narrow or low when expressing a low gray level. In this case, since only 5V, that is, the voltage of the data pulse DP is applied to the pixel cells in which the second to m th scan lines S2 to Sm are formed, sufficient electrons are not emitted to express the gray scale. In other words, sufficient voltage for electron emission is not supplied. Thereafter, this process is repeated to apply the scan pulse (-SP) and the data pulse DP to the m th scan line Sm. After the gray scale is expressed, the reset pulse is supplied to the scan lines S1 to Sm in the reset period (not shown) to remove the charges charged in the pixel cells.

However, in the conventional flat panel display device, the data pulse DP is also applied to the pixel cells in which the second to m th scan lines S2 to Sm are formed when the scan pulses −SP are supplied to the first scan line S1. Is supplied. That is, charge is charged in the pixel cells in which the second to m th scan lines S2 to Sm are formed by the voltage value of the data pulse DP. Therefore, the emission conditions between the pixel cells on which the first scan line S1 is formed and the pixel cells on which the second to m th scan lines S2 to Sm are formed are different. Meanwhile, even when scan pulses (-SP) and data pulses (DP) are supplied to the pixel cells on which the second scan line (S2) is formed, the data pulses (DP) are supplied to the third to mth scan lines (S3 to Sm). do. That is, since the data pulses DP are supplied to all the pixel cells until the scan pulses -SP and the data pulses DP are supplied to the pixel cells on which the mth scan line Sm is formed, the scan lines S1 to Sm. Electron emission conditions of the pixel cells are different. As described above, since the pixel cells have different electron emission conditions, uniformity between the pixel cells is lowered and operation characteristics are different. Meanwhile, in the reset period, reset pulses for removing charges charged in the pixel cells are supplied to the scan lines S1 to Sm. However, since the reset pulse is supplied only in the reset period, the charges charged in the pixel cells by the data pulse DP cannot be removed in the pixel cell selection period.

Accordingly, it is an object of the present invention to provide a flat panel display panel and a method of driving the same to improve uniformity.

In order to achieve the above object, a method of driving a flat panel display panel according to the present invention includes applying a scan pulse to a scan electrode formed in a pixel cell, applying a data pulse synchronized with the scan pulse to the data electrode, and And applying a reset pulse to the data electrode after the application.

The flat panel display panel according to the present invention includes a data driver for supplying data and reset pulses to the data electrodes, and a scan driver for supplying scan pulses synchronized with the data pulses.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 3 to 5.

3 is a waveform diagram illustrating a method of driving a flat panel display panel according to an exemplary embodiment of the present invention.

Referring to FIG. 3, scan pulses (-SP) are sequentially supplied to the scan lines (S1 to Sm) of the flat panel display panel of the present invention, and data synchronized with the scan pulses (-SP) to the data lines (D1 to Dn). The pulse DP is supplied. After the data pulse DP is supplied to the data lines D1 to Dn, the reset pulse RP for initializing the pixel cell is supplied. That is, the data pulses DP and the reset pulses RP are sequentially supplied to the data lines D1 to Dn. The operation process will be described in detail. First, a scan pulse (-SP) is supplied to the first scan line (S1), and a data pulse (DP) synchronized with the scan pulse (-SP) is supplied to the data lines (D1 to Dn). . In the pixel cells supplied with the data pulses DP, charges are emitted by the voltage difference between the scan pulses -SP and the data pulses DP. In this case, a data pulse DP is applied to the pixel cells in which the second to m th scan lines S2 to Sm are formed, and thus charges are charged by the voltage of the data pulse DP. At this time, the pulse width and / or amplitude of the data pulse DP is determined according to the gray scale. Thereafter, a negative reset pulse RP is supplied to the data lines D1 to Dn to remove charges charged in the pixel cells. Thus, the pixel cells maintain their initial state. This process is repeated to apply the scan pulse (-SP) to the m th scan line (Sm), and to apply the data pulse (DP) and the reset pulse (RP) to the data lines (D1 to Dn). That is, in the present invention, after the data pulse DP is supplied, the reset pulse RP is supplied to initialize the pixel cells, thereby maintaining the same electron emission conditions of all the pixel cells. That is, in the present invention, the uniformity of the pixel cells can be improved.

FIG. 4 is a block diagram illustrating a data driver for generating the data pulses and the reset pulses shown in FIG. 3.

Referring to FIG. 4, the data driver of the present invention electrically stores the first buffer 10, the first buffer 10, and the second buffer 14 to temporarily receive data from a data input unit (not shown). Photo-coupler 12 for isolating, a second buffer 14 for temporarily storing data, and a data drive IC for supplying data supplied from the second buffer 14 to the data lines D1 to Dn (Integrated). Circuit), first and second switches 20 and 24 connected to the photo coupler 12, the second buffer 14 and the data drive IC 16, and the first and second switches 20 First and second drive ICs 18,22 for driving .24. The first ends of the first buffer 10 and the photo coupler 12 are connected to the ground potential GND. The second end of the photo coupler 12, the second buffer 14 and the data drive IC 16 are connected to the floating potential. In other words, the second stage of the photocoupler 12, the second buffer 14 and the data drive IC 16 and the ground potential (GND) or -5V connected to the first or second switch (20, 24) Connected. The photo coupler 12 electrically insulates the first buffer 10 and the second buffer 14. The first buffer 10 temporarily stores data and supplies the stored data to the photo coupler 12. The photo coupler 12 supplies the data supplied from the first buffer 10 to the second buffer 14. The second buffer 14 temporarily stores data and supplies the stored data to the data drive IC 16. The data driver IC 16 supplies data pulses corresponding to the data supplied from the second buffer 14 to the data lines D1 to Dn. The first drive IC 18 drives the first switch 20 in response to a control signal supplied from a controller (not shown). The second drive IC 22 drives the second switch 24 in response to a control signal supplied from a controller (not shown). The first switch 20 is turned on in response to a drive signal of the first drive IC 18. When the first switch 20 is turned on, the second buffer 14 and the data drive IC 16 are turned on. It is connected to the ground potential GND. The second switch 24 is turned on in response to the drive signal of the second drive IC 22. When the second switch 24 is turned on, the second buffer 14 and the data drive IC 16 are turned on. It is connected to -5V. Such first and second switches 20 and 24 operate alternately.

Referring to the generation of the driving waveform in detail, first, the first switch 20 is turned on to generate the driving waveform of the Ta section shown in FIG. 3. When the first switch 20 is turned on, the first buffer 10, the photo coupler 12, the second buffer 14, and the data drive IC 16 are connected to the ground potential GND. At this time, the data driver IC 16 outputs the ground potential GND to the data lines D1 to Dn. Therefore, driving waveforms such as Ta are supplied to the data lines D1 to Dn. Thereafter, the first switch 20 is turned on to generate the driving waveform shown in Tb. When the first switch 20 is turned on, the first buffer 10, the photo coupler 12, the second buffer 14, and the data drive IC 16 are connected to the ground potential GND. At this time, the data driver IC 16 supplies a data pulse corresponding to the data stored in the second buffer 14 to the data lines D1 to Dn via the first buffer 10 and the photo coupler 12. do. Therefore, a driving waveform, such as Tb, that is, data pulse DP is supplied to the data lines D1 to Dn. The driving waveform of Tc supplied after is supplied through the same process as Ta. Thereafter, the second switch 24 is turned on to supply a driving waveform of Td. When the second switch 24 is turned on, the second buffer 14 and the data drive IC 16 are connected with a voltage of -5V. At this time, the first buffer 10 is connected to the ground potential GND. On the other hand, one end of the photo coupler 12 is connected to the ground potential GND, and the other end is connected to a voltage of -5V. The data driver IC 16 supplies a voltage of -5V to the data lines D1 to Dn. Accordingly, a driving waveform such as Td, that is, a reset pulse RP is supplied to the data lines D1 to Dn. This process is repeated and the data pulse DP and the reset pulse RP are supplied to the data lines D1 to Dn.

FIG. 5 is a block diagram illustrating a scan driver for generating the scan pulse shown in FIG. 3.

Referring to FIG. 5, the scan driver of the present invention is connected to a scan drive IC 34 for supplying a scan pulse (-SP) to the scan lines S1 to Sm and to the scan drive ICs 28 and 32. First and second switches 28 and 32 and first and second drive ICs 26 and 30 for driving the first and second switches 28 and 32 are provided. The first switch 28 is installed between the ground potential GND and the scan drive IC 34 to supply the ground potential GND to the scan drive IC 34. The second switch 32 is installed between the -5V voltage and the scan drive IC 34 to supply the -5V voltage to the scan drive IC 34. The first drive IC 26 drives the first switch 28 in response to a control signal supplied from a controller (not shown). The second drive IC 30 drives the second switch 32 in response to a control signal supplied from a controller (not shown). These first and second switches 28, 32 are alternately turned on.

The process of generating the driving waveform will be described in detail. First, the first switch 28 is turned on to generate the driving waveform of the Te section shown in FIG. 3. That is, the scan drive IC 34 is supplied with the ground potential GND. The scan drive IC 34 supplied with the ground potential GND supplies the ground potential GND to the scan lines S1 to Sm. Therefore, driving waveforms such as Te are supplied to the scan lines S1 to Sm. Thereafter, the second switch 32 is turned on to generate a driving waveform of the Tf section. That is, the scan drive IC 34 is supplied with a -5V voltage. The scan drive IC 34 supplied with the −5 V voltage supplies a voltage of −5 V to the scan lines S1 to Sm. Repeating this process, the scan drive IC 34 supplies a scan pulse (-SP) to the scan lines S1 to Sm. On the other hand, the voltage of -5V described in the present invention can be arbitrarily set by the user.

As described above, according to the flat panel display panel and the driving method thereof according to the present invention, after the data pulse is supplied to the data lines, the reset pulse is supplied to remove the charges charged in the pixel cells. Therefore, the electron emission conditions of all the pixel cells are the same, thereby improving the uniformity of the pixel cells.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (10)

In the driving method of a flat panel display panel including a plurality of scan electrodes and data electrodes, Applying a scan pulse to one scan electrode of the plurality of scan electrodes; Applying a data pulse to the data electrode in synchronization with a scan pulse applied to the one scan electrode; Applying a scan pulse to another scan electrode of the plurality of scan electrodes; Applying a data pulse to the data electrode in synchronization with a scan pulse applied to the other scan electrode; And a reset pulse is applied to the data electrode between the scan pulse applied to the one scan electrode and the scan pulse applied to the other scan electrode. The method of claim 1, And the reset pulse has a polarity opposite to that of the data pulse. The method of claim 1, And the reset pulse is applied so as not to overlap with the scan pulse of the one scan electrode and the scan pulse of the other scan electrode. A flat panel display panel including a plurality of scan electrodes and data electrodes, A scan driver for applying a scan pulse to one scan electrode of the plurality of scan electrodes and applying a scan pulse to another scan electrode of the plurality of scan electrodes; And A data driver configured to apply a scan pulse applied to the one scan electrode and a data pulse synchronized with the scan pulse applied to the other scan electrode to the data electrode, And the data driver applies a reset pulse to the data electrode between the scan pulse applied to the one scan electrode and the scan pulse applied to the other scan electrode. The method of claim 4, wherein The data driver, A first buffer for receiving data, A second buffer receiving the data from the first buffer; A photo coupler for electrically insulating the first buffer and the second buffer; A data drive integrated circuit which supplies the data pulse corresponding to the data input from the second buffer to the data electrode; And a reset pulse generator connected to a first end of the photo coupler, a second buffer, and a data drive integrated circuit. The method of claim 5, The reset pulse generator, A first switch disposed between a base voltage source and a first end of the photo coupler, the second buffer and the data drive integrated circuit; A second switch provided between the negative voltage source and the first end of the photo coupler, the second buffer and the data drive integrated circuit; A first drive integrated circuit for driving the first switch; And a second drive integrated circuit for driving the second switch. The method of claim 6, And the first and second switches are alternately operated. The method of claim 5, And the data drive integrated circuit supplies one of a voltage corresponding to data stored in the second buffer and a voltage supplied from the reset pulse generator to the data electrode. The method of claim 4, wherein The scan driver, Scan drive integrated circuits, A first switch disposed between a base voltage source and the scan drive integrated circuit; A second switch provided between the negative voltage source and the scan drive integrated circuit; A first drive integrated circuit driving the first switch; And a second drive integrated circuit for driving the second switch. The method of claim 9, And the first and second switches are alternately driven.

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