KR100730183B1 - Organic thin film transistor and method of manufacturing the same, flat display apparatus comprising the same - Google Patents

Abstract

The present invention provides an organic thin film transistor, a method for manufacturing the same, and a method for manufacturing the same, wherein the opening formed in the gate insulating layer is deposited with a conductive material and patterned to prevent short shortage of a channel connecting the source / drain wiring to the organic semiconductor. It is about. The organic thin film transistor of the present invention includes a gate insulating layer and an opening formed on a source / drain wiring and a gate electrode formed on a substrate, and having a predetermined pattern of openings exposing the source / drain wiring to expose the source / drain wiring. The conductive material includes an organic semiconductor layer electrically contacted with the source / drain interconnects through a vacuum deposition and a patterned portion of the conductive material, and electrically connected to the conductive material.

Description

Organic thin film transistor and method for manufacturing same, flat display device having same

1 is a cross-sectional view schematically illustrating a conventional organic thin film transistor.

2 is a schematic cross-sectional view of an organic thin film transistor according to an exemplary embodiment of the present invention.

3 is a schematic cross-sectional view of an organic thin film transistor according to another exemplary embodiment of the present invention.

4 is a cross-sectional view of the flat panel display device including the organic thin film transistor of FIG. 2.

FIG. 5 is a cross-sectional view of a flat panel display device having the organic thin film transistor of FIG. 3.

The present invention relates to an organic thin film transistor, a method for manufacturing the same, and a flat panel display device having the same, and more particularly, to deposit an opening formed in a gate insulating layer with a conductive material and pattern the same to connect a source / drain wiring to an organic semiconductor. The present invention relates to an organic thin film transistor for preventing short circuit of a channel and a flat panel display device having the same.

Thin film transistors used in flat panel display devices such as liquid crystal display devices, organic electroluminescent display devices, or inorganic electroluminescent display devices (hereinafter referred to as TFTs) are used to drive switching elements and pixels that control the operation of each pixel. Used as a drive element.

Such a conventional TFT includes a gate electrode 120, source / drain lines 130a and b, a gate electrode 120, and source / drain lines 130a formed side by side on the substrate 110 as shown in FIG. b) the gate insulating layer 140 formed on the gate insulating layer 140, the organic semiconductor layer 140 formed on the gate insulating layer 140, and the taper 160a and b, the source / drain wirings 130a and b and the organic semiconductor layer 140 are electrically connected to each other. Source / drain electrodes 180a and b.

In general, when the gate insulating layer 140 uses an organic material or an organic-inorganic hybrid type, a gate leakage current is generated to a large thickness (0.5 to 1.0 μm). However, due to this, during dry etching, which is a contact hole forming process that connects between the source / drain metal and the pad metal or between the source / drain metal and the pixel electrode, angles of the taper 160a and b are formed to 70 degrees or more. After the gate insulating layer 140 is formed by a dry etching method, the source / drain electrodes 180a and b are formed using a metal having a high work function (Au, platinum Pt, palladium, etc.). Is formed to connect the source / drain wirings 130a and b to the organic semiconductor layer 150. Metals with a high work function are difficult to use above a certain thickness (1000 A) due to weak bonding with underlying materials.

Due to such material characteristics and process characteristics, the inclined surfaces of the channels to be formed on the taper 160a and b have a high possibility that the metal having a high work function is formed too thinly or become disconnected lines 161a and b.

The technical problem to be achieved by the present invention is an organic thin film transistor and a flat panel display having the same to prevent the short circuit of the channel connecting the source / drain wiring and the organic semiconductor by depositing and patterning the opening formed in the gate insulating layer with a conductive material To provide a device.

According to an aspect of the present invention, there is provided an organic thin film transistor including: source / drain wiring and a gate electrode formed on a substrate; A gate insulating layer formed on the source / drain wiring and the gate electrode and having an opening having a predetermined pattern exposing the source / drain wiring; A conductive material contacted with the source / drain wiring through the opening, and having a predetermined portion patterned after vacuum deposition; And an organic semiconductor layer electrically connected to the conductive material.

The organic thin film transistor manufacturing method for solving the technical problem to be achieved by the present invention comprises the steps of forming a source / drain wiring and a gate electrode on the substrate; Forming a gate insulating layer on the source / drain wiring and the gate electrode, the gate insulating layer having an opening having a predetermined pattern exposing the source / drain wiring; Depositing a conductive material to contact the source / drain wiring through the opening and partially patterning the conductive material; And forming an organic semiconductor layer electrically connected to the conductive material.

According to an aspect of the present invention, a flat panel display device includes a source / drain line and a gate electrode formed on a substrate, and an upper portion of the source / drain line and a gate electrode, and exposes the source / drain line. A gate insulating layer having an opening of a predetermined pattern, a conductive material contacted with the source / drain wiring through the opening, vacuum deposited and patterned at a predetermined portion, and an organic semiconductor layer electrically connected to the conductive material. An organic thin film transistor comprising; And a display device electrically connected to the organic thin film transistor.

Hereinafter, with reference to the accompanying drawings will be described in detail the present invention.

2 is a schematic cross-sectional view of an organic thin film transistor according to an exemplary embodiment of the present invention.

As shown in FIG. 2, the gate electrode 120 and the source / drain lines 130a and b are formed at predetermined positions on the substrate 110. The gate electrode 120 and the source / drain lines 130a and b may be formed of the same material or different materials.

The substrate 110 may be acrylic, polyimide, polycarbonate, polyester, mylar or other plastic materials, but is not limited thereto, and a metal foil such as SUS or tungsten may be used. Glass material is also available. As the substrate 11, a flexible substrate is preferable.

The gate electrode 120 may be a conductive metal such as MoW, Al, Cr, Al / Cr, conductive polyaniline, conductive poly pirrole, conductive polythiopjene, polyethylene deoxythiophene, or polyethylene. Various conductive polymers such as dioxythiophene (PEDOT) and polystyrene sulfonic acid (PSS) may be used, such as adhesion to the substrate 110, flatness of the thin films formed on the gate electrode 120, processability for patterning, and subsequent processing. Appropriate materials should be selected in consideration of resistance to the chemicals used.

After the gate electrode 120 and the source / drain wirings 130a and b are formed, the gate insulating layer 140 is formed. The gate insulating layer 140 may be composed of, for example, an inorganic insulating layer such as SiO 2, SiN x, Al 2 O 3, Ta 2 O 5, BST, PZT, etc. by chemical vapor deposition or sputtering. , PS (polystyrene), phenolic polymer, acrylic polymer, imide polymer such as polyimide, arylether polymer, amide polymer, fluorine polymer, p-xylene polymer, vinyl alcohol polymer, parylene ( parylene), and an organic insulating layer made of a polymer material such as a compound containing one or more thereof, and in some cases, may be formed of a plurality of layers composed of an organic insulating layer and an inorganic insulating layer. This is possible, and it is preferable to select a material having excellent dielectric constant along with insulating properties and having the same or similar thermal expansion coefficient as the substrate. In the present invention, the gate insulating layer 140 is a hybrid type in which organic and inorganic materials are mixed and formed by a spin coating method.

After the gate insulating layer 140 in which the organic and inorganic materials are mixed is formed, the gate insulating layer 140 is formed through a patterning method to form a channel between the organic semiconductor layer 150 and the source / drain interconnects 130a and b. Openings 160a and b are formed in the openings. In order to form the openings 160a and b in the gate insulating layer 140, the gate insulating layer 140 is patterned using a photoresist pattern (not shown). In addition, it can be formed by one photolithography process using a halftone mask, but is not necessarily limited to the above-described method.

After the openings 160a and b are formed, the openings 160a and b are sputtered, chemical vapor deposition, or evaporation using the conductive materials 170a and b. After vacuum deposition and the like, the vacuum deposited conductive materials 170a and b are patterned by a photolithography method or the like. The conductive materials 170a and b may be conductive metals such as MoW, Al, Cr, Al / Cr, conductive polyaniline, conductive polypyrrole, conductive polythiopjene, and polyethylene dioxythiophene. Various conductive polymers may be used, such as polyethylene dioxythiophene (PEDOT) and polystyrene sulfonic acid (PSS).

The openings 160a and b are vacuum deposited with the conductive materials 170a and b, and after the vacuum deposited conductive materials 170a and b are patterned, the organic semiconductor layer 150 is formed. The organic semiconductor layer 150 may include pentacene, tetracene, anthracene, naphthalene, alpha-6-thiophene, alpha-4-thiophene, perylene, and the like. Derivatives, rubrene and derivatives thereof, coronene and derivatives thereof, perylene tetracarboxylic diimide and derivatives thereof, perylene tetracarboxylic dianhydride dianhydride) and derivatives thereof, oligoacenes and derivatives thereof of naphthalene, oligothiophenes and derivatives thereof of alpha-5-thiophene, phthalocyanine and derivatives thereof, with or without metal, naphthalene tetracarboxyl Naphthalene tetracarboxylic diimide and derivatives thereof, naphthalene tetracarboxylic dianhydride and derivatives thereof, pyromellitic dianhydra Etc. de and a derivative thereof, trimellitic Pyro tick diimide and its derivatives, conjugated polymer containing thiophene and its derivatives, fluorene and its derivatives and polymer containing fluorene can be used.

After the organic semiconductor layer 150 is formed, the source / drain electrodes 180a, the metal having a high work function (gold (Au), platinum (Pt), palladium (Pd), etc.) on the conductive materials 170a and b are formed. By forming b), the source / drain wirings 130a and b are connected to the organic semiconductor layer 150. As shown in FIG. 2, after the openings 160a and b in which the channels are formed are vacuum deposited with the conductive materials 170a and b, the vacuum deposited conductive materials 170a and b are patterned and the source / top is formed thereon. As the drain electrodes 180a and b are formed, the likelihood of forming too thin or disconnecting the source / drain electrodes 180a and b becomes low.

3 is a schematic cross-sectional view of an organic thin film transistor according to another exemplary embodiment of the present invention.

2 illustrates an embodiment in which the organic semiconductor layer 150 is formed, and the source / drain electrodes 180a and b are formed after the openings 160a and b are vacuum deposited and patterned with the conductive materials 170a and b. Although disclosed, FIG. 3 illustrates vacuum deposition and patterning of the openings 160a and b with the conductive materials 170a and b, and the organic semiconductor layer 150 is formed after the source / drain electrodes 180a and b are formed. Another embodiment is shown, and the description is the same as in FIG. 2 and will be omitted.

4 is a cross-sectional view schematically illustrating an organic light emitting diode as an example of a pixel unit included in the flat panel display apparatus including the organic thin film transistor of FIG. 2, and includes an organic thin film transistor unit 100 and a pixel unit 200. do.

The organic thin film transistor unit 100 has the substrate 110, the gate electrode 120, the source / drain wirings 130a and b, and the openings 160a and b having a predetermined pattern deposited thereon as the conductive materials 170a and b. The patterned gate insulating layer 140, the organic semiconductor layer 150, the source / drain wires 130a and b and the source / drain electrodes 180a and b electrically connecting the organic semiconductor layer 150 to the protective layer ( 190).

The pixel unit 200 includes a first electrode layer 210, a pixel defining layer 220, an organic electroluminescent unit 230, and a second electrode layer 240.

The organic thin film transistor unit 100 except for the protective layer 190 is illustrated in FIG. 2, and a detailed description thereof is also disclosed above, and thus description thereof is omitted.

The openings 160a and b are formed to electrically connect the source / drain wirings 130a and b, the source / drain electrodes 180a and b, and the organic semiconductor layer 150, and then the organic thin film transistor portion thereon. A protective layer 190 is formed, such as a passivation layer and / or planarization layer to insulate and / or planarize 100.

The first electrode layer 210 is formed on the passivation layer 190, and the first electrode layer 210 is in electrical communication with the organic thin film transistor unit 100 through the via hole 211 formed in the passivation layer 190. To achieve.

The first electrode layer 210 may be configured in various ways. For example, the first electrode layer 210 may be a transparent electrode made of a transparent conductive material such as ITO, IZO, ZnO, or In 2 O 3. Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr and a reflective electrode comprising a compound thereof and may be composed of a transparent electrode formed thereon, the first electrode layer 210 is a single layer, Various modifications are possible, including, but not limited to, bilayers.

After the first electrode layer 210 is formed, a pixel defining layer 220 for defining a pixel opening is formed on the top. After the pixel defining layer 220 is formed, the organic electroluminescent unit 230 is provided in at least a region including the pixel opening.

As the organic electroluminescent unit 230, a low molecular or polymer organic film may be used. When the low molecular organic film is used, a hole injection layer (HIL), a hole transport layer (HTL), and an emission layer (EML) are emitted. ), An electron transport layer (ETL), an electron injection layer (EIL), etc. may be formed by stacking a single or a complex structure, and the usable organic materials may be copper phthalocyanine, N, N-D Various applications are possible, including (naphthalen-1-yl) -N, N'-diphenyl-benzidine, tris-8-hydroxyquinoline aluminum (Alq3). These low molecular weight organic films are formed by the vacuum deposition method.

In the case of the polymer organic film, the structure may include a hole transporting layer (HTL) and a light emitting layer (EML). In this case, PEDOT is used as the hole transporting layer, and PPV (Poly-Phenylenevinylene) and polyfluorene Polymer organic materials such as polyfluorene) may be used and may be formed by screen printing or inkjet printing. The organic layers constituting the organic electroluminescent unit are not necessarily limited thereto, and various embodiments may be applied.

Similarly, in the case of the first electrode layer 210, the second electrode layer 240 may have various configurations depending on the polarity and the light emission type of the electrode layer. That is, when the second electrode layer 240 acts as a cathode electrode and the light emission type is a bottom emission type, the second electrode layer 240 is Li, Ca, LiF / Ca, LiF / Al, Al, Ag, Mg, and their It may be composed of one or more layers of a material having a small work function, such as a compound, and in the case of a top emission type, an organic electroluminescence unit using Li, Ca, LiF / Ca, LiF / Al, Al, Ag, Mg, and a compound thereof. After forming an electrode for matching the work function on one surface of the 230, a transparent electrode such as ITO, IZO, ZnO, In 2 O 3, or the like may be formed thereon, and the second electrode layer 240 may be entirely formed. It is possible to take various configurations without being limited thereto. Meanwhile, in the above embodiment, the first electrode layer 210 serves as an anode electrode and the second electrode layer 240 serves as a cathode electrode. However, various configurations are possible, such as having opposite polarities. Do.

FIG. 5 is a cross-sectional view schematically illustrating an organic light emitting diode as an example of a pixel unit included in the flat panel display apparatus including the organic thin film transistor of FIG. 3, and includes an organic thin film transistor unit 100 and a pixel unit 200. do.

In the organic thin film transistor unit 100 illustrated in FIG. 4, the organic semiconductor layer 150 is formed, and the openings 160a and b are vacuum deposited and patterned with the conductive materials 170a and b, and then the source / drain electrodes are patterned. Although an embodiment of forming 180a and b is disclosed, in the organic thin film transistor unit 100 illustrated in FIG. 5, the openings 160a and b are vacuum deposited and patterned with the conductive materials 170a and b, and the source / Another embodiment in which the organic semiconductor layer 150 is formed after forming the drain electrodes 180a and b is illustrated, and the description thereof is the same as FIG. 4, and thus will be omitted.

The above embodiments are examples for describing the present invention, and the present invention is not limited thereto, and the thin film transistor according to the present invention may be applied to a liquid crystal display device in addition to an organic electroluminescent display device, and may be used in addition to a flat panel display device. Various modifications may be considered, such as mounting to a driver circuit which is not implemented.

As described above, according to the present invention, an opening formed in the gate insulating layer may be deposited with a conductive material and patterned to prevent short defects in the channel connecting the source / drain wiring and the organic semiconductor.

Claims (18)

Source / drain wiring and gate electrodes formed on the substrate; A gate insulating layer formed on the source / drain wiring and the gate electrode and having an opening having a predetermined pattern exposing the source / drain wiring; A conductive material contacted with the source / drain wiring through the opening, and having a predetermined portion patterned after vacuum deposition; And An organic thin film transistor comprising an organic semiconductor layer electrically connected to the conductive material. The organic thin film transistor of claim 1, further comprising a source / drain electrode formed on the gate insulating layer and electrically connected to the source drain wiring through the patterned opening. The organic thin film transistor of claim 2, wherein the organic semiconductor layer is formed on the gate insulating layer, and the source / drain electrodes overlap with the organic semiconductor layer. The organic thin film transistor of claim 2, wherein the source / drain electrode comprises at least one of gold, platinum, and palladium. The organic thin film transistor of claim 1, wherein the conductive material is provided by vacuum deposition of a conductive metal including at least one of MoW, Al, Cr, and Al / Cr. The method of claim 5, And the conductive material comprises a conductive polymer. Forming source / drain interconnects and gate electrodes on the substrate; Forming a gate insulating layer on the source / drain wiring and the gate electrode, the gate insulating layer having an opening having a predetermined pattern exposing the source / drain wiring; Depositing a conductive material to contact the source / drain wiring through the opening and partially patterning the conductive material; And Forming an organic semiconductor layer electrically connected to the conductive material. The organic thin film transistor of claim 7, further comprising forming a source / drain electrode on the gate insulating layer, the source / drain electrodes electrically connected to the source drain wiring through the openings filled with the conductive material. Manufacturing method. The method of claim 8, wherein the organic semiconductor layer is formed on the gate insulating layer, and the source / drain electrodes overlap with the organic semiconductor layer. The method of claim 8, wherein the source / drain electrode comprises at least one of gold, platinum, and palladium. The method of claim 8, wherein the conductive material is formed by vacuum deposition of a conductive metal including at least one of MoW, Al, Cr, and Al / Cr. The method of claim 11, The conductive material is an organic thin film transistor manufacturing method comprising a conductive polymer. A gate insulating layer having a source / drain wiring and a gate electrode formed on a substrate, an opening in a predetermined pattern formed on the source / drain wiring and a gate electrode and exposing the source / drain wiring; An organic thin film transistor including a conductive material contacted with the source / drain wiring and vacuum-deposited and then patterned at a predetermined portion, and an organic semiconductor layer electrically connected to the conductive material; And And a display device electrically connected to the organic thin film transistor. The flat panel display of claim 13, further comprising a source / drain electrode formed on the gate insulating layer and electrically connected to the source drain wiring through the opening filled with the conductive material. The flat panel display of claim 14, wherein the organic semiconductor layer is formed on the gate insulating layer, and the source / drain electrodes overlap the organic semiconductor layer. The flat panel display of claim 14, wherein the source / drain electrodes comprise at least one of gold, platinum, and palladium. The flat panel display of claim 13, wherein the conductive material is formed by vacuum deposition of a conductive metal including at least one of MoW, Al, Cr, and Al / Cr. The method of claim 17, And the conductive material comprises a conductive polymer.

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