KR100552663B1 - Multi-band VCO and oscillation method thereof - Google Patents

Abstract

Disclosed are a multiband voltage controlled oscillation apparatus and method. The apparatus is characterized by a negative resistance generator for generating a negative resistance and a negative resistance with a variable inductance by a switching operation in response to a switching control signal input from the outside and a capacitance varying in response to a control voltage input from the outside. And a resonator that resonates in response. Therefore, there is an effect that can reduce the area, volume and power consumption.

Description

Multiband VCO and Oscillation Method

1 is a schematic block diagram of a multi-band voltage controlled oscillation apparatus according to the present invention.

FIG. 2 is a circuit diagram of a preferred embodiment of the present invention of the multi-band voltage controlled oscillation apparatus shown in FIG.

3 is a circuit diagram of another preferred embodiment of the present invention of the multi-band voltage controlled oscillation device shown in FIG.

4 is a circuit diagram of yet another preferred embodiment of the present invention of the multi-band voltage controlled oscillation apparatus shown in FIG.

5 is a circuit diagram of another embodiment according to the present invention of the apparatus shown in FIG.

FIG. 6 is a flowchart for describing a voltage controlled oscillation method according to the present invention performed in the apparatus shown in FIG. 1.

The present invention relates to a voltage controlled oscillator (VCO), and more particularly, to a voltage controlled oscillator and method for a multi frequency band.

The conventional voltage controlled oscillation device uses two oscillation circuits to generate an oscillation signal having a resonant frequency that can be varied to two frequencies. Alternatively, in order to vary the resonant frequency to a desired frequency band, the conventional voltage controlled oscillation apparatus should provide a plurality of inductors in the differential form and at least four or more inductors in the single form.

As a result, the above-described conventional voltage controlled oscillation apparatus must separately provide as many oscillation circuits or inductors as desired to vary the resonance frequency. Therefore, there are problems in that the volume and area of the conventional voltage controlled oscillation device become large and the power consumption becomes large.

It is an object of the present invention to provide a multi-band voltage controlled oscillation apparatus capable of generating an oscillation signal having a resonant frequency that is variable to a plurality of frequencies by varying the length of an inductive load using switching. .

Another object of the present invention is to provide a multi-band voltage controlled oscillation method performed in the multi-band voltage controlled oscillator.

The multi-band voltage controlled oscillation apparatus according to the present invention for achieving the above object is a negative resistance generator for generating a negative resistance and a capacitance that is variable in response to a control voltage input from the outside and a switching control signal input from the outside. Preferably, the resonator is configured to resonate in response to the negative resistance with an inductance variable by a responsive switching operation.

In order to achieve the above another object, the voltage controlled oscillation method according to the present invention performed in the multi-band voltage controlled oscillation apparatus adjusts the capacitance using the control voltage, and selectively turns on the switches to adjust the inductance. And resonating the voltage controlled oscillation device with the adjusted capacitance and inductance using the negative resistance.

Hereinafter, the configuration and operation of a multi-band voltage controlled oscillation apparatus according to the present invention will be described with reference to the accompanying drawings.

1 is a schematic block diagram of a multi-band voltage controlled oscillation apparatus according to the present invention, which comprises a negative resistance generator 10 and a resonator 20.

The negative resistance generator 10 shown in FIG. 1 generates negative resistance, and outputs the generated negative resistance to the resonator 20. Because the resonant frequency in the resonator 20 is dissipated by a parasitic resistor such as an inductor, the resonance can be stopped, so that the negative resistance generator 10 resonates the negative resistance so that the resonance can be continued. Output to section 20. At this time, the resonator 20 resonates in response to the negative resistance generated by the negative resistance generator 20 with a variable capacitance in response to the control voltage Vc input from the outside and an inductance variable by the switching operation. do. To this end, the resonator 20 illustrated in FIG. 1 may be implemented as a capacitive load 22, an inductive load 24, and switches 26.

Here, each of the at least two switches 26 is switched on or switched off in response to the switching control signal SC input from the outside. At this time, the pattern of the capacitive load 22 is varied in response to the control voltage Vc, and the inductance of the inductive load 24 connected to the capacitive load 22 is the switching operation of the switches 26. Variable by

The multi-band voltage controlled oscillation device illustrated in FIG. 1 may be implemented in a differential form and a single form (or Colpitts form). Hereinafter, with reference to the accompanying drawings, the configuration and operation of each of the embodiments according to the present invention, which implements the multi-band voltage controlled oscillation apparatus shown in FIG. 1 in differential and single forms, will be described as follows.

FIG. 2 is a circuit diagram of a preferred embodiment of the multi-band voltage controlled oscillation apparatus shown in FIG. 1 according to the present invention, in which a negative resistance generator 10A, a capacitive load 22A, an inductive load 24A, and switches are shown. It consists of 26A.

The negative resistance generator 10A shown in FIG. 2 is connected in parallel to the inductive load 24A and the capacitive load 22A, respectively, to generate negative resistance in a complementary differential form. To this end, the negative resistance generating unit 10A may be implemented with first and second PMOS transistors MP1 and MP2, first and second NMOS transistors MN1 and MN2, and a constant current source 52. Here, the first PMOS transistor MP1 has a gate connected to one end 54 of the inductive load 24A, a source and a drain connected between the supply voltage Vdd and the other side of the switches 26A. 2 PMOS transistor MP2 has a gate connected to the other end 56 of inductive load 24A, a source and a drain connected between supply voltage Vdd and one end 54 of inductive load 24A. . At this time, the first NMOS transistor MN1 has a gate connected to one end 54 of the inductive load 24A, a drain and a source connected between the other side of the switches 26A and the constant current source 52, The second NMOS transistor MN2 has a gate connected to the other end 56 of the inductive load 24A, a drain and a source connected between one end of the inductive load 24A and the constant current source 52. Here, the constant current source 52 serves to provide a constant current, for this purpose, between the gate and the source and ground of the first and second NMOS transistors MN1 and MN2 that are connected to a bias signal. It can be implemented with an NMOS transistor MNS1 having a drain and a source connected thereto.

The capacitive load 22A shown in FIG. 2 has a variable capacitance in response to the control voltage Vc. For this purpose, the capacitive load 22A may be implemented with capacitors C1 and C2 connected to each other in series. The inductive load 24A may be implemented as a first inductor 50 having a unit length connected between one end 54 and the other end 56.

Meanwhile, the switches 26A shown in FIG. 2 have one side connected to different positions between one end 54 and the other end 56 of the inductive load 24A, and are connected to the negative resistance generator 10A. Has the other side. At this time, the switches 26A are composed of the first to Mth switches, wherein M is a positive integer of 2 or more. For example, one side of the first switch 40 is connected to the first metal layer of the first inductor 50, and the other side of the first switch 40 is connected to the negative resistance generator 10A. . In addition, one side of the second switch 42 is connected to the second metal layer of the first inductor 50, and the other side of the second switch 42 is connected to the negative resistance generator 10A. Similarly, one side of the Mth switch 44 is connected to the Mth metal layer of the first inductor 50, and the other side of the Mth switch 44 is connected to the negative resistance generator 10A. Through this configuration, each of the first to Mth switches 40, 42,..., And 44 is switched on or off in response to the switching control signal SC. For example, the first switch 40 is switched on or off in response to the switching control signal S ₁ , the second switch 42 is switched on or off in response to the switching control signal S ₂ , The M-th switch 44 is switched on or off in response to the switching control signal S _M. If only one of the first, second, ... and M-1 switches 40, 42, ... is switched on and the other switches are switched off, some inductance of the first inductor 50 is Used. However, if only the Mth switch 44 is switched on and the other switches 40, 42,... Are switched off, the entire inductance of the first inductor 50 is used. As such, the length of the first inductor 50 may be changed by the switching operation of the switches 26A, so that the inductance of the inductive load 24A may be selectively changed.

3 is a circuit diagram of another preferred embodiment of the multi-band voltage controlled oscillation device shown in FIG. 1 according to the present invention, in which the negative resistance generator 10B, the capacitive load 22B, the inductive load 24B, and the switches are shown. It consists of 26B.

The negative resistance generator 10B shown in FIG. 3 is connected in parallel to the capacitive load 22B to generate negative resistance in a single differential form. To this end, the negative resistance generator 10B may be implemented with a constant current source 64, third and fourth NMOS transistors MN3 and MN4. Here, the third NMOS transistor MN3 is a gate connected to one end 76 of the capacitive load 22B, a drain and a source connected between the other end 74 of the capacitive load 22B and the constant current source 64. The fourth NMOS transistor MN4 includes a gate connected to the other end 74 of the capacitive load 22B, a drain connected between one end 76 of the capacitive load 22B and the constant current source 64, and Has a source. Here, the constant current source 64 serves to provide a constant current, for this purpose, between the gate and the source and ground of the third and fourth NMOS transistors MN3 and MN4 connected to the bias signal. It can be implemented with an NMOS transistor MNS2 having a drain and a source connected thereto.

The capacitive load 22B shown in FIG. 3 has a variable capacitance in response to the control voltage Vc. For this purpose, the capacitive load 22B may be implemented with capacitors C3 and C4 connected to each other in series. Inductive load 24B is capacitive load 22B and one side 70 of switch 80 that produces the largest inductance in switches 80, ..., 82 and 84 of some of switches 26B. Of the switch 90 which generates the largest inductance among the switches 90, ..., 92 and 94 of the other of the second inductor 60 and the switches 26B connected between the other ends 74 of It may be implemented as a third inductor 62 connected between one side 72 and one end 76 of the capacitive load 22B.

Meanwhile, some of the switches 80,..., 82, and 84 of some of the switches 26B shown in FIG. 3 are different positions between one end 70 and the other end 74 of the second inductor 60. It has one side connected to and the other side connected to supply voltage Vdd. Similarly, the other switches 90, ..., 92 and 94 have one side connected to different positions between one end 72 and the other end 76 of the third inductor 62 and the supply voltage ( Vdd) is connected to the other side. For example, the switches 26B are M + 1, ..., M + N-1, M + N, M + N + 1, ..., M + 2N-1 and M + 2N (where N is a positive integer of 2 or more) switches 80, ..., 82, 84, 90, ..., 92 and 94. For example, one side of the M + 1 switch 80 is connected to the first metal layer of the second inductor 60, and the other side of the M + 1 switch 80 is connected to the supply voltage Vdd. In addition, one side of the M + N-1 switch 82 is connected to the N-1 metal layer of the second inductor 60, and the other side of the M + N-1 switch 82 is connected to the supply voltage Vdd. Connected. Similarly, one side of the M + N switch 84 is connected to the Nth metal layer of the second inductor 60, and the other side of the M + N switch 84 is connected to the supply voltage Vdd. One side of the M + N + 1 switch 90 is connected to the first metal layer of the third inductor 62, and the other side of the M + N + 1 switch 90 is connected to the supply voltage Vdd. In addition, one side of the M + 2N-1 switch 92 is connected to the N-1 metal layer of the third inductor 62, and the other side of the M + 2N-1 switch 92 is connected to the supply voltage Vdd. Connected. Similarly, one side of the M + 2N switch 94 is connected to the Nth metal layer of the third inductor 62 and the other side of the M + 2N switch 94 is connected to the supply voltage Vdd.

Through this configuration, each of the M + 1 to M + 2N switches 80, ..., 82, 84, 90, ..., 92, and 94 switches in response to the switching control signal SC. On or off. For example, each of the M + 1 and M + N + 1 switches 80 and 90 is switched on or off in response to the switching control signal S _{M + 1} , and M + N-1 and M Each of the + 2N-1 switches 82 and 92 is switched on or off in response to the switching control signal S _{M + N-1} , and each of the M + N and M + 2N switches 84 and 94, respectively. Is switched on or off in response to the switching control signal S _{M + N.}

If only one of the M + 2, ... and M + N switches (..., 82 and 84) is switched on and the M + 1 switch 80 and the other switches are switched off, the second inductor ( Although some inductance of 60 is used, the entire inductance of the second inductor 60 is used if only the M + 1 switch 80 is switched on and the other switches (..., 82 and 84) are switched off. Similarly, only one of the M + N + 2, ... and M + 2N switches (..., 92 and 94) is switched on and the M + N + 1 switch 90 and the other switches are switched off. If some inductance of the third inductor 62 is used, only the M + N + 1 switch 90 is switched on and the other switches (.., 92 and 94) are switched off. The entire inductance is used. As such, the lengths of the second and third inductors 60 and 62 may be changed by the switching operation of the switches 26B, thereby changing the inductance of the inductive load 24B.

FIG. 4 is a circuit diagram of another preferred embodiment of the multi-band voltage controlled oscillation device shown in FIG. 1 according to the present invention, which includes a negative resistance generating portion 10C, a capacitive load 22C, an inductive load 24C, and a switch. It consists of 26C.

The negative resistance generator 10C shown in FIG. 4 is connected to one side of the switches 26C to generate negative resistance in a single differential form. To this end, the negative resistance generator 10C may be implemented with a constant current source 124, third and fourth PMOS transistors MP3 and MP4. Here, the third PMOS transistor MP3 includes a gate, a constant current source 124, and switches 26C connected to one side 132 of some switches 160,..., 162, and 164 of the switches 26C. ) Has a source and a drain connected between one side 130 of the other switch (140, ..., 142 and 144), the fourth PMOS transistor (MP4) is the other switch (140, ..., A gate connected to one side 130 of 142 and 144, a source and a drain connected between a constant current source 124 and one side 132 of some switches 160,..., 162 and 164. Here, the constant current source 124 serves to provide a constant current, for this purpose, the gate connected to the bias signal (bias) signal, the supply voltage (Vdd) and the third and fourth PMOS transistors (MP3 and MP4) It can be implemented as a PMOS transistor (MPS1) having a source and a drain connected between the source of.

The capacitive load 22C shown in FIG. 4 has a variable capacitance in response to the control voltage Vc. For this purpose, the capacitive load 22C may be implemented with capacitors C5 and C6 connected to each other in series. Inductive load 24C has the same configuration as inductive load 24B shown in FIG. 3 and performs the same operation. For example, the inductive load 24C shown in FIG. 4 is a switch 140 that produces the largest inductance of one end 126 of the capacitive load 22C and the other switches 140,..., 142, and 144. The other end 128 of the fourth inductor 110 and the capacitive load 22C and the largest inductance of some switches 160,..., 162 and 164 connected between the other side 120 It may be implemented as a fifth inductor 112 connected between the other side 122 of the switch 160.

The first, second, third, fourth, or fifth inductor 50, 60, 62, 110, or 112 described above may be embodied in a rectangular spiral shape as shown in FIG. 2, 3, or 4. Unlike FIG. 2, FIG. 3, or FIG. 4, it may be implemented in a spiral shape such as a circle, a pentagon, or an octagon.

Meanwhile, the other switches 140,..., 142, and 144 shown in FIG. 4 have one side 130 connected to the negative resistance generating unit 10C, and one end 120 of the fourth inductor 110. And the other end connected to different positions between the other end 126. In addition, some switches 160,..., 162, and 164 have one side 132 connected to the negative resistance generator 10C, and one end 122 and the other end 128 of the fifth inductor 112. It has the other side connected to different positions in between. For example, the switches 26C are M + 2N + 1, ..., M + 2N + P-1, M + 2N + P, M + 2N + P + 1, ..., Mth + 2N + 2P-1 and M + 2N + 2P (where P is a positive integer of 2 or more) switches 140, ..., 142, 144, 160, ..., 162 and 164 . For example, one side 130 of the M + 2N + 1 switch 140 is connected to the negative resistance generator 10C, and the other side of the M + 2N + 1 switch 140 is the fourth inductor 110. Is connected to the first metal layer. In addition, one side 130 of the M + 2N + P-1 switch 142 is connected to the negative resistance generating unit 10C, and the other side of the M + 2N + P-1 switch 142 is the fourth inductor ( And the P-1 metal layer of 110). Similarly, one side 130 of the M + 2N + P switch 144 is connected to the negative resistance generator 10C, and the other side of the M + 2N + P switch 144 is connected to the fourth inductor 110. It is connected with the P metal layer. One side 132 of the M + 2N + P + 1 switch 160 is connected to the negative resistance generator 10C, and the other side of the M + 2N + P + 1 switch 160 is the fifth inductor 112. Is connected to the first metal layer. In addition, one side 132 of the M + 2N + 2P-1 switch 162 is connected to the negative resistance generating unit 10C, and the other side of the M + 2N + 2P-1 switch 162 is the fifth inductor ( 112). Similarly, one side 132 of the M + 2N + 2P switch 164 is connected to the negative resistance generator 10C, and the other side of the M + 2N + 2P switch 164 is connected to the fifth inductor 112. It is connected with the P metal layer.

Through this configuration, each of the M + 2N + 1 to M + 2N + 2P switches 140,..., 142, 144, 160,... It is switched on or off in response. For example, each of the M + 2N + 1 and M + 2N + P + 1 switches 140 and 160 is switched on or off in response to a switching control signal S _{M + 2N + 1} , and the _{M + th N} + Each of the 2N + P-1 and M + 2N + 2P-1 switches 142 and 162 is switched on or off in response to the switching control signal S _{M + 2N + P-1} , and M + 2N + P And the M + 2N + 2P switches 144 and 164 are switched on or off in response to the switching control signal S _{M + 2N + P.}

If only one of the M + 2N + 2, ... and M + 2N + P switches (..., 142 and 144) is switched on and the M + 2N + 1 switch 140 and the other switches are switched on Some inductance of the fourth inductor 110 is used if off, but the fourth inductor 110 if only the M + 2N + 1 switch 140 is switched on and the other switches (..., 142 and 144) are switched off. The total inductance of) is used. Similarly, only one of the M + 2N + P + 2, ... and M + 2N + 2P switches (..., 162 and 164) is switched on and the M + 2N + P + 1 switch 160 And some other inductance of the fifth inductor 112 is used if it is switched off, but only the M + 2N + P + 1 switch 160 is switched on and the other switches (.. 162 and 164) are switched off. If so, the entire inductance of the fifth inductor 112 is used. As such, the lengths of the fourth and fifth inductors 110 and 112 may be equally changed by the switching operation of the switches 26C, thereby changing the inductance of the inductive load 24C.

As a result, the inductive loads 24A, 24B or 24C and the capacitive loads 22A, 22B or 22C cause resonance in response to the negative resistance generated from the negative resistance generators 10A, 10B or 10C. At this time, the resonant frequency changes as the inductance of the inductive load 24A, 24B or 24C is changed by the switching operation, and the oscillation signal having the variable resonant frequency is output terminal OUT1 or OUT2 [or (OUT3 or OUT4). Or (OUT5 or OUT6)]. Here, the multiband voltage controlled oscillators shown in FIGS. 2, 3 and 4 are respectively complementary MOS (CMOS) differential type, single N-type MOS (NMOS) differential type and single P-type MOS (PMOS) differential type. Generate an oscillation signal. At this time, if the maximum inductance of the first inductor 50 in the CMOS differential type voltage controlled oscillator shown in FIG. 2 is L, the voltage controlled oscillation of the N type or P type MOS differential type shown in FIG. The maximum inductance of the second or third inductor 60 or 62 (or the fourth or fifth inductor 110 or 112) in the device is L / 2.

FIG. 5 is a circuit diagram of yet another embodiment according to the present invention of the apparatus shown in FIG. 1, comprising a negative resistance generating portion 10D, a capacitive load 22D, an inductive load 24D, and switches 26D. do.

The switches 26D shown in FIG. 5 have one side connected to different positions between one end and the other end of the inductive load 24D, and the other side connected to the negative resistance generator 10D. At this time, the negative resistance generator 10D includes a resistor R1 connected between the other side of the switches 26D and the ground and a resistor R2 connected between the other side of the switches 26D and the supply voltage Vdd. A transistor having a resistor R3 having one side connected to the supply voltage Vdd, a base connected to the other side of the switches 26D, and a collector and emitter connected between the other side of the resistor R3 and ground ( Q1) and the capacitor C7 connected between the collector of the transistor Q1 and the output terminal OUT7. Here, the capacitor C7 serves to block the DC component.

The inductive load 24D and the capacitive load 22D cause resonance in response to the negative resistance generated from the negative resistance generator 10D having the above-described configuration. At this time, the resonant frequency may change as the inductance of the inductive load 22D is changed by the switching operation of the switches 26D, and an oscillation signal having the variable resonant frequency is output through the output terminal OUT7. As such, the device shown in FIG. 5 generates an oscillation signal in a single form.

Meanwhile, each of the switches 26A, 26B, 26C, and 26D illustrated in FIGS. 2, 3, 4, and 5 may be a metal oxide semiconductor (MOS) switch, a pin diode switch, or the like. It can be implemented as a micro electromechanical system (MEMS) switch. At this time, each switch is a CMOS single-chip high-frequency integrated circuit (MMIC) in the case of a MOS switch, and becomes a MMIC by bipolar CMOS (BiCMOS) technology in the case of a pin diode switch. It may be off chip. In addition, according to the present invention, each of the embodiments of the multi-band voltage controlled oscillation apparatus according to the present invention described above may be implemented as a single chip.

Hereinafter, a voltage controlled oscillation method according to the present invention performed in the multi-band voltage controlled oscillation apparatus shown in FIG. 1 will be described with reference to the accompanying drawings.

FIG. 6 is a flowchart for explaining a voltage controlled oscillation method according to the present invention performed in the apparatus shown in FIG. 1, in which the capacitance and inductance are adjusted (step 200) and the negative resistance is used in the present invention. Resonating the voltage controlled oscillation device (step 202).

The voltage controlled oscillation apparatus according to the present invention described above adjusts the capacitance of the capacitive loads 22, 22A, 22B, 22C or 22D using the control voltage Vc supplied from the outside, and switches 26, 26A, Selectively switching on 26B, 26C or 26D to adjust the inductance of inductive load 24, 24A, 24B, 24C or 24D (step 200).

After the 200th step, the capacitive load 22, 22A, 22B, 22C or 22D and the inductive load 24, 24A, 24B, 24C or 24D are connected to the negative resistance generator 10, 10A, 10B, 10C or 10D. Resonance with the capacitance and inductance adjusted using the negative resistance generated from the step S202.

As described above, the multi-band voltage controlled oscillation apparatus and method according to the present invention is to change the inductance length of the inductive load required to generate the oscillation signal having a resonant frequency which can be varied by at least two or more. This can be achieved by selectively adjusting by switching operation, which requires only one inductor in the differential form or two inductors in the single form, thereby reducing area, volume and power consumption.

Claims (13)

A negative resistance generator for generating a negative resistance; And A resonator which resonates in response to the negative resistance with a variable capacitance in response to a control voltage input from the outside and a switching operation in response to a switching control signal input from the outside; The resonator unit A capacitive load having the capacitance that varies in response to the control voltage; At least two switches; And Having an inductive load connected to said capacitive load, And said inductance of said inductive load is varied by said switching operation of said switches. The negative resistance generator of claim 1, wherein the negative resistance generator is connected in parallel with the inductive load and the capacitive load to generate the negative resistance in a complementary differential form. And the switches have one side connected to different positions between one end and the other end of the inductive load, and the other side connected to the negative resistance generator. The method of claim 2, wherein the negative resistance generating unit Constant current source; A first PMOS transistor having a gate connected to one end of the inductive load, a source and a drain connected between a supply voltage and the other side of the switches; A second PMOS transistor having a gate connected to the other end of the inductive load, a source and a drain connected between the supply voltage and one end of the inductive load; A first NMOS transistor having a gate connected to one end of the inductive load, a drain and a source connected between the other side of the switches and the constant current source; And A second NMOS transistor having a gate connected to the other end of the inductive load, a drain and a source connected between one end of the inductive load and the constant current source, And the inductive load has a first inductor having a unit length connected between the one end and the other end. The method of claim 1, wherein the negative resistance generator is connected in parallel to the capacitive load to generate the negative resistance in a single differential form, And the switches have one side connected to different positions between one end and the other end of the inductive load and the other side connected to a supply voltage. The method of claim 4, wherein the negative resistance generating unit Constant current source; A third NMOS transistor having a gate connected to one end of the capacitive load, a drain and a source connected between the other end of the capacitive load and the constant current source; And And a fourth NMOS transistor having a gate connected to the other end of the capacitive load, a drain and a source connected between one end of the capacitive load and the constant current source. The method of claim 5, wherein the inductive load A second inductor coupled between one side of the switch and the other end of the capacitive load that produces the largest inductance in some of the switches; And And a third inductor connected between one end of the switch and one end of the capacitive load, which produces the largest inductance in the other switches of the switches. The method of claim 1, wherein the negative resistance generator is connected to one side of the switch to generate the negative resistance in a single differential form, And the switches have one side connected to the negative resistance generator, and the other side connected to different positions between one end and the other end of the inductive load. The method of claim 7, wherein the negative resistance generating unit Constant current source; A third PMOS transistor having a gate connected to one side of some switches of the switches, a source and a drain connected between the constant current source and one side of the other switches; And And a fourth PMOS transistor having a gate connected to one side of the other switches, a source and a drain connected between the constant current source and the one side of the some switches. The multi-band voltage controlled oscillator of claim 1, wherein the switches have one side connected to different positions between one end and the other end of the inductive load, and the other side connected to the negative resistance generator. . The multi-band voltage controlled oscillator of claim 1, wherein each of the switches corresponds to a metal oxide semiconductor (MOS) switch. The multiband voltage controlled oscillator of claim 1, wherein each of the switches corresponds to a pin diode switch. 2. The multiband voltage controlled oscillation device of claim 1, wherein each of the switches corresponds to a microelectromechanical system (MEMS) switch. In the voltage controlled oscillation method performed in the multi-band voltage controlled oscillation apparatus of claim 1, Adjusting the capacitance using the control voltage, and selectively turning on the switches to adjust the inductance; And And resonating the voltage controlled oscillation device with the adjusted capacitance and inductance using the negative resistance.

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