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KR100266018B1 - Semiconductor element isolation method - Google Patents

Semiconductor element isolation method Download PDF

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KR100266018B1
KR100266018B1 KR1019970066611A KR19970066611A KR100266018B1 KR 100266018 B1 KR100266018 B1 KR 100266018B1 KR 1019970066611 A KR1019970066611 A KR 1019970066611A KR 19970066611 A KR19970066611 A KR 19970066611A KR 100266018 B1 KR100266018 B1 KR 100266018B1
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semiconductor substrate
layer
mask layer
oxidation
mask
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KR1019970066611A
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Korean (ko)
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KR19990048010A (en
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김재영
이현우
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김영환
현대반도체주식회사
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
    • H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE: A method for isolating a semiconductor device is to prevent the formation of the bird's beak by implanting nitrogen ions into the lower part of a mask layer on a semiconductor substrate. CONSTITUTION: A buffer oxide layer is formed on a semiconductor substrate(21). A mask layer is formed on the buffer oxide layer to expose a field region of the semiconductor substrate. After coating and exposing a photoresist on the mask layer, the mask layer and the buffer oxide layer are patterned to expose the semiconductor substrate, using the photoresist as a mask. The first doping layer is formed by ion-implanting an oxidation promoting material into the exposed part of the semiconductor substrate at a predetermined slope angle, using the photoresist as a mask. The second doping layer is formed by ion-implanting an oxidation suppressing material into the exposed part of the semiconductor substrate, using the photoresist as a mask. After removing the photoresist, a field oxide layer(31) is formed on the exposed part of the semiconductor substrate.

Description

반도체장치의 소자격리방법Device isolation method of semiconductor device

본 발명은 반도체장치의 소자격리방법에 관한 것으로서, 특히, 버즈빅(bird's beak)을 감소시킬 수 있는 반도체장치의 소자격리방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device isolation method for a semiconductor device, and more particularly, to a device isolation method for a semiconductor device capable of reducing bird's beak.

반도체장치의 집적화가 거듭되면서 반도체장치의 상당한 면적을 점유하는 소자격리영역을 줄이기 위한 기술 개발이 활발히 진행되고 있다.As the integration of semiconductor devices continues, technology development for reducing the device isolation region occupying a considerable area of the semiconductor device is actively progressing.

일반적으로 반도체장치는 LOCOS(Local Oxidation of Silicon) 방법으로 소자를 격리하였다. LOCOS 방법은 활성영역을 한정하는 산화마스크인 질화막과 반도체기판의 열적 특성이 다르기 때문에 발생하는 스트레스를 해소하기 위하여 질화막과 반도체기판 사이에 박막의 버퍼산화막(buffer oxide)을 형성하고 산화시켜 소자격리영역으로 이용되는 필드산화막를 형성한다.In general, semiconductor devices have isolated devices by LOCOS (Local Oxidation of Silicon) method. In the LOCOS method, a thin film buffer oxide is formed between the nitride film and the semiconductor substrate and oxidized to eliminate stress caused by the thermal characteristics of the nitride film and the semiconductor substrate, which are the oxide masks that define the active region. A field oxide film to be used is formed.

도 1a 내지 도 1c는 종래 기술에 따른 소자격리방법을 도시하는 공정도이다.1A to 1C are process diagrams illustrating a device isolation method according to the prior art.

도 1a를 참조하면, 반도체기판(11) 상에 열산화 방법으로 버퍼산화막(13)을 형성하고, 이 버퍼산화막(13) 상에 화학기상증착(Chemical Vapor Deposition : 이하, CVD라 칭함) 방법으로 질화실리콘을 증착하여 마스크층(15)을 형성한다. 그리고, 포토리쏘그래피(photolithography) 방법으로 반도체기판(11)이 노출되도록 마스크층(15) 및 버퍼산화막(13)을 선택적으로 제거하여 소자격리영역과 활성영역을 한정한다.Referring to FIG. 1A, a buffer oxide film 13 is formed on a semiconductor substrate 11 by a thermal oxidation method, and chemical vapor deposition (hereinafter referred to as CVD) is performed on the buffer oxide film 13. Silicon nitride is deposited to form a mask layer 15. The device isolation region and the active region are defined by selectively removing the mask layer 15 and the buffer oxide layer 13 so that the semiconductor substrate 11 is exposed by photolithography.

도 1b를 참조하면, 반도체기판(11)의 노출된 소자격리영역을 산화하여 소정 두께의 필드산화막(17)을 형성한다. 이 때, 반도체기판(11)의 활성영역은 마스크층(15)에 의해 산화되지 않는다.Referring to FIG. 1B, the exposed device isolation region of the semiconductor substrate 11 is oxidized to form a field oxide film 17 having a predetermined thickness. At this time, the active region of the semiconductor substrate 11 is not oxidized by the mask layer 15.

도 1c를 참조하면, 마스크층(15) 및 버퍼산화막(13)을 반도체기판(11)의 활성영역이 노출되도록 순차적으로 습식식각하여 제거한다.Referring to FIG. 1C, the mask layer 15 and the buffer oxide layer 13 are sequentially wet-etched to expose the active region of the semiconductor substrate 11.

그러나, 상술한 종래의 반도체장치의 소자격리방법은 필드산화막 형성시 마스크층 하부에도 산화되어 버즈빅이 형성되는 문제점이 있었다.However, the device isolation method of the conventional semiconductor device described above has a problem in that when the field oxide film is formed, it is oxidized under the mask layer to form buzz big.

따라서, 본 발명의 목적은 버즈빅의 형성을 억제할 수 있는 반도체장치의 소자격리방법을 제공함에 있다.Accordingly, an object of the present invention is to provide a method for isolating a device of a semiconductor device capable of suppressing the formation of buzz big.

상기 목적을 달성하기 위해 본 발명에 따른 반도체장치의 소자격리방법은 반도체기판 상의 소정 부분을 노출시키는 마스크층을 형성하는 공정과, 상기 반도체기판의 노출된 부분에 산화억제 물질을 소정 경사각으로 이온 주입하여 산화억제 도핑층을 형성하는 공정과, 상기 반도체기판의 노출된 부분에 필드산화막을 형성하는 공정과, 상기 마스크층을 제거하는 공정을 구비한다.In order to achieve the above object, a device isolation method of a semiconductor device according to the present invention comprises the steps of forming a mask layer exposing a predetermined portion on a semiconductor substrate, and ion implanting an oxide inhibitor into the exposed portion of the semiconductor substrate at a predetermined inclination angle. To form an oxide doping layer, to form a field oxide film on an exposed portion of the semiconductor substrate, and to remove the mask layer.

도 1a 내지 도 1c는 종래 기술에 따른 반도체장치의 소자격리방법을 도시하는 공정도1A to 1C are process diagrams illustrating a device isolation method of a semiconductor device according to the prior art.

도 2a 내지 도 2d는 본 발명에 따른 반도체장치의 소자격리방법을 도시하는 공정도2A to 2D are process diagrams showing a device isolation method for a semiconductor device according to the present invention.

이하, 첨부한 도면을 참조하여 본 발명을 상세히 설명한다.Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

도 2a 내지 도 2d는 본 발명에 따른 반도체장치의 소자격리방법을 도시하는 공정도이다.2A to 2D are process charts showing the device isolation method of the semiconductor device according to the present invention.

도 2a를 참조하면, 반도체기판(21) 상에 열산화 방법에 의해 버퍼산화막(23)을 형성하고, 이 버퍼산화막(23) 상에 CVD방법에 의해 질화실리콘을 증착하여 마스크층(25)을 형성한다. 그리고, 마스크층(25) 상에 포토레지스트(26)를 도포하고 노광 및 현상한 후 이 포토레지스트(26)를 마스크로 사용하여 마스크층(25) 및 제 1 버퍼산화막(23)을 반도체기판(21)이 노출되도록 패터닝한다.Referring to FIG. 2A, a buffer oxide film 23 is formed on a semiconductor substrate 21 by a thermal oxidation method, and silicon nitride is deposited on the buffer oxide film 23 by a CVD method to form a mask layer 25. Form. After the photoresist 26 is coated on the mask layer 25, exposed and developed, the photoresist 26 is used as a mask, and the mask layer 25 and the first buffer oxide film 23 are formed on a semiconductor substrate ( 21) to be exposed.

그리고, 포토레지스트(26)를 마스크로 사용하여 반도체기판(21)의 노출된 부분에 산화를 촉진하는 물질, 예를 들면, 불소(F)를 30∼40KeV 정도의 에너지와 1013∼1014/㎠ 정도의 도우즈로 이온 주입하여 제 1 도핑층(27)을 형성한다.Then, the photoresist 26 is used as a mask to promote oxidation of the exposed portion of the semiconductor substrate 21, for example, fluorine (F) with energy of about 30 to 40 KeV and 10 13 to 10 14 /. The first doped layer 27 is formed by ion implantation with a dose of about cm 2.

도 2b를 참조하면, 포토레지스트(26)를 마스크로 사용하여 반도체기판(21)의 노출된 부분에 산화를 억제하는 물질, 예를 들면, 질소(N)를 이온 주입하여 제 2 도핑층(29)을 형성한다. 상기에서 제 2 도핑층(29)은 질소(N)를 30∼40KeV 정도의 에너지와 1013∼1014/㎠ 정도의 도우즈로 15∼45°의 경사각을 갖고 이온 주입하여 제 2 도핑층(29)을 형성한다.Referring to FIG. 2B, the second doped layer 29 is ion-implanted by using a photoresist 26 as a mask and ion-implanted with a substance that inhibits oxidation, for example, nitrogen (N), in an exposed portion of the semiconductor substrate 21. ). The second doped layer 29 is ion-implanted with nitrogen (N) at an inclination angle of 15 to 45 ° with an energy of about 30 to 40 KeV and a dose of about 10 13 to 10 14 / cm 2. 29).

도 2c를 참조하면, 포토레지스트(26)을 제거한다. 그리고, 반도체기판(21)의 노출된 부분에 필드산화막(31)을 형성한다. 상기에서 반도체기판(21)의 제 1 도핑층(27)이 형성된 부분은 산화를 촉진하는 불소(F)에 의해 산화 속도가 빠르며, 제 2 도핑층(29)이 형성된 부분, 즉, 마스크층(25)의 모서리 부분은 산화를 억제하는 질소에 의해 산화속도가 느리게 된다. 그러므로, 필드산화막(31)은 마스크층(25)의 하부로 성장이 억제되므로 버즈 빅이 형성되는 것을 방지할 수 있다.Referring to FIG. 2C, the photoresist 26 is removed. The field oxide film 31 is formed on the exposed portion of the semiconductor substrate 21. The portion of the semiconductor substrate 21 in which the first doped layer 27 is formed has a high oxidation rate due to fluorine (F) that promotes oxidation, and the portion in which the second doped layer 29 is formed, that is, the mask layer ( 25) the oxidation rate is slowed down by the oxidation inhibiting nitrogen. Therefore, since the growth of the field oxide film 31 is suppressed under the mask layer 25, it is possible to prevent the formation of the buzz big.

도 2d를 참조하면, 마스크층(25)을 인산 등의 식각 용액으로 제거한 후 버퍼산화막(23)을 불산 등의 식각 용액으로 제거하여 반도체기판(21)의 활성영역을 노출시킨다.Referring to FIG. 2D, the mask layer 25 is removed with an etching solution such as phosphoric acid, and then the buffer oxide film 23 is removed with an etching solution such as hydrofluoric acid to expose the active region of the semiconductor substrate 21.

따라서, 본 발명은 반도체기판의 마스크층 모서리의 하부에 질소를 주입하여 필드산화막 형성시 수평 방향으로 성장되는 것을 억제하여 버즈 빅의 형성을 억제할 수 있는 잇점이 있다.Accordingly, the present invention has the advantage of suppressing the formation of the buzz big by injecting nitrogen into the lower portion of the mask layer edge of the semiconductor substrate to suppress the growth in the horizontal direction when forming the field oxide film.

Claims (5)

반도체기판 상의 필드영역을 노출시키는 마스크층을 형성하는 공정과,Forming a mask layer exposing the field region on the semiconductor substrate; 상기 마스크층을 이용하여 상기 반도체기판의 노출된 부분에 산화억제 물질을 소정 경사각으로 이온 주입함으로써 상기 마스크층 가장자리 하부까지 도핑된 산화억제 도핑층을 형성하는 공정과,Forming an oxide doped layer doped to the edge of the mask layer by ion implanting an oxidation inhibitor into an exposed portion of the semiconductor substrate at a predetermined inclination angle using the mask layer; 상기 반도체기판의 노출된 부분을 산화시키어 필드산화막을 형성하는 공정과,Oxidizing the exposed portion of the semiconductor substrate to form a field oxide film; 상기 마스크층을 제거하는 공정을 구비하는 반도체장치의 소자격리방법,A device isolating method of a semiconductor device comprising the step of removing said mask layer, 반도체기판 상의 소정 부분을 노출시키는 노출시키는 마스크층을 형성하는 공정과,Forming a mask layer that exposes a predetermined portion on the semiconductor substrate, the mask layer being exposed; 상기 마스크층을 이용하여 상기 반도체기판의 노출된 부분에 산화억제 물질을 소정 정사각으로 이온 주입함으로써 산화억제 도핑층을 형성하는 공정과,Forming an oxide doping layer by ion implanting an oxidation inhibiting material into a predetermined square on the exposed portion of the semiconductor substrate using the mask layer; 상기 반도체기판의 노출된 부분에 필드산화막을 형성하는 공정과,Forming a field oxide film on the exposed portion of the semiconductor substrate; 상기 마스크층을 제거하는 공정을 구비하는 반도체장치의 소자격리방법.A device isolation method for a semiconductor device, comprising the step of removing the mask layer. 청구항 1에 있어서The method according to claim 1 상기 산화억제 도핑층을 형성하는 공정 이전에 상기 반도체기판의 노출된 부분에 산화를 촉진하는 물질을 이온 주입하여 산화촉진 도핑층을 형성하는 공정을 더 구비하는 반도체장치의 소자격리방법.And ion-implanting a material for promoting oxidation in the exposed portion of the semiconductor substrate before the step of forming the oxidation inhibiting doping layer to form an oxidation promoting doping layer. 청구항 2에 있어서 상기 산화촉진 도핑층을 불소(F)를 30∼40KeV의 에너지와 1013∼1014/㎠ 의 도우즈로 이온 주입하여 형성하는 반도체장치의 소자격리방법.The method of claim 2, wherein the oxidation-promoting doped layer is formed by ion implanting fluorine (F) with energy of 30 to 40 KeV and doses of 10 13 to 10 14 / cm 2. 청구항 1에 있어서The method according to claim 1 상기 산화억제 도핑층을 질소(N)를 30∼40KeV의 에너지와 1013∼1014/㎠ 정도의 도우즈로 이온 주입하여 형성하는 반도체장치의 소자격리방법.A method for isolating a semiconductor device, wherein the oxidation-doped doping layer is formed by ion implanting nitrogen (N) with energy of 30 to 40 KeV and a dose of about 10 13 to 10 14 / cm 2. 청구항 1에 있어서 상기 산화억제 도핑층을 15∼45°의 경사각을 갖고 이온 주입하여 형성하는 반도체장치의 소자격리방법.The method of claim 1, wherein the oxide doping layer is formed by ion implantation having an inclination angle of 15 to 45 °.
KR1019970066611A 1997-12-08 1997-12-08 Semiconductor element isolation method KR100266018B1 (en)

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