KR100257711B1 - Method for fabricating a semiconductor device - Google Patents

Abstract

PURPOSE: A manufacturing method of a semiconductor element is provided to improve the process yield and reliability of the element by stabilizing bit line of the semiconductor element. CONSTITUTION: An insulating film is formed on a semiconductor plate. A storage electrode contact is formed by removing a determined part of the insulating film. A storage electrode contact plug is formed by filling the storage electrode contact hole. A bit line contact plug is formed inside the bit line contact hole at a lower level than the storage electrode contact plug. The storage electrode contact plug is exposed by removing part of the insulating film. An insulation spacer is formed at the side wall of the exposed storage electrode contact plug. A conduction film for bit line is formed on the entire surface. The surface of this semiconductor plate is flattened by etching, for the conduction film to be separated to form bit lines.

Description

Manufacturing method of semiconductor device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device. In particular, in a semiconductor memory cell manufacturing process, after forming a storage electrode contact plug, the bit line contact and the bit line have a storage electrode contact and misalignment margin, and at the same time, sufficiently secure the area of the plug. The present invention relates to a method for forming a bit line of a semiconductor device in which an electrode can be formed.

In general, as the integration of semiconductor devices proceeds, the area of the memory cell is gradually reduced, and the distance between various contacts, lines, and storage electrodes in the memory cell becomes narrow or disappears.

Thus, a process has been introduced in which insulation and connection between these cell components are self-aligned regardless of the area reduction of the memory cell.

Up to now, the trend has been that the process has been mainly used between the gate conductors and the contacts in their periphery, but in the future it is expected that the insulation and area between the bit line and the storage electrode will be of concern.

Accordingly, the present invention has been devised to solve the above-mentioned problems. In the semiconductor memory cell manufacturing process, the bit line contact and the bit line are plugged with the storage electrode contact and misalignment margin after the storage electrode contact plug is formed. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for forming a bit line of a semiconductor device in which a storage electrode can be formed by sufficiently securing an area of s.

1A to 1L are cross-sectional views illustrating a method of forming a storage electrode contact plug and a bit line contact plug in a semiconductor device according to the present invention;

2A to 2D are cross-sectional views of a method of forming a storage electrode in a semiconductor device according to the present invention;

3A to 3D are cross-sectional views of another method of forming a storage electrode in a semiconductor device according to the present invention;

4A to 4J are cross-sectional views illustrating a method of forming a bit line in a semiconductor device according to the present invention.

<Description of Symbols for Major Parts of Drawings>

1 semiconductor substrate 2 first insulating film

3: first sacrificial film 4: first photosensitive film pattern

5: first conductive layer 6: second sacrificial film

7: second photosensitive film pattern 8: second conductive layer

9: third photosensitive film pattern 10: second insulating film

11: third conductive layer 12: metal wiring layer

13: 3rd insulating film 14: 4th photosensitive film pattern

15: third sacrificial film 16: fifth photosensitive film pattern

17: fourth conductive layer 18: fifth conductive layer

19: fourth sacrificial film 20: sixth photosensitive film pattern

21: sixth conductive layer

In the present invention for achieving the above object, in the manufacturing method of a semiconductor device,

Forming an insulating film on the semiconductor substrate;

Forming a storage electrode contact by removing a portion of the insulating layer defined as the storage electrode contact;

Forming a storage electrode contact plug filling the storage electrode contact hole;

Forming a bit line contact hole between the storage electrode contact holes;

Forming a bit line contact plug in the bit line contact hole but having a lower height than the storage electrode contact plug;

Exposing the storage electrode contact plug by removing an insulating layer of the high portion of the storage electrode contact plug;

Forming an insulating spacer on sidewalls of the exposed storage electrode contact plugs;

Forming a conductive layer for bit lines on the entire surface of the structure;

Etching and planarizing the surface of the semiconductor substrate having the structure, wherein the conductive layers are separated from each other to form a bit line.

In addition, another aspect of the present invention, the process of forming the separated bit line by the above process,

Forming a sacrificial layer pattern exposing an upper portion of the storage electrode contact plug on the structure;

Forming a first insulating film pattern exposing the storage electrode contact plug and a portion of the sacrificial film pattern adjacent thereto;

Applying a conductive layer to the entire surface of the structure to make contact with the storage electrode contact plug;

And removing and separating the conductive layer on the first insulating layer pattern to form a storage electrode.

Another feature of the invention is the process of forming a bit line separated in the first step,

Forming a sacrificial layer pattern exposing an upper portion of the storage electrode contact plug on the structure;

Forming a first conductive layer on the entire surface of the structure to be in contact with the storage electrode contact plug;

Forming a first insulating film pattern exposing the first conductive layer on the bit line;

Applying a second conductive layer to the entire surface of the structure to make contact with the first conductive layer;

And removing the second conductive layer on the first insulating layer pattern and the second and first conductive layers on the bit line to form a storage electrode.

Another feature of the present invention is that the bit line contact plug and the storage electrode contact plug are formed together in the first step, and then the same step is performed.

Hereinafter, a method of manufacturing a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

1A to 1L illustrate an example in which a storage electrode contact plug and a bit line contact plug are formed in a manufacturing process of a semiconductor device according to the present invention, but the bit line contact plug is formed lower than the storage electrode contact.

First, the first insulating film 2 and the first sacrificial film 3, which are interlayer insulating films, are sequentially deposited on the semiconductor substrate 1, and then stored for lithography on the first sacrificial film 3. A first photoresist layer pattern 4 for forming an electrode contact is formed, and the first sacrificial layer 3 and the first insulating layer 2 are sequentially etched using the first photoresist layer pattern 4 to form storage electrode contact holes. To form. (FIG. 1A).

After removing the first photoresist pattern 4, a first conductive layer 5, for example, a doped polysilicon layer, is formed on the entire surface of the structure to fill the inside of the contact hole. (FIG. 1B).

Thereafter, the first conductive layer 5 and the first sacrificial layer 3 on the first insulating layer 2 are etched to form a storage electrode contact plug having a pattern of the first conductive layer 5 and thereon again. 2 the sacrificial film 6 is formed. (FIG. 1C).

Next, a second photoresist pattern 7 is formed on the second sacrificial layer 6 to form bit line contact holes between the storage electrode contact holes (FIG. 1D), and the second photoresist pattern ( 7) sequentially etching the second sacrificial layer 6 and the first insulating layer 2 to form a bit line contact hole, and then forming the second conductive layer 8 on the entire surface of the structure. For example, a doped polysilicon layer is deposited to fill the inside of the contact hole. (FIG. 1E).

Thereafter, the second conductive layer 8 is etched into the bit line contact hole to form a second conductive layer 87 pattern, which is a bit line contact plug having a lower height than the storage electrode contact plug. (FIG. 1F).

Next, the second sacrificial layer 6 is removed, and a third photoresist layer pattern 9 is formed on the storage electrode contact plug, and the first insulating layer 2 is formed on the second conductive layer 8. After etching to the same depth (FIG. 1G), the third photoresist pattern 9 is removed and a second insulating film 10 is deposited over the entire structure. (FIG. 1H).

Thereafter, the second insulating film 10 is entirely etched to form a pattern of the second insulating film 10 in which the second insulating film 10 is left in the form of a spacer in the plug portion of the storage electrode contact (FIG. 1I). A third conductive layer 11 and a metallic wiring layer 12 made of a doped polycrystalline silicon layer for forming a bit line are deposited on the entire surface of the substrate. (FIG. 1J).

Then, the metallization layer 12 and the third conductive layer 11 are etched by CMP method so that the bit lines are separated from each other, and then the insulation of the wiring layer 12 and the storage electrode is formed on the entire surface of the structure. A third insulating film 13 is deposited and a fourth photoresist pattern 14 is formed to form a storage electrode contact. (FIG. 1K).

Thereafter, the third insulating layer 13 is etched using the fourth photoresist pattern 14 to expose the storage electrode contact plug-in first conductive layer 5 pattern, and then the fourth photoresist pattern 14 is removed. . (FIG. 1L).

By the above process, the storage electrode, the bit line contact plug, and the bit line are formed.

2A to 2D are manufacturing process diagrams for forming a storage electrode in the semiconductor device according to the present invention.

First, after the process of FIG. 1L, the third sacrificial layer 15 for forming the storage electrode is deposited, and the fifth photoresist layer pattern 16 is formed on the third sacrificial layer 15. The third sacrificial layer 15 is formed by etching the third sacrificial layer 15 by forming the storage electrode using the fifth photoresist layer pattern 16 to expose the storage electrode contact plug after exposing the storage electrode contact plug. 5 The photosensitive film pattern 16 is removed. In this case, insulation is performed with the bit line by using an etching selectivity between the third sacrificial layer 15 and the third insulating layer 13. (FIG. 2B).

Then, a fourth conductive layer 17 of a polysilicon layer material doped on the entire surface of the structure is deposited (FIG. 2C), followed by using a CMP or a refilling oxide film. (15) The storage electrode is isolated by removing the fourth conductive layer 17 over the pattern, and the storage pattern is formed by removing the pattern of the third sacrificial layer 15. (FIG. 2D).

3A to 3D are flowcharts illustrating another method of manufacturing the storage electrode in the semiconductor device according to the present invention.

First, a fifth conductive layer 18 of polycrystalline silicon layer material formed after the process step of FIG. 1L and doped on the entire surface of the structure is deposited on the whole surface to contact the storage electrode contact plug, and then on the fifth conductive layer 18. After depositing the fourth sacrificial layer 19 used for the storage electrode and forming the sixth photoresist layer pattern 20 by forming the storage electrode on the fourth sacrificial layer 19 (FIG. 3A), the sixth In the etching process using the photoresist pattern 20, a fourth sacrificial layer 19 pattern which becomes a core is formed on the storage electrode contact plug. (FIG. 3B).

Thereafter, a sixth conductive layer 21 of a doped polysilicon layer is formed on the entire structure, FIG. 3C, and then the entire doped sixth conductive layer 21 is etched, followed by a fourth sacrificial layer ( 19) Remove the pattern to complete the storage electrode. (FIG. 3D).

4A to 4J are cross-sectional views illustrating a method of forming a bit line in a semiconductor device according to the present invention.

First, after sequentially depositing the first insulating film 2 and the first sacrificial film 3 on the semiconductor substrate 1, the first photoresist film pattern 4 for forming the storage electrode contact and the bit line contact is formed. By using the same, the first sacrificial layer 3 and the first insulating layer 2 are sequentially etched to form storage electrodes and bit line contact holes (FIG. 4A), and then the first photoresist layer pattern 4 is formed. And a first conductive layer 5 of a doped polysilicon layer material is deposited on the entire surface of the structure to fill the inside of the contact hole. (FIG. 4B).

Then, the first conductive layer 5 is etched entirely, and the first sacrificial layer 3 is also removed to form bit lines and storage electrode contact plugs, and then the second sacrificial layer 6 is formed on the entire surface of the structure. 4C, a third photoresist layer pattern 9 is formed on the second sacrificial layer 6 on the storage electrode contact plug. (FIG. 4D).

Next, the second sacrificial layer 6, the first insulating layer 2, and the first conductive layer 5, which are bit line contact plugs, are etched using the third photoresist pattern 9, and the storage electrode contact plugs are etched. After allowing the height difference between the bit line contact plugs (FIG. 4E), the third photoresist pattern 9 is removed, and the second insulating film 10 is deposited on the entire surface of the structure (FIG. 4F). The second insulating film 10 is entirely etched to form the second insulating film 10 pattern in the form of a spacer on the sidewall of the plug of the storage electrode contact. (Figure 4g).

Thereafter, a third conductive layer 11 of a doped polysilicon layer and a metallic wiring layer 12 are sequentially deposited to form a bit line on the entire surface of the structure (FIG. 4H), and then using CMP. The entire surface is etched so that the bit lines are separated from each other, and then the third insulating film 13 for insulating the bit line and the storage electrode is deposited thereon, and the fourth photoresist pattern 14 for forming the storage electrode contact is formed. Form. (FIG. 4i).

Next, the third insulating layer 13 is etched using the fourth photoresist pattern 14 to expose the first conductive layer 5 pattern serving as a storage electrode contact plug, and then the fourth photoresist pattern 14 is removed. do. (FIG. 4J).

Accordingly, the present invention proposes a process in which a storage electrode contact formed in advance focusing on such a surface makes it easy to bond with the storage electrode thereon, and at the same time, insulation is secured from bit lines passing between the storage electrode contacts.

As described in detail above, the present invention provides a storage electrode contact plug and a bit line contact plug in a semiconductor memory cell manufacturing process, and forms the bit line contact plug lower than the storage electrode contact plug, and insulates the storage electrode contact plug. Since the storage electrodes were formed after the formed bit lines were formed, the bit lines were stably formed only at the sides of the storage electrode contact plugs, and thus the process margin was increased, which is advantageous for the high integration of the device, and the contact plugs contacted with the storage electrode lower ends. Since the area can be increased, there is an advantage of improving process yield and reliability of device operation.

Preferred embodiments of the present invention are disclosed for purposes of illustration, and those skilled in the art will be able to make various modifications, changes, additions, and the like within the spirit and scope of the present invention, and such modifications and changes should be regarded as belonging to the following claims. something to do.

Claims (4)

In the manufacturing method of a semiconductor device, Forming an insulating film on the semiconductor substrate; Forming a storage electrode contact by removing a portion of the insulating layer defined as the storage electrode contact; Forming a storage electrode contact plug filling the storage electrode contact hole; Forming a bit line contact hole between the storage electrode contact holes; Forming a bit line contact plug in the bit line contact hole but having a lower height than the storage electrode contact plug; Exposing the storage electrode contact plug by removing an insulating layer of the high portion of the storage electrode contact plug; Forming an insulating spacer on sidewalls of the exposed storage electrode contact plugs; Forming a conductive layer for bit lines on the entire surface of the structure; Etching and planarizing the surface of the semiconductor substrate having the structure, wherein the conductive layers are separated from each other to form a bit line. A process of forming a separated bit line by the process of claim 1, Forming a sacrificial layer pattern exposing an upper portion of the storage electrode contact plug on the structure; Forming a first insulating film pattern exposing the storage electrode contact plug and a portion of the sacrificial film pattern adjacent thereto; Applying a conductive layer to the entire surface of the structure to make contact with the storage electrode contact plug; And removing and separating the conductive layer on the first insulating layer pattern to form a storage electrode. A process of forming a separated bit line by the process of claim 1, Forming a sacrificial layer pattern exposing an upper portion of the storage electrode contact plug on the structure; Forming a first conductive layer on the entire surface of the structure to be in contact with the storage electrode contact plug; Forming a first insulating film pattern exposing the first conductive layer on the bit line; Applying a second conductive layer to the entire surface of the structure to make contact with the first conductive layer; And removing the second conductive layer on the first insulating layer pattern and the second and first conductive layers on the bit line to form a storage electrode. The method of claim 1, wherein the bit line contact plug and the storage electrode contact plug are formed together, and then the same process is performed.

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